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- fix incorrectly registered function openocd_array2mem 

- removed unused variables
- reformatted lpc288x.[ch]
- fixed helper/Makefile.am dependencies
- add correct svn props to added files

git-svn-id: svn://svn.berlios.de/openocd/trunk@829 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
ntfreak 2008-07-18 11:38:23 +00:00
parent 722fcb8d61
commit 60ba4476df
11 changed files with 495 additions and 572 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
src/flash/flash.c
View File

@ -141,12 +141,12 @@ int flash_register_commands(struct command_context_s *cmd_ctx)
static int jim_flash_banks(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
{
flash_bank_t *p;
if (argc != 1) {
Jim_WrongNumArgs(interp, 1, argv, "no arguments to flash_banks command");
return JIM_ERR;
}
flash_bank_t *p;
int i = 0;
if (!flash_banks)
{
@ -158,7 +158,6 @@ static int jim_flash_banks(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
{
Jim_Obj *elem=Jim_NewListObj(interp, NULL, 0);
Jim_ListAppendElement(interp, elem, Jim_NewStringObj(interp, "name", -1));
Jim_ListAppendElement(interp, elem, Jim_NewStringObj(interp, p->driver->name, -1));
Jim_ListAppendElement(interp, elem, Jim_NewStringObj(interp, "base", -1));
@ -178,7 +177,6 @@ static int jim_flash_banks(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
return JIM_OK;
}
int flash_init_drivers(struct command_context_s *cmd_ctx)
{
if (flash_banks)

791
src/flash/lpc288x.c
View File

@ -45,57 +45,55 @@
#include <string.h>
#include <unistd.h>
#define LOAD_TIMER_ERASE 0
#define LOAD_TIMER_WRITE 1
#define LOAD_TIMER_ERASE 0
#define LOAD_TIMER_WRITE 1
#define FLASH_PAGE_SIZE 512
#define FLASH_PAGE_SIZE 512
/* LPC288X control registers */
#define DBGU_CIDR 0x8000507C
#define DBGU_CIDR 0x8000507C
/* LPC288X flash registers */
#define F_CTRL 0x80102000 /* Flash control register R/W 0x5 */
#define F_STAT 0x80102004 /* Flash status register RO 0x45 */
#define F_PROG_TIME 0x80102008 /* Flash program time register R/W 0 */
#define F_WAIT 0x80102010 /* Flash read wait state register R/W 0xC004 */
#define F_CLK_TIME 0x8010201C /* Flash clock divider for 66 kHz generation R/W 0 */
#define F_INTEN_CLR 0x80102FD8 /* Clear interrupt enable bits WO - */
#define F_INTEN_SET 0x80102FDC /* Set interrupt enable bits WO - */
#define F_INT_STAT 0x80102FE0 /* Interrupt status bits RO 0 */
#define F_INTEN 0x80102FE4 /* Interrupt enable bits RO 0 */
#define F_INT_CLR 0x80102FE8 /* Clear interrupt status bits WO */
#define F_INT_SET 0x80102FEC /* Set interrupt status bits WO - */
#define FLASH_PD 0x80005030 /* Allows turning off the Flash memory for power savings. R/W 1*/
#define FLASH_INIT 0x80005034 /* Monitors Flash readiness, such as recovery from Power Down mode. R/W -*/
#define F_CTRL 0x80102000 /* Flash control register R/W 0x5 */
#define F_STAT 0x80102004 /* Flash status register RO 0x45 */
#define F_PROG_TIME 0x80102008 /* Flash program time register R/W 0 */
#define F_WAIT 0x80102010 /* Flash read wait state register R/W 0xC004 */
#define F_CLK_TIME 0x8010201C /* Flash clock divider for 66 kHz generation R/W 0 */
#define F_INTEN_CLR 0x80102FD8 /* Clear interrupt enable bits WO - */
#define F_INTEN_SET 0x80102FDC /* Set interrupt enable bits WO - */
#define F_INT_STAT 0x80102FE0 /* Interrupt status bits RO 0 */
#define F_INTEN 0x80102FE4 /* Interrupt enable bits RO 0 */
#define F_INT_CLR 0x80102FE8 /* Clear interrupt status bits WO */
#define F_INT_SET 0x80102FEC /* Set interrupt status bits WO - */
#define FLASH_PD 0x80005030 /* Allows turning off the Flash memory for power savings. R/W 1*/
#define FLASH_INIT 0x80005034 /* Monitors Flash readiness, such as recovery from Power Down mode. R/W -*/
/* F_CTRL bits */
#define FC_CS 0x0001
#define FC_FUNC 0x0002
#define FC_WEN 0x0004
#define FC_RD_LATCH 0x0020
#define FC_PROTECT 0x0080
#define FC_SET_DATA 0x0400
#define FC_RSSL 0x0800
#define FC_PROG_REQ 0x1000
#define FC_CLR_BUF 0x4000
#define FC_LOAD_REQ 0x8000
#define FC_CS 0x0001
#define FC_FUNC 0x0002
#define FC_WEN 0x0004
#define FC_RD_LATCH 0x0020
#define FC_PROTECT 0x0080
#define FC_SET_DATA 0x0400
#define FC_RSSL 0x0800
#define FC_PROG_REQ 0x1000
#define FC_CLR_BUF 0x4000
#define FC_LOAD_REQ 0x8000
/* F_STAT bits */
#define FS_DONE 0x0001
#define FS_PROGGNT 0x0002
#define FS_RDY 0x0004
#define FS_ERR 0x0020
#define FS_DONE 0x0001
#define FS_PROGGNT 0x0002
#define FS_RDY 0x0004
#define FS_ERR 0x0020
/* F_PROG_TIME */
#define FPT_TIME_MASK 0x7FFF
#define FPT_TIME_MASK 0x7FFF
#define FPT_ENABLE 0x8000
#define FPT_ENABLE 0x8000
/* F_WAIT */
#define FW_WAIT_STATES_MASK 0x00FF
#define FW_SET_MASK 0xC000
#define FW_WAIT_STATES_MASK 0x00FF
#define FW_SET_MASK 0xC000
/* F_CLK_TIME */
#define FCT_CLK_DIV_MASK 0x0FFF
int lpc288x_register_commands(struct command_context_s *cmd_ctx);
int lpc288x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
int lpc288x_erase(struct flash_bank_s *bank, int first, int last);
@ -115,96 +113,93 @@ int lpc288x_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd,
flash_driver_t lpc288x_flash =
{
.name = "lpc288x",
.register_commands = lpc288x_register_commands,
.flash_bank_command = lpc288x_flash_bank_command,
.erase = lpc288x_erase,
.protect = lpc288x_protect,
.write = lpc288x_write,
.probe = lpc288x_probe,
.auto_probe = lpc288x_probe,
.erase_check = lpc288x_erase_check,
.protect_check = lpc288x_protect_check,
.info = lpc288x_info
.name = "lpc288x",
.register_commands = lpc288x_register_commands,
.flash_bank_command = lpc288x_flash_bank_command,
.erase = lpc288x_erase,
.protect = lpc288x_protect,
.write = lpc288x_write,
.probe = lpc288x_probe,
.auto_probe = lpc288x_probe,
.erase_check = lpc288x_erase_check,
.protect_check = lpc288x_protect_check,
.info = lpc288x_info
};
int lpc288x_register_commands(struct command_context_s *cmd_ctx)
{
return ERROR_OK;
return ERROR_OK;
}
u32 lpc288x_wait_status_busy(flash_bank_t *bank, int timeout)
{
u32 status;
target_t *target = bank->target;
do
{
usleep(1000);
timeout--;
target_read_u32(target, F_STAT, &status);
}while (((status & FS_DONE) == 0) && timeout);
if(timeout == 0)
{
LOG_DEBUG("Timedout!");
return ERROR_FLASH_OPERATION_FAILED;
}
return ERROR_OK;
u32 status;
target_t *target = bank->target;
do
{
usleep(1000);
timeout--;
target_read_u32(target, F_STAT, &status);
}while (((status & FS_DONE) == 0) && timeout);
if(timeout == 0)
{
LOG_DEBUG("Timedout!");
return ERROR_FLASH_OPERATION_FAILED;
}
return ERROR_OK;
}
/* Read device id register and fill in driver info structure */
int lpc288x_read_part_info(struct flash_bank_s *bank)
{
lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
target_t *target = bank->target;
u32 cidr, status;
int sectornum;
int i = 0;
u32 offset;
if (lpc288x_info->cidr == 0x0102100A)
return ERROR_OK; /* already probed, multiple probes may cause memory leak, not allowed */
/* Read and parse chip identification register */
target_read_u32(target, DBGU_CIDR, &cidr);
if (cidr != 0x0102100A)
{
LOG_WARNING("Cannot identify target as an LPC288X (%08X)",cidr);
return ERROR_FLASH_OPERATION_FAILED;
}
lpc288x_info->cidr = cidr;
lpc288x_info->sector_size_break = 0x000F0000;
lpc288x_info->target_name = "LPC288x";
/* setup the sector info... */
offset = bank->base;
bank->num_sectors = 23;
bank->sectors = malloc(sizeof(flash_sector_t) * 23);
for (i = 0; i < 15; i++)
{
bank->sectors[i].offset = offset;
bank->sectors[i].size = 64 * 1024;
offset += bank->sectors[i].size;
bank->sectors[i].is_erased = -1;
bank->sectors[i].is_protected = 1;
}
for (i = 15; i < 23; i++)
{
bank->sectors[i].offset = offset;
bank->sectors[i].size = 8 * 1024;
offset += bank->sectors[i].size;
bank->sectors[i].is_erased = -1;
bank->sectors[i].is_protected = 1;
}
return ERROR_OK;
lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
target_t *target = bank->target;
u32 cidr;
int i = 0;
u32 offset;
if (lpc288x_info->cidr == 0x0102100A)
return ERROR_OK; /* already probed, multiple probes may cause memory leak, not allowed */
/* Read and parse chip identification register */
target_read_u32(target, DBGU_CIDR, &cidr);
if (cidr != 0x0102100A)
{
LOG_WARNING("Cannot identify target as an LPC288X (%08X)",cidr);
return ERROR_FLASH_OPERATION_FAILED;
}
lpc288x_info->cidr = cidr;
lpc288x_info->sector_size_break = 0x000F0000;
lpc288x_info->target_name = "LPC288x";
/* setup the sector info... */
offset = bank->base;
bank->num_sectors = 23;
bank->sectors = malloc(sizeof(flash_sector_t) * 23);
for (i = 0; i < 15; i++)
{
bank->sectors[i].offset = offset;
bank->sectors[i].size = 64 * 1024;
offset += bank->sectors[i].size;
bank->sectors[i].is_erased = -1;
bank->sectors[i].is_protected = 1;
}
for (i = 15; i < 23; i++)
{
bank->sectors[i].offset = offset;
bank->sectors[i].size = 8 * 1024;
offset += bank->sectors[i].size;
bank->sectors[i].is_erased = -1;
bank->sectors[i].is_protected = 1;
}
return ERROR_OK;
}
int lpc288x_protect_check(struct flash_bank_s *bank)
@ -212,354 +207,306 @@ int lpc288x_protect_check(struct flash_bank_s *bank)
return ERROR_OK;
}
/* flash_bank LPC288x 0 0 0 0 <target#> <cclk>
*/
/* flash_bank LPC288x 0 0 0 0 <target#> <cclk> */
int lpc288x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
{
lpc288x_flash_bank_t *lpc288x_info;
int i;
if (argc < 6)
{
LOG_WARNING("incomplete flash_bank LPC288x configuration");
return ERROR_FLASH_BANK_INVALID;
}
lpc288x_info = malloc(sizeof(lpc288x_flash_bank_t));
bank->driver_priv = lpc288x_info;
/* part wasn't probed for info yet */
lpc288x_info->cidr = 0;
lpc288x_info->cclk = strtoul(args[6], NULL, 0);
return ERROR_OK;
lpc288x_flash_bank_t *lpc288x_info;
if (argc < 6)
{
LOG_WARNING("incomplete flash_bank LPC288x configuration");
return ERROR_FLASH_BANK_INVALID;
}
lpc288x_info = malloc(sizeof(lpc288x_flash_bank_t));
bank->driver_priv = lpc288x_info;
/* part wasn't probed for info yet */
lpc288x_info->cidr = 0;
lpc288x_info->cclk = strtoul(args[6], NULL, 0);
return ERROR_OK;
}
/*
The frequency is the AHB clock frequency divided by (CLK_DIV ×
3) + 1. This must be programmed such that the Flash
Programming clock frequency is 66 kHz ± 20%.
AHB = 12 MHz ?
12000000/66000 = 182
CLK_DIV = 60 ?
*/
/* The frequency is the AHB clock frequency divided by (CLK_DIV ×3) + 1.
* This must be programmed such that the Flash Programming clock frequency is 66 kHz ± 20%.
* AHB = 12 MHz ?
* 12000000/66000 = 182
* CLK_DIV = 60 ? */
void lpc288x_set_flash_clk(struct flash_bank_s *bank)
{
u32 clk_time;
lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
clk_time = (lpc288x_info->cclk / 66000) / 3;
target_write_u32(bank->target, F_CTRL, FC_CS | FC_WEN );
target_write_u32(bank->target, F_CLK_TIME, clk_time);
u32 clk_time;
lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
clk_time = (lpc288x_info->cclk / 66000) / 3;
target_write_u32(bank->target, F_CTRL, FC_CS | FC_WEN);
target_write_u32(bank->target, F_CLK_TIME, clk_time);
}
/*
AHB tcyc (in ns) 83 ns
LOAD_TIMER_ERASE FPT_TIME = ((400,000,000 / AHB tcyc (in ns)) - 2) / 512
= 9412 (9500) (AN10548 9375)
LOAD_TIMER_WRITE FPT_TIME = ((1,000,000 / AHB tcyc (in ns)) - 2) / 512
= 23 (75) (AN10548 72 - is this wrong?)
TODO: Sort out timing calcs ;)
*/
/* AHB tcyc (in ns) 83 ns
* LOAD_TIMER_ERASE FPT_TIME = ((400,000,000 / AHB tcyc (in ns)) - 2) / 512
* = 9412 (9500) (AN10548 9375)
* LOAD_TIMER_WRITE FPT_TIME = ((1,000,000 / AHB tcyc (in ns)) - 2) / 512
* = 23 (75) (AN10548 72 - is this wrong?)
* TODO: Sort out timing calcs ;) */
void lpc288x_load_timer(int erase, struct target_s *target)
{
if(erase == LOAD_TIMER_ERASE)
{
target_write_u32(target, F_PROG_TIME, FPT_ENABLE | 9500);
}
else
{
target_write_u32(target, F_PROG_TIME, FPT_ENABLE | 75);
}
if (erase == LOAD_TIMER_ERASE)
{
target_write_u32(target, F_PROG_TIME, FPT_ENABLE | 9500);
}
else
{
target_write_u32(target, F_PROG_TIME, FPT_ENABLE | 75);
}
}
u32 lpc288x_system_ready(struct flash_bank_s *bank)
{
lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
if (lpc288x_info->cidr == 0)
{
return ERROR_FLASH_BANK_NOT_PROBED;
}
if (bank->target->state != TARGET_HALTED)
{
return ERROR_TARGET_NOT_HALTED;
}
return ERROR_OK;
lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
if (lpc288x_info->cidr == 0)
{
return ERROR_FLASH_BANK_NOT_PROBED;
}
if (bank->target->state != TARGET_HALTED)
{
return ERROR_TARGET_NOT_HALTED;
}
return ERROR_OK;
}
int lpc288x_erase_check(struct flash_bank_s *bank)
{
u32 buffer, test_bytes;
u32 addr, sector, i, status = lpc288x_system_ready(bank); /* probed? halted? */
if(status != ERROR_OK)
{
LOG_INFO("Processor not halted/not probed");
return status;
}
return ERROR_OK;
u32 status = lpc288x_system_ready(bank); /* probed? halted? */
if (status != ERROR_OK)
{
LOG_INFO("Processor not halted/not probed");
return status;
}
return ERROR_OK;
}
int lpc288x_erase(struct flash_bank_s *bank, int first, int last)
{
u32 status;
int sector;
target_t *target = bank->target;
status = lpc288x_system_ready(bank); /* probed? halted? */
if(status != ERROR_OK)
{
return status;
}
if ((first < 0) || (last < first) || (last >= bank->num_sectors))
{
LOG_INFO("Bad sector range");
return ERROR_FLASH_SECTOR_INVALID;
}
/* Configure the flash controller timing */
lpc288x_set_flash_clk(bank);
for (sector = first; sector <= last; sector++)
{
if (lpc288x_wait_status_busy(bank, 1000) != ERROR_OK)
{
return ERROR_FLASH_OPERATION_FAILED;
}
lpc288x_load_timer(LOAD_TIMER_ERASE,target);
target_write_u32( target,
bank->sectors[sector].offset,
0x00);
target_write_u32( target,
F_CTRL,
FC_PROG_REQ |
FC_PROTECT |
FC_CS);
}
if (lpc288x_wait_status_busy(bank, 1000) != ERROR_OK)
{
return ERROR_FLASH_OPERATION_FAILED;
}
return ERROR_OK;
u32 status;
int sector;
target_t *target = bank->target;
status = lpc288x_system_ready(bank); /* probed? halted? */
if (status != ERROR_OK)
{
return status;
}
if ((first < 0) || (last < first) || (last >= bank->num_sectors))
{
LOG_INFO("Bad sector range");
return ERROR_FLASH_SECTOR_INVALID;
}
/* Configure the flash controller timing */
lpc288x_set_flash_clk(bank);
for (sector = first; sector <= last; sector++)
{
if (lpc288x_wait_status_busy(bank, 1000) != ERROR_OK)
{
return ERROR_FLASH_OPERATION_FAILED;
}
lpc288x_load_timer(LOAD_TIMER_ERASE,target);
target_write_u32(target, bank->sectors[sector].offset, 0x00);
target_write_u32(target, F_CTRL, FC_PROG_REQ | FC_PROTECT | FC_CS);
}
if (lpc288x_wait_status_busy(bank, 1000) != ERROR_OK)
{
return ERROR_FLASH_OPERATION_FAILED;
}
return ERROR_OK;
}
int lpc288x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
u8 page_buffer[FLASH_PAGE_SIZE];
u32 i, status, source_offset,dest_offset;
target_t *target = bank->target;
u32 bytes_remaining = count;
u32 first_sector, last_sector, sector, page;
/* probed? halted? */
status = lpc288x_system_ready(bank);
if(status != ERROR_OK)
{
return status;
}
/* Initialise search indices */
first_sector = last_sector = 0xffffffff;
/* validate the write range... */
for(i = 0; i < bank->num_sectors; i++)
{
if((offset >= bank->sectors[i].offset) &&
(offset < (bank->sectors[i].offset + bank->sectors[i].size)) &&
(first_sector == 0xffffffff))
{
first_sector = i;
/* all writes must start on a sector boundary... */
if (offset % bank->sectors[i].size)
{
LOG_INFO("offset 0x%x breaks required alignment 0x%x", offset, bank->sectors[i].size);
return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
}
}
if(((offset + count) > bank->sectors[i].offset) &&
((offset + count) <= (bank->sectors[i].offset + bank->sectors[i].size)) &&
(last_sector == 0xffffffff))
{
last_sector = i;
}
}
/* Range check... */
if (first_sector == 0xffffffff || last_sector == 0xffffffff)
{
LOG_INFO("Range check failed %x %x", offset, count);
return ERROR_FLASH_DST_OUT_OF_BANK;
}
/* Configure the flash controller timing */
lpc288x_set_flash_clk(bank);
/* initialise the offsets */
source_offset = 0;
dest_offset = 0;
for (sector=first_sector; sector<=last_sector; sector++)
{
for(page = 0; page < bank->sectors[sector].size / FLASH_PAGE_SIZE; page++)
{
if(bytes_remaining == 0)
{
count = 0;
memset(page_buffer, 0xFF, FLASH_PAGE_SIZE);
}
else if (bytes_remaining < FLASH_PAGE_SIZE)
{
count = bytes_remaining;
memset(page_buffer, 0xFF, FLASH_PAGE_SIZE);
memcpy(page_buffer, &buffer[source_offset], count);
}
else
{
count = FLASH_PAGE_SIZE;
memcpy(page_buffer, &buffer[source_offset], count);
}
/* Wait for flash to become ready */
if (lpc288x_wait_status_busy(bank, 1000) != ERROR_OK)
{
return ERROR_FLASH_OPERATION_FAILED;
}
/* fill flash data latches with 1's */
target_write_u32(target, F_CTRL,
FC_CS |
FC_SET_DATA |
FC_WEN |
FC_FUNC );
target_write_u32(target, F_CTRL,
FC_CS |
FC_WEN |
FC_FUNC );
/*would be better to use the clean target_write_buffer() interface but
it seems not to be a LOT slower....
bulk_write_memory() is no quicker :(*/
u8 page_buffer[FLASH_PAGE_SIZE];
u32 i, status, source_offset,dest_offset;
target_t *target = bank->target;
u32 bytes_remaining = count;
u32 first_sector, last_sector, sector, page;
/* probed? halted? */
status = lpc288x_system_ready(bank);
if (status != ERROR_OK)
{
return status;
}
/* Initialise search indices */
first_sector = last_sector = 0xffffffff;
/* validate the write range... */
for (i = 0; i < bank->num_sectors; i++)
{
if ((offset >= bank->sectors[i].offset) &&
(offset < (bank->sectors[i].offset + bank->sectors[i].size)) &&
(first_sector == 0xffffffff))
{
first_sector = i;
/* all writes must start on a sector boundary... */
if (offset % bank->sectors[i].size)
{
LOG_INFO("offset 0x%x breaks required alignment 0x%x", offset, bank->sectors[i].size);
return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
}
}
if (((offset + count) > bank->sectors[i].offset) &&
((offset + count) <= (bank->sectors[i].offset + bank->sectors[i].size)) &&
(last_sector == 0xffffffff))
{
last_sector = i;
}
}
/* Range check... */
if (first_sector == 0xffffffff || last_sector == 0xffffffff)
{
LOG_INFO("Range check failed %x %x", offset, count);
return ERROR_FLASH_DST_OUT_OF_BANK;
}
/* Configure the flash controller timing */
lpc288x_set_flash_clk(bank);
/* initialise the offsets */
source_offset = 0;
dest_offset = 0;
for (sector = first_sector; sector <= last_sector; sector++)
{
for (page = 0; page < bank->sectors[sector].size / FLASH_PAGE_SIZE; page++)
{
if (bytes_remaining == 0)
{
count = 0;
memset(page_buffer, 0xFF, FLASH_PAGE_SIZE);
}
else if (bytes_remaining < FLASH_PAGE_SIZE)
{
count = bytes_remaining;
memset(page_buffer, 0xFF, FLASH_PAGE_SIZE);
memcpy(page_buffer, &buffer[source_offset], count);
}
else
{
count = FLASH_PAGE_SIZE;
memcpy(page_buffer, &buffer[source_offset], count);
}
/* Wait for flash to become ready */
if (lpc288x_wait_status_busy(bank, 1000) != ERROR_OK)
{
return ERROR_FLASH_OPERATION_FAILED;
}
/* fill flash data latches with 1's */
target_write_u32(target, F_CTRL, FC_CS | FC_SET_DATA | FC_WEN | FC_FUNC);
target_write_u32(target, F_CTRL, FC_CS | FC_WEN | FC_FUNC);
/*would be better to use the clean target_write_buffer() interface but
* it seems not to be a LOT slower....
* bulk_write_memory() is no quicker :(*/
#if 1
if (target->type->write_memory(target, offset + dest_offset, 4, 128, page_buffer) != ERROR_OK)
{
LOG_ERROR("Write failed s %x p %x", sector, page);
return ERROR_FLASH_OPERATION_FAILED;
}
if (target->type->write_memory(target, offset + dest_offset, 4, 128, page_buffer) != ERROR_OK)
{
LOG_ERROR("Write failed s %x p %x", sector, page);
return ERROR_FLASH_OPERATION_FAILED;
}
#else
if(target_write_buffer(target, offset + dest_offset, FLASH_PAGE_SIZE, page_buffer) != ERROR_OK)
{
LOG_INFO("Write to flash buffer failed");
return ERROR_FLASH_OPERATION_FAILED;
}
if (target_write_buffer(target, offset + dest_offset, FLASH_PAGE_SIZE, page_buffer) != ERROR_OK)
{
LOG_INFO("Write to flash buffer failed");
return ERROR_FLASH_OPERATION_FAILED;
}
#endif
dest_offset += FLASH_PAGE_SIZE;
source_offset += count;
bytes_remaining -= count;
lpc288x_load_timer(LOAD_TIMER_WRITE, target);
target_write_u32( target,
F_CTRL,
FC_PROG_REQ |
FC_PROTECT |
FC_FUNC |
FC_CS);
}
}
return ERROR_OK;
dest_offset += FLASH_PAGE_SIZE;
source_offset += count;
bytes_remaining -= count;
lpc288x_load_timer(LOAD_TIMER_WRITE, target);
target_write_u32(target, F_CTRL, FC_PROG_REQ | FC_PROTECT | FC_FUNC | FC_CS);
}
}
return ERROR_OK;
}
int lpc288x_probe(struct flash_bank_s *bank)
{
/* we only deal with LPC2888 so flash config is fixed
*/
lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
int retval;
if (lpc288x_info->cidr != 0)
{
return ERROR_OK; /* already probed */
}
if (bank->target->state != TARGET_HALTED)
{
return ERROR_TARGET_NOT_HALTED;
}
retval = lpc288x_read_part_info(bank);
if (retval != ERROR_OK)
return retval;
return ERROR_OK;
/* we only deal with LPC2888 so flash config is fixed */
lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
int retval;
if (lpc288x_info->cidr != 0)
{
return ERROR_OK; /* already probed */
}
if (bank->target->state != TARGET_HALTED)
{
return ERROR_TARGET_NOT_HALTED;
}
retval = lpc288x_read_part_info(bank);
if (retval != ERROR_OK)
return retval;
return ERROR_OK;
}
int lpc288x_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
snprintf(buf, buf_size, "lpc288x flash driver");
return ERROR_OK;
snprintf(buf, buf_size, "lpc288x flash driver");
return ERROR_OK;
}
int lpc288x_protect(struct flash_bank_s *bank, int set, int first, int last)
{
int lockregion, status;
u32 value;
target_t *target = bank->target;
/* probed? halted? */
status = lpc288x_system_ready(bank);
if(status != ERROR_OK)
{
return status;
}
if ((first < 0) || (last < first) || (last >= bank->num_sectors))
{
return ERROR_FLASH_SECTOR_INVALID;
}
/* Configure the flash controller timing */
lpc288x_set_flash_clk(bank);
for (lockregion = first; lockregion <= last; lockregion++)
{
if(set)
{
/* write an odd value to base addy to protect... */
value = 0x01;
}
else
{
/* write an even value to base addy to unprotect... */
value = 0x00;
}
target_write_u32( target,
bank->sectors[lockregion].offset,
value);
target_write_u32( target,
F_CTRL,
FC_LOAD_REQ |
FC_PROTECT |
FC_WEN |
FC_FUNC |
FC_CS);
}
return ERROR_OK;
int lockregion, status;
u32 value;
target_t *target = bank->target;
/* probed? halted? */
status = lpc288x_system_ready(bank);
if (status != ERROR_OK)
{
return status;
}
if ((first < 0) || (last < first) || (last >= bank->num_sectors))
{
return ERROR_FLASH_SECTOR_INVALID;
}
/* Configure the flash controller timing */
lpc288x_set_flash_clk(bank);
for (lockregion = first; lockregion <= last; lockregion++)
{
if (set)
{
/* write an odd value to base addy to protect... */
value = 0x01;
}
else
{
/* write an even value to base addy to unprotect... */
value = 0x00;
}
target_write_u32(target, bank->sectors[lockregion].offset, value);
target_write_u32(target, F_CTRL, FC_LOAD_REQ | FC_PROTECT | FC_WEN | FC_FUNC | FC_CS);
}
return ERROR_OK;
}

15
src/flash/lpc288x.h
View File

@ -26,16 +26,15 @@
typedef struct lpc288x_flash_bank_s
{
u32 working_area;
u32 working_area_size;
u32 working_area;
u32 working_area_size;
/* chip id register */
u32 cidr;
char * target_name;
u32 cclk;
/* chip id register */
u32 cidr;
char * target_name;
u32 cclk;
u32 sector_size_break;
u32 sector_size_break;
} lpc288x_flash_bank_t;
#endif /* lpc288x_H */

14
src/helper/Makefile.am
View File

@ -1,4 +1,4 @@
INCLUDES = -I$(top_srcdir)/src $(all_includes)
INCLUDES = -I$(top_srcdir)/src $(all_includes) -I$(top_srcdir)/src/target
METASOURCES = AUTO
AM_CPPFLAGS = -DPKGDATADIR=\"$(pkgdatadir)\" -DPKGLIBDIR=\"$(pkglibdir)\" @CPPFLAGS@
noinst_LIBRARIES = libhelper.a
@ -10,20 +10,18 @@ CONFIGFILES = options.c jim.c
endif
libhelper_a_SOURCES = binarybuffer.c $(CONFIGFILES) configuration.c log.c command.c time_support.c \
replacements.c fileio.c
noinst_HEADERS = binarybuffer.h configuration.h types.h log.h command.h \
time_support.h replacements.h fileio.h \
jim.h
replacements.c fileio.c startup_tcl.c
libhelper_a_SOURCES += startup_tcl.c
noinst_HEADERS = binarybuffer.h configuration.h types.h log.h command.h \
time_support.h replacements.h fileio.h jim.h
noinst_PROGRAMS = bin2char
bin2char_SOURCES = bin2char.c
# Convert .tcl to cfile
startup_tcl.c: bin2char startup.tcl
./bin2char startup_tcl < $(srcdir)/startup.tcl > startup_tcl.c
startup_tcl.c: startup.tcl bin2char$(EXEEXT)
./bin2char$(EXEEXT) startup_tcl < $(srcdir)/$< > $@
# add startup_tcl.c to make clean list
CLEANFILES = startup_tcl.c

15
src/helper/command.c
View File

@ -25,8 +25,9 @@
#endif
#include "replacements.h"
#include "target.h"
#include "command.h"
#include "configuration.h"
#include "log.h"
#include "time_support.h"
@ -44,6 +45,9 @@ Jim_Interp *interp = NULL;
int handle_sleep_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
int handle_fast_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
int run_command(command_context_t *context, command_t *c, char *words[], int num_words);
static void tcl_output(void *privData, const char *file, int line, const char *function, const char *string)
{
Jim_Obj *tclOutput=(Jim_Obj *)privData;
@ -178,7 +182,6 @@ command_t* register_command(command_context_t *context, command_t *parent, char
Jim_CreateCommand(interp, full_name, script_command, c, NULL);
free((void *)full_name);
/* accumulate help text in Tcl helptext list. */
Jim_Obj *helptext=Jim_GetGlobalVariableStr(interp, "ocd_helptext", JIM_ERRMSG);
if (Jim_IsShared(helptext))
@ -207,7 +210,6 @@ int unregister_all_commands(command_context_t *context)
if (context == NULL)
return ERROR_OK;
while(NULL != context->commands)
{
c = context->commands;
@ -277,7 +279,6 @@ int unregister_command(command_context_t *context, char *name)
return ERROR_OK;
}
void command_output_text(command_context_t *context, const char *data)
{
if( context && context->output_handler && data ){
@ -435,7 +436,6 @@ int command_run_line(command_context_t *context, char *line)
return retval;
}
int command_run_linef(command_context_t *context, char *format, ...)
{
int retval=ERROR_FAIL;
@ -451,8 +451,6 @@ int command_run_linef(command_context_t *context, char *format, ...)
return retval;
}
void command_set_output_handler(command_context_t* context, int (*output_handler)(struct command_context_s *context, const char* line), void *priv)
{
context->output_handler = output_handler;
@ -476,7 +474,6 @@ int command_done(command_context_t *context)
return ERROR_OK;
}
/* find full path to file */
static int jim_find(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
{
@ -502,8 +499,6 @@ static int jim_echo(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
return JIM_OK;
}
static size_t openocd_jim_fwrite(const void *_ptr, size_t size, size_t n, void *cookie)
{
size_t nbytes;

2
src/helper/command.h
View File

@ -76,14 +76,12 @@ extern int command_run_line(command_context_t *context, char *line);
extern int command_run_linef(command_context_t *context, char *format, ...);
extern void command_output_text(command_context_t *context, const char *data);
#define ERROR_COMMAND_CLOSE_CONNECTION (-600)
#define ERROR_COMMAND_SYNTAX_ERROR (-601)
#define ERROR_COMMAND_NOTFOUND (-602)
extern int fast_and_dangerous;
/* Integrate the JIM TCL interpretor into the command processing. */
#include <stdarg.h>
#ifdef __ECOS

2
src/helper/jim.h
View File

@ -970,7 +970,7 @@ static void Jim_InitExtension(Jim_Interp *interp)
#ifdef JIM_EMBEDDED
Jim_Interp *ExportedJimCreateInterp(void);
static void Jim_InitEmbedded(void) {
static inline void Jim_InitEmbedded(void) {
Jim_Interp *i = ExportedJimCreateInterp();
Jim_InitExtension(i);
Jim_FreeInterp(i);

11
src/jtag/jtag.c
View File

@ -761,9 +761,6 @@ void MINIDRIVER(interface_jtag_add_dr_out)(int device_num,
}
}
void jtag_add_plain_dr_scan(int num_fields, scan_field_t *fields, enum tap_state state)
{
int retval;
@ -872,7 +869,6 @@ void jtag_add_pathmove(int num_states, enum tap_state *path)
jtag_error=retval;
}
int MINIDRIVER(interface_jtag_add_pathmove)(int num_states, enum tap_state *path)
{
jtag_command_t **last_cmd = jtag_get_last_command_p();
@ -1040,7 +1036,6 @@ int MINIDRIVER(interface_jtag_add_reset)(int req_trst, int req_srst)
(*last_cmd)->cmd.reset->trst = req_trst;
(*last_cmd)->cmd.reset->srst = req_srst;
return ERROR_OK;
}
@ -1120,7 +1115,6 @@ int jtag_build_buffer(scan_command_t *cmd, u8 **buffer)
}
return bit_count;
}
int jtag_read_buffer(u8 *buffer, scan_command_t *cmd)
@ -1631,7 +1625,6 @@ int jtag_init(struct command_context_s *cmd_ctx)
return jtag_init_reset(cmd_ctx);
}
static int default_khz(int khz, int *jtag_speed)
{
LOG_ERROR("Translation from khz to jtag_speed not implemented");
@ -1931,7 +1924,6 @@ int handle_jtag_khz_command(struct command_context_s *cmd_ctx, char *cmd, char *
return ERROR_OK;
}
int handle_endstate_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
enum tap_state state;
@ -2007,7 +1999,6 @@ int handle_runtest_command(struct command_context_s *cmd_ctx, char *cmd, char **
}
int handle_irscan_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
int i;
@ -2051,7 +2042,7 @@ int Jim_Command_drscan(Jim_Interp *interp, int argc, Jim_Obj *const *args)
scan_field_t *fields;
int num_fields;
int field_count = 0;
int i, j, e;
int i, e;
long device;
/* args[1] = device

198
src/server/tcl_server.c
View File

@ -24,7 +24,6 @@
#include <stdarg.h>
#include "tcl_server.h"
#include "jim.h"
#include "log.h"
#include "command.h"
@ -34,15 +33,14 @@
#include <string.h>
#include <ctype.h>
#define TCL_SERVER_VERSION "TCL Server 0.1"
#define TCL_MAX_LINE (4096)
#define TCL_SERVER_VERSION "TCL Server 0.1"
#define TCL_MAX_LINE (4096)
typedef struct tcl_connection_s {
int tc_linedrop;
int tc_lineoffset;
char tc_line[TCL_MAX_LINE];
int tc_outerror; /* flag an output error */
int tc_linedrop;
int tc_lineoffset;
char tc_line[TCL_MAX_LINE];
int tc_outerror; /* flag an output error */
} tcl_connection_t;
extern Jim_Interp *interp;
@ -64,137 +62,137 @@ static int tcl_closed(connection_t *connection);
*/
int tcl_output(connection_t *connection, const void *data, ssize_t len)
{
ssize_t wlen;
tcl_connection_t *tclc;
ssize_t wlen;
tcl_connection_t *tclc;
tclc = connection->priv;
if (tclc->tc_outerror)
return ERROR_SERVER_REMOTE_CLOSED;
tclc = connection->priv;
if (tclc->tc_outerror)
return ERROR_SERVER_REMOTE_CLOSED;
wlen = write_socket(connection->fd, data, len);
if (wlen == len)
return ERROR_OK;
wlen = write_socket(connection->fd, data, len);
if (wlen == len)
return ERROR_OK;
LOG_ERROR("error during write: %d != %d", (int)wlen, (int)len);
tclc->tc_outerror = 1;
return ERROR_SERVER_REMOTE_CLOSED;
LOG_ERROR("error during write: %d != %d", (int)wlen, (int)len);
tclc->tc_outerror = 1;
return ERROR_SERVER_REMOTE_CLOSED;
}
/* connections */
static int tcl_new_connection(connection_t *connection)
{
tcl_connection_t *tclc;
tcl_connection_t *tclc;
tclc = malloc(sizeof(tcl_connection_t));
if (tclc == NULL)
return ERROR_CONNECTION_REJECTED;
tclc = malloc(sizeof(tcl_connection_t));
if (tclc == NULL)
return ERROR_CONNECTION_REJECTED;
memset(tclc, 0, sizeof(tcl_connection_t));
connection->priv = tclc;
return ERROR_OK;
memset(tclc, 0, sizeof(tcl_connection_t));
connection->priv = tclc;
return ERROR_OK;
}
static int tcl_input(connection_t *connection)
{
int retval;
int i;
ssize_t rlen;
const char *result;
int reslen;
tcl_connection_t *tclc;
char in[256];
int retval;
int i;
ssize_t rlen;
const char *result;
int reslen;
tcl_connection_t *tclc;
char in[256];
rlen = read_socket(connection->fd, &in, sizeof(in));
if (rlen <= 0) {
if (rlen < 0)
LOG_ERROR("error during read: %s", strerror(errno));
return ERROR_SERVER_REMOTE_CLOSED;
}
rlen = read_socket(connection->fd, &in, sizeof(in));
if (rlen <= 0) {
if (rlen < 0)
LOG_ERROR("error during read: %s", strerror(errno));
return ERROR_SERVER_REMOTE_CLOSED;
}
tclc = connection->priv;
if (tclc == NULL)
return ERROR_CONNECTION_REJECTED;
tclc = connection->priv;
if (tclc == NULL)
return ERROR_CONNECTION_REJECTED;
/* push as much data into the line as possible */
for (i = 0; i < rlen; i++)
{
if (!isprint(in[i]) && !isspace(in[i]))
{
/* drop this line */
tclc->tc_linedrop = 1;
continue;
}
/* push as much data into the line as possible */
for (i = 0; i < rlen; i++)
{
if (!isprint(in[i]) && !isspace(in[i]))
{
/* drop this line */
tclc->tc_linedrop = 1;
continue;
}
/* buffer the data */
tclc->tc_line[tclc->tc_lineoffset] = in[i];
if (tclc->tc_lineoffset < TCL_MAX_LINE)
tclc->tc_lineoffset++;
else
tclc->tc_linedrop = 1;
/* buffer the data */
tclc->tc_line[tclc->tc_lineoffset] = in[i];
if (tclc->tc_lineoffset < TCL_MAX_LINE)
tclc->tc_lineoffset++;
else
tclc->tc_linedrop = 1;
if (in[i] != '\n')
continue;
if (in[i] != '\n')
continue;
/* process the line */
if (tclc->tc_linedrop) {
/* process the line */
if (tclc->tc_linedrop) {
#define ESTR "line too long\n"
retval = tcl_output(connection, ESTR, sizeof(ESTR));
if (retval != ERROR_OK)
return retval;
retval = tcl_output(connection, ESTR, sizeof(ESTR));
if (retval != ERROR_OK)
return retval;
#undef ESTR
} else {
tclc->tc_line[tclc->tc_lineoffset-1] = '\0';
retval = Jim_Eval(interp, tclc->tc_line);
result = Jim_GetString(Jim_GetResult(interp), &reslen);
retval = tcl_output(connection, result, reslen);
if (retval != ERROR_OK)
return retval;
if (memchr(result, '\n', reslen) == NULL)
tcl_output(connection, "\n", 1);
}
tclc->tc_lineoffset = 0;
tclc->tc_linedrop = 0;
}
}
else {
tclc->tc_line[tclc->tc_lineoffset-1] = '\0';
retval = Jim_Eval(interp, tclc->tc_line);
result = Jim_GetString(Jim_GetResult(interp), &reslen);
retval = tcl_output(connection, result, reslen);
if (retval != ERROR_OK)
return retval;
if (memchr(result, '\n', reslen) == NULL)
tcl_output(connection, "\n", 1);
}
tclc->tc_lineoffset = 0;
tclc->tc_linedrop = 0;
}
return ERROR_OK;
return ERROR_OK;
}
static int tcl_closed(connection_t *connection)
{
/* cleanup connection context */
if (connection->priv) {
free(connection->priv);
connection->priv = NULL;
}
return ERROR_OK;
/* cleanup connection context */
if (connection->priv) {
free(connection->priv);
connection->priv = NULL;
}
return ERROR_OK;
}
int tcl_init(void)
{
int retval;
int retval;
if (tcl_port == 0)
{
LOG_WARNING("no tcl port specified, using default port 6666");
tcl_port = 6666;
}
if (tcl_port == 0)
{
LOG_WARNING("no tcl port specified, using default port 6666");
tcl_port = 6666;
}
retval = add_service("tcl", CONNECTION_TCL, tcl_port, 1, tcl_new_connection, tcl_input, tcl_closed, NULL);
return retval;
retval = add_service("tcl", CONNECTION_TCL, tcl_port, 1, tcl_new_connection, tcl_input, tcl_closed, NULL);
return retval;
}
int tcl_register_commands(command_context_t *cmd_ctx)
{
register_command(cmd_ctx, NULL, "tcl_port", handle_tcl_port_command, COMMAND_CONFIG, "");
return ERROR_OK;
register_command(cmd_ctx, NULL, "tcl_port", handle_tcl_port_command, COMMAND_CONFIG, "");
return ERROR_OK;
}
static int handle_tcl_port_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
if (argc == 1) {
tcl_port = strtoul(args[0], NULL, 0);
}
return ERROR_OK;
if (argc == 1) {
tcl_port = strtoul(args[0], NULL, 0);
}
return ERROR_OK;
}

8
src/target/interface/olimex-jtag-tiny-a.cfg
View File

@ -1,4 +1,4 @@
# REFERENCE: http://www.olimex.com/dev/arm-usb-tiny.html
interface ft2232
ft2232_device_desc "Olimex OpenOCD JTAG TINY A"
ft2232_layout olimex-jtag
# REFERENCE: http://www.olimex.com/dev/arm-usb-tiny.html
interface ft2232
ft2232_device_desc "Olimex OpenOCD JTAG TINY A"
ft2232_layout olimex-jtag

5
src/target/target.c
View File

@ -949,10 +949,9 @@ int target_register_commands(struct command_context_s *cmd_ctx)
register_command(cmd_ctx, NULL, "virt2phys", handle_virt2phys_command, COMMAND_ANY, "virt2phys <virtual address>");
register_command(cmd_ctx, NULL, "profile", handle_profile_command, COMMAND_EXEC, "PRELIMINARY! - profile <seconds> <gmon.out>");
/* script procedures */
register_jim(cmd_ctx, "openocd_mem2array", jim_mem2array, "read memory and return as a TCL array for script processing");
register_jim(cmd_ctx, "openocd_array2mem", jim_mem2array, "convert a TCL array to memory locations and write the values");
register_jim(cmd_ctx, "openocd_array2mem", jim_array2mem, "convert a TCL array to memory locations and write the values");
return ERROR_OK;
}
@ -2863,7 +2862,7 @@ static int jim_array2mem(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
u32 v;
const char *varname;
u8 buffer[4096];
int i, n, e, retval;
int i, n, e, retval;
/* argv[1] = name of array to get the data
* argv[2] = desired width