flash/stm32l4x: prevent undefined behavior warnings caused by signed integer operations

When running OpenOCD with -fsanitize=undefined, a warning is emitted
for an bit-shifting operation whose result cannot be stored in a
signed integer.

This is because (1 << 31) overflows a signed integer, which is
undefined behavior. By making each of the bit masks act on an
unsigned number, the warning is avoided.

Whether this warning emitted by UBSan would ever manifest into a real
error is debatable, but fixing this does make UBSan happy.

Change-Id: I0455a26b234cb4f5e239a6ba90023d28380e9464
Signed-off-by: Sebastiaan de Schaetzen <sebastiaan.de.schaetzen@gmail.com>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6429
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
This commit is contained in:
Sebastiaan de Schaetzen 2021-08-15 23:26:23 +01:00 committed by Oleksij Rempel
parent 43d31a8fd5
commit 64fbd60787
1 changed files with 33 additions and 23 deletions

View File

@ -19,34 +19,44 @@
#ifndef OPENOCD_FLASH_NOR_STM32L4X
#define OPENOCD_FLASH_NOR_STM32L4X
/* IMPORTANT: this file is included by stm32l4x driver and flashloader,
* so please when changing this file, do not forget to check the flashloader */
/* FIXME: #include "helper/bits.h" cause build errors when compiling
* the flashloader, for now just redefine the needed 'BIT 'macro */
#ifndef BIT
#define BIT(nr) (1UL << (nr))
#endif
/* FLASH_CR register bits */
#define FLASH_PG (1 << 0)
#define FLASH_PER (1 << 1)
#define FLASH_MER1 (1 << 2)
#define FLASH_PG BIT(0)
#define FLASH_PER BIT(1)
#define FLASH_MER1 BIT(2)
#define FLASH_PAGE_SHIFT 3
#define FLASH_BKER (1 << 11)
#define FLASH_BKER_G0 (1 << 13)
#define FLASH_MER2 (1 << 15)
#define FLASH_STRT (1 << 16)
#define FLASH_OPTSTRT (1 << 17)
#define FLASH_EOPIE (1 << 24)
#define FLASH_ERRIE (1 << 25)
#define FLASH_OBL_LAUNCH (1 << 27)
#define FLASH_OPTLOCK (1 << 30)
#define FLASH_LOCK (1 << 31)
#define FLASH_BKER BIT(11)
#define FLASH_BKER_G0 BIT(13)
#define FLASH_MER2 BIT(15)
#define FLASH_STRT BIT(16)
#define FLASH_OPTSTRT BIT(17)
#define FLASH_EOPIE BIT(24)
#define FLASH_ERRIE BIT(25)
#define FLASH_OBL_LAUNCH BIT(27)
#define FLASH_OPTLOCK BIT(30)
#define FLASH_LOCK BIT(31)
/* FLASH_SR register bits */
#define FLASH_BSY (1 << 16)
#define FLASH_BSY2 (1 << 17)
#define FLASH_BSY BIT(16)
#define FLASH_BSY2 BIT(17)
/* Fast programming not used => related errors not used*/
#define FLASH_PGSERR (1 << 7) /* Programming sequence error */
#define FLASH_SIZERR (1 << 6) /* Size error */
#define FLASH_PGAERR (1 << 5) /* Programming alignment error */
#define FLASH_WRPERR (1 << 4) /* Write protection error */
#define FLASH_PROGERR (1 << 3) /* Programming error */
#define FLASH_OPERR (1 << 1) /* Operation error */
#define FLASH_EOP (1 << 0) /* End of operation */
#define FLASH_PGSERR BIT(7) /* Programming sequence error */
#define FLASH_SIZERR BIT(6) /* Size error */
#define FLASH_PGAERR BIT(5) /* Programming alignment error */
#define FLASH_WRPERR BIT(4) /* Write protection error */
#define FLASH_PROGERR BIT(3) /* Programming error */
#define FLASH_OPERR BIT(1) /* Operation error */
#define FLASH_EOP BIT(0) /* End of operation */
#define FLASH_ERROR (FLASH_PGSERR | FLASH_SIZERR | FLASH_PGAERR | \
FLASH_WRPERR | FLASH_PROGERR | FLASH_OPERR)
@ -60,7 +70,7 @@
/* FLASH_OPTR register bits */
#define FLASH_RDP_MASK 0xFF
#define FLASH_TZEN (1 << 31)
#define FLASH_TZEN BIT(31)
/* FLASH secure block based bank 1/2 register offsets */
#define FLASH_SECBB1(X) (0x80 + 4 * (X - 1))