armv8-m: add SecureFault exception

Change-Id: I4e1963631e834b6334bc917e956c2db4464b7b08
Signed-off-by: Laurent LEMELE <laurent.lemele@st.com>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5797
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This commit is contained in:
Tarek BOCHKATI 2020-08-11 12:56:36 +01:00 committed by Antonio Borneo
parent c20f65b632
commit 6e33947899
3 changed files with 12 additions and 1 deletions

View File

@ -48,7 +48,7 @@
static const char * const armv7m_exception_strings[] = {
"", "Reset", "NMI", "HardFault",
"MemManage", "BusFault", "UsageFault", "RESERVED",
"MemManage", "BusFault", "UsageFault", "SecureFault",
"RESERVED", "RESERVED", "RESERVED", "SVCall",
"DebugMonitor", "RESERVED", "PendSV", "SysTick"
};

View File

@ -445,6 +445,14 @@ static int cortex_m_examine_exception_reason(struct target *target)
if (retval != ERROR_OK)
return retval;
break;
case 7: /* Secure Fault */
retval = mem_ap_read_u32(armv7m->debug_ap, NVIC_SFSR, &except_sr);
if (retval != ERROR_OK)
return retval;
retval = mem_ap_read_u32(armv7m->debug_ap, NVIC_SFAR, &except_ar);
if (retval != ERROR_OK)
return retval;
break;
case 11: /* SVCall */
break;
case 12: /* Debug Monitor */

View File

@ -114,6 +114,7 @@
#define VC_MMERR BIT(4)
#define VC_CORERESET BIT(0)
/* NVIC registers */
#define NVIC_ICTR 0xE000E004
#define NVIC_ISE0 0xE000E100
#define NVIC_ICSR 0xE000ED04
@ -127,6 +128,8 @@
#define NVIC_DFSR 0xE000ED30
#define NVIC_MMFAR 0xE000ED34
#define NVIC_BFAR 0xE000ED38
#define NVIC_SFSR 0xE000EDE4
#define NVIC_SFAR 0xE000EDE8
/* NVIC_AIRCR bits */
#define AIRCR_VECTKEY (0x5FAul << 16)