diff --git a/src/target/nds32.c b/src/target/nds32.c
index 39d2c0067..372f82d0c 100644
--- a/src/target/nds32.c
+++ b/src/target/nds32.c
@@ -27,9 +27,6 @@
 #include "nds32_tlb.h"
 #include "nds32_disassembler.h"
 
-const int NDS32_BREAK_16 = 0x00EA;      /* 0xEA00 */
-const int NDS32_BREAK_32 = 0x0A000064;  /* 0x6400000A */
-
 struct nds32_edm_operation nds32_edm_ops[NDS32_EDM_OPERATION_MAX_NUM];
 uint32_t nds32_edm_ops_num;
 
@@ -47,7 +44,7 @@ const char *nds32_debug_type_name[11] = {
 	"LOAD STORE GLOBAL STOP",
 };
 
-static const int NDS32_LM_SIZE_TABLE[16] = {
+static const int nds32_lm_size_table[16] = {
 	4 * 1024,
 	8 * 1024,
 	16 * 1024,
@@ -61,7 +58,7 @@ static const int NDS32_LM_SIZE_TABLE[16] = {
 	2 * 1024,
 };
 
-static const int NDS32_LINE_SIZE_TABLE[6] = {
+static const int nds32_line_size_table[6] = {
 	0,
 	8,
 	16,
@@ -1622,11 +1619,11 @@ int nds32_config(struct nds32 *nds32)
 	uint32_t size_index;
 	nds32_get_mapped_reg(nds32, MR6, &value_mr6);
 	size_index = (value_mr6 >> 1) & 0xF;
-	nds32->memory.ilm_size = NDS32_LM_SIZE_TABLE[size_index];
+	nds32->memory.ilm_size = nds32_lm_size_table[size_index];
 
 	nds32_get_mapped_reg(nds32, MR7, &value_mr7);
 	size_index = (value_mr7 >> 1) & 0xF;
-	nds32->memory.dlm_size = NDS32_LM_SIZE_TABLE[size_index];
+	nds32->memory.dlm_size = nds32_lm_size_table[size_index];
 
 	return ERROR_OK;
 }
@@ -1697,8 +1694,8 @@ int nds32_cache_sync(struct target *target, target_addr_t address, uint32_t leng
 	struct nds32 *nds32 = target_to_nds32(target);
 	struct nds32_cache *dcache = &(nds32->memory.dcache);
 	struct nds32_cache *icache = &(nds32->memory.icache);
-	uint32_t dcache_line_size = NDS32_LINE_SIZE_TABLE[dcache->line_size];
-	uint32_t icache_line_size = NDS32_LINE_SIZE_TABLE[icache->line_size];
+	uint32_t dcache_line_size = nds32_line_size_table[dcache->line_size];
+	uint32_t icache_line_size = nds32_line_size_table[icache->line_size];
 	uint32_t cur_address;
 	int result;
 	uint32_t start_line, end_line;
diff --git a/src/target/nds32_cmd.c b/src/target/nds32_cmd.c
index f7647c385..3931707be 100644
--- a/src/target/nds32_cmd.c
+++ b/src/target/nds32_cmd.c
@@ -28,12 +28,12 @@
 extern struct nds32_edm_operation nds32_edm_ops[NDS32_EDM_OPERATION_MAX_NUM];
 extern uint32_t nds32_edm_ops_num;
 
-static const char *const NDS_MEMORY_ACCESS_NAME[] = {
+static const char *const nds_memory_access_name[] = {
 	"BUS",
 	"CPU",
 };
 
-static const char *const NDS_MEMORY_SELECT_NAME[] = {
+static const char *const nds_memory_select_name[] = {
 	"AUTO",
 	"MEM",
 	"ILM",
@@ -84,13 +84,13 @@ COMMAND_HANDLER(handle_nds32_memory_access_command)
 			memory->access_channel = NDS_MEMORY_ACC_CPU;
 
 		LOG_DEBUG("memory access channel is changed to %s",
-				NDS_MEMORY_ACCESS_NAME[memory->access_channel]);
+				nds_memory_access_name[memory->access_channel]);
 
 		aice_memory_access(aice, memory->access_channel);
 	} else {
 		command_print(CMD, "%s: memory access channel: %s",
 				target_name(target),
-				NDS_MEMORY_ACCESS_NAME[memory->access_channel]);
+				nds_memory_access_name[memory->access_channel]);
 	}
 
 	return ERROR_OK;
@@ -147,7 +147,7 @@ COMMAND_HANDLER(handle_nds32_memory_mode_command)
 
 	command_print(CMD, "%s: memory mode: %s",
 			target_name(target),
-			NDS_MEMORY_SELECT_NAME[nds32->memory.mode]);
+			nds_memory_select_name[nds32->memory.mode]);
 
 	return ERROR_OK;
 }
diff --git a/src/target/nds32_insn.h b/src/target/nds32_insn.h
index eb6664517..4e0b2d53b 100644
--- a/src/target/nds32_insn.h
+++ b/src/target/nds32_insn.h
@@ -72,7 +72,7 @@
 #define FMTDR(a, b)				(0x6A000049 | ((a) << 20) | ((b) << 15))
 
 /* break instructions */
-extern const int NDS32_BREAK_16;
-extern const int NDS32_BREAK_32;
+#define NDS32_BREAK_16			(0x00EA)
+#define NDS32_BREAK_32			(0x0A000064)
 
 #endif /* OPENOCD_TARGET_NDS32_INSN_H */