present CM3 Trace agenda
This commit is contained in:
David Brownell
Øyvind Harboe
parent
94fa8fd30a
commit
7ec55eb863
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@ -0,0 +1,68 @@
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+OpenOCD and CoreSight Tracing
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+
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Many recent ARM chips (Using e..g. Cortex-M3 and
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Cortex-M4 cores) support CoreSight debug/trace.
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This note sketches an approach currently planned for those cores
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with OpenOCD.
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This tracing data can help debug and tune ARM software, but not
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all cores support tracing. Some support more extensive tracing
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other cores with trace support +should be able to use the same
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approach and maybe some of the same analysis code.
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+the Cortex-M3 is assumed here to be the
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+core in use, for simplicity and to reflect current OpenOCD users.
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This note summarizes a software model to generate, collect, and
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analyze such trace data . That is not fully implemented as of early
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January 2011, +and thus is not *yet* usable.
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+
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+
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+Some microcontroller cores support a low pin-count Single-wire trace,
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with a mode where +trace data is emitted (usually to a UART. To use
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this mode, +SWD must be in use.
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+At this writing, OpenOCD SWD support is not yet complete either.
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(There are also multi-wire trace ports requiring more complex debug
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adapters than OpenOCD currently supports, and offering richer data.
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+
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+
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+* ENABLING involves activating SWD and (single wire) trace.
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+
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+current expectations are that OpenOCD itself will handle enabling;
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activating single wire trace involves a debug adapter interaction, and
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collecting that trace data requires particular (re)wiring.
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+
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+* CONFIGURATION involves setting up ITM and/or ETM modules to emit the
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+desired data from the Cortex core. (This might include dumping
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+event counters printf-style messages; code profiling; and more. Not all
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+cores offer the same trace capabilities.
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+
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+current expectations are that Tcl scripts will be used to configure these
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+modules for the desired tracing, by direct writes to registers. In some
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+cases (as with RTOS event tracking and similar messaging, this might
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+be augmented or replaced by user code running on the ARM core.
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+
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+COLLECTION involves reading that trace data, probably through UART, and
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+saving it in a useful format to analyse For now, deferred analysis modes
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are assumed, not than real-time or interactive ones.
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+
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+
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+current expectations are to to dump data in text using contrib/itmdump.c
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+or derived tools, and to post-process it into reports. Such reports might
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+include program messaging (such as application data streams via ITM, maybe
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+using printf type messaging; code coverage analysis or so forth. Recent
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+versions of CMSIS software reserve some ITM codespace for RTOS event
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tracing and include ITM messaging support.
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Clearly some of that data would be valuable for interactive debugging.
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+
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+Should someone get ambitious, GUI reports should be possible. GNU tools
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+for simpler reports like gprof may be simpler to support at first.
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+In any case, OpenOCD is not currently GUI-oriented. Accordingly, we now
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+expect any such graphics to come from postprocessing.
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measurments for RTOS event timings should also be easy to collect.
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+Examples include context and message switch times, as well as times
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for application interactions.
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+
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@ -0,0 +1,441 @@
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/*
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* Copyright (C) 2010 by David Brownell
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or (at
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* your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* Simple utility to parse and dump ARM Cortex-M3 SWO trace output. Once the
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* mechanisms work right, this information can be used for various purposes
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* including profiling (particularly easy for flat PC-sample profiles) and
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* for debugging.
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*
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* SWO is the Single Wire Output found on some ARM cores, most notably on the
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* Cortex-M3. It combines data from several sources:
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*
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* - Software trace (ITM): so-called "printf-style" application messaging
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* using "ITM stimulus ports"; and differential timestamps.
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* - Hardware trace (DWT): for profiling counters and comparator matches.
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* - TPIU may issue sync packets.
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*
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* The trace data format is defined in Appendix E, "Debug ITM and DWT packet
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* protocol", of the ARMv7-M Architecture Reference Manual (DDI 0403C). It
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* is a superset of the ITM data format from the Coresight TRM.
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*
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* The trace data has two encodings. The working assumption is that data
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* gets into this program using the UART encoding.
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*/
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#include <errno.h>
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#include <libgen.h>
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#include <stdio.h>
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#include <stdbool.h>
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#include <string.h>
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#include <unistd.h>
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/* Example ITM trace word (0xWWXXYYZZ) parsing for task events, sent
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* on port 31 (Reserved for "the" RTOS in CMSIS v1.30)
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* WWXX: event code (0..3 pre-assigned, 4..15 reserved)
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* YY: task priority
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* ZZ: task number
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*
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* NOTE that this specific encoding could be space-optimized; and that
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* trace data streams could also be history-sensitive.
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*/
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static void show_task(int port, unsigned data)
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{
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unsigned code = data >> 16;
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char buf[16];
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switch (code) {
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case 0:
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strcpy(buf, "run");
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break;
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case 1:
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strcpy(buf, "block");
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break;
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case 2:
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strcpy(buf, "create");
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break;
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case 3:
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strcpy(buf, "destroy");
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break;
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/* 4..15 reserved for other infrastructure ops */
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default:
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sprintf(buf, "code %d", code);
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break;
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}
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printf("TASK %d, pri %d: %s",
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(data >> 0) & 0xff,
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(data >> 8) & 0xff,
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buf);
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}
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static void show_reserved(FILE *f, char *label, int c)
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{
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unsigned i;
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printf("%s - %#02x", label, c);
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for (i = 0; (c & 0x80) && i < 4; i++) {
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c = fgetc(f);
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if (c == EOF) {
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printf("(ERROR %d - %s) ", errno, strerror(errno));
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break;
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}
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printf(" %#02x", c);
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}
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printf("\n");
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}
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static bool read_varlen(FILE *f, int c, unsigned *value)
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{
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unsigned size;
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unsigned char buf[4];
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unsigned i;
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*value = 0;
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switch (c & 3) {
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case 3:
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size = 4;
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break;
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case 2:
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size = 2;
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break;
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case 1:
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size = 1;
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break;
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default:
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printf("INVALID SIZE\n");
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return false;
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}
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memset(buf, 0, sizeof buf);
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if (fread(buf, 1, size, f) != size)
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goto err;
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*value = (buf[3] << 24)
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+ (buf[2] << 16)
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+ (buf[2] << 8)
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+ (buf[0] << 0);
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return true;
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err:
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printf("(ERROR %d - %s)\n", errno, strerror(errno));
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return;
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}
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static void show_hard(FILE *f, int c)
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{
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unsigned type = c >> 3;
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unsigned value;
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unsigned size;
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char *label;
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printf("DWT - ", type);
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if (!read_varlen(f, c, &value))
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return;
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printf("%#x", value);
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switch (type) {
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case 0: /* event counter wrapping */
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printf("overflow %s%s%s%s%s%s",
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(value & (1 << 5)) ? "cyc " : "",
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(value & (1 << 4)) ? "fold " : "",
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(value & (1 << 3)) ? "lsu " : "",
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(value & (1 << 2)) ? "slp " : "",
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(value & (1 << 1)) ? "exc " : "",
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(value & (1 << 0)) ? "cpi " : "");
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break;
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case 1: /* exception tracing */
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switch (value >> 12) {
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case 1:
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label = "entry to";
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break;
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case 2:
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label = "exit from";
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break;
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case 3:
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label = "return to";
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break;
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default:
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label = "?";
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break;
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}
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printf("%s exception %d", label, value & 0x1ff);
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break;
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case 2: /* PC sampling */
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if (c == 0x15)
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printf("PC - sleep");
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else
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printf("PC - %#08x", value);
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break;
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case 8: /* data tracing, pc value */
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case 10:
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case 12:
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case 14:
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printf("Data trace %d, PC %#08x", (c >> 4) & 3, value);
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/* optionally followed by data value */
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break;
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case 9: /* data tracing, address offset */
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case 11:
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case 13:
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case 15:
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printf("Data trace %d, address offset %#04x",
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(c >> 4) & 3, value);
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/* always followed by data value */
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break;
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case 16 ... 23: /* data tracing, data value */
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printf("Data trace %d, ", (c >> 4) & 3);
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label = (c & 0x8) ? "write" : "read";
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switch (c & 3) {
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case 3:
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printf("word %s, value %#08x", label, value);
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break;
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case 2:
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printf("halfword %s, value %#04x", label, value);
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break;
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case 1:
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printf("byte %s, value %#02x", label, value);
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break;
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}
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break;
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default:
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printf("UNDEFINED");
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break;
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}
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printf("\n");
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return;
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}
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/*
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* Table of SWIT (SoftWare InstrumentTation) message dump formats, for
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* ITM port 0..31 application data.
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*
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* Eventually this should be customizable; all usage is application defined.
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*
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* REVISIT there can be up to 256 trace ports, via "ITM Extension" packets
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*/
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struct {
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int port;
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void (*show)(int port, unsigned data);
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} format[] = {
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{ .port = 31, .show = show_task, },
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};
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static void show_swit(FILE *f, int c)
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{
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unsigned size;
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unsigned port = c >> 3;
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unsigned char buf[4];
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unsigned value = 0;
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unsigned i;
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printf("SWIT %u - ", port);
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if (!read_varlen(f, c, &value))
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return;
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printf("%#08x", value);
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for (i = 0; i <= sizeof(format) / sizeof(format[0]); i++) {
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if (format[i].port == port) {
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printf(", ");
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format[i].show(port, value);
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break;
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}
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}
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printf("\n");
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return;
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err:
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printf("(ERROR %d - %s)\n", errno, strerror(errno));
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return;
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}
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static void show_timestamp(FILE *f, int c)
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{
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unsigned counter = 0;
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char *label = "";
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bool delayed = false;
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printf("TIMESTAMP - ");
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/* Format 2: header only */
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if (!(c & 0x80)) {
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switch (c) {
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case 0: /* sync packet -- coding error! */
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case 0x70: /* overflow -- ditto! */
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printf("ERROR - %#02x\n", c);
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break;
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default:
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/* synchronous to ITM */
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counter = c >> 4;
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goto done;
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}
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return;
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}
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/* Format 1: one to four bytes of data too */
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switch (c) {
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default:
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label = ", reserved control\n";
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break;
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case 0xc:
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/* synchronous to ITM */
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break;
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case 0xd:
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label = ", timestamp delayed";
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delayed = true;
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break;
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case 0xe:
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label = ", packet delayed";
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delayed = true;
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break;
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case 0xf:
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label = ", packet and timetamp delayed";
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delayed = true;
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break;
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}
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c = fgetc(f);
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if (c == EOF)
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goto err;
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counter = c & 0x7f;
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if (!(c & 0x80))
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goto done;
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c = fgetc(f);
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if (c == EOF)
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goto err;
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counter |= (c & 0x7f) << 7;
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if (!(c & 0x80))
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goto done;
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c = fgetc(f);
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if (c == EOF)
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goto err;
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counter |= (c & 0x7f) << 14;
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if (!(c & 0x80))
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goto done;
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c = fgetc(f);
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if (c == EOF)
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goto err;
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counter |= (c & 0x7f) << 21;
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done:
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/* REVISIT should we try to convert from delta values? */
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printf("+%u%s\n", counter, label);
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return;
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err:
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printf("(ERROR %d - %s) ", errno, strerror(errno));
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goto done;
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}
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int main(int argc, char **argv)
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{
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FILE *f = stdin;
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int c;
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/* parse arguments */
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while ((c = getopt(argc, argv, "f:")) != EOF) {
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switch (c) {
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case 'f':
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/* e.g. from UART connected to /dev/ttyUSB0 */
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f = fopen(optarg, "r");
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if (!f) {
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perror(optarg);
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return 1;
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}
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break;
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default:
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usage:
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fprintf(stderr, "usage: %s [-f input]",
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basename(argv[0]));
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return 1;
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}
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}
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/* Parse data ... records have a header then data bytes.
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* NOTE: we assume getc() deals in 8-bit bytes.
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*/
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bool overflow = false;
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while ((c = getc(f)) != EOF) {
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/* Sync packet ... 7 zeroes, 0x80 */
|
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if (c == 0) {
|
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int i;
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|
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for (i = 0; i < 6; i++) {
|
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c = fgetc(f);
|
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if (c == EOF)
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break;
|
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if (c != 0)
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goto bad_sync;
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}
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c = fgetc(f);
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if (c == 0x80) {
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printf("SYNC\n");
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continue;
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}
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bad_sync:
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printf("BAD SYNC\n");
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continue;
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}
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|
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/* Overflow packet */
|
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if (c == 0x70) {
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/* REVISIT later, report just what overflowed!
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* Timestamp and SWIT can happen. Non-ITM too?
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*/
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overflow = true;
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printf("OVERFLOW ...\n");
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continue;
|
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}
|
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overflow = false;
|
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|
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switch (c & 0x0f) {
|
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case 0x00: /* Timestamp */
|
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show_timestamp(f, c);
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break;
|
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case 0x04: /* "Reserved" */
|
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show_reserved(f, "RESERVED", c);
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break;
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case 0x08: /* ITM Extension */
|
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/* FIXME someday, handle these ... */
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show_reserved(f, "ITM EXT", c);
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break;
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case 0x0c: /* DWT Extension */
|
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show_reserved(f, "DWT EXT", c);
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break;
|
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default:
|
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if (c & 4)
|
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show_hard(f, c);
|
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else
|
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show_swit(f, c);
|
||||
break;
|
||||
}
|
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|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
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