manual: reorder flash driver info
Put all the individual driver descriptions to where they really belong, fix sectioning etc. Change-Id: I94dc09e9a296ec57db4475f8dfb0a7d62a754aa4 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2770 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
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doc/openocd.texi
394
doc/openocd.texi
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@ -73,7 +73,6 @@ Free Documentation License''.
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* CPU Configuration:: CPU Configuration
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* Flash Commands:: Flash Commands
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* Flash Programming:: Flash Programming
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* NAND Flash Commands:: NAND Flash Commands
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* PLD/FPGA Commands:: PLD/FPGA Commands
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* General Commands:: General Commands
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* Architecture and Core Commands:: Architecture and Core Commands
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@ -4715,6 +4714,26 @@ As noted above, the @command{flash bank} command requires a driver name,
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and allows driver-specific options and behaviors.
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Some drivers also activate driver-specific commands.
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@deffn {Flash Driver} virtual
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This is a special driver that maps a previously defined bank to another
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address. All bank settings will be copied from the master physical bank.
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The @var{virtual} driver defines one mandatory parameters,
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@itemize
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@item @var{master_bank} The bank that this virtual address refers to.
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@end itemize
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So in the following example addresses 0xbfc00000 and 0x9fc00000 refer to
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the flash bank defined at address 0x1fc00000. Any cmds executed on
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the virtual banks are actually performed on the physical banks.
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@example
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flash bank $_FLASHNAME pic32mx 0x1fc00000 0 0 0 $_TARGETNAME
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flash bank vbank0 virtual 0xbfc00000 0 0 0 $_TARGETNAME $_FLASHNAME
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flash bank vbank1 virtual 0x9fc00000 0 0 0 $_TARGETNAME $_FLASHNAME
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@end example
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@end deffn
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@subsection External Flash
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@deffn {Flash Driver} cfi
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@ -4811,6 +4830,19 @@ flash bank $_FLASHNAME stmsmi 0xf8000000 0 0 0 $_TARGETNAME
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@end deffn
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@deffn {Flash Driver} mrvlqspi
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This driver supports QSPI flash controller of Marvell's Wireless
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Microcontroller platform.
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The flash size is autodetected based on the table of known JEDEC IDs
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hardcoded in the OpenOCD sources.
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@example
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flash bank $_FLASHNAME mrvlqspi 0x0 0 0 0 $_TARGETNAME 0x46010000
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@end example
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@end deffn
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@subsection Internal Flash (Microcontrollers)
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@deffn {Flash Driver} aduc702x
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@ -5466,87 +5498,14 @@ The @var{num} parameter is a value shown by @command{flash banks}.
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@end deffn
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@deffn {Flash Driver} tms470
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Most members of the TMS470 microcontroller family from Texas Instruments
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include internal flash and use ARM7TDMI cores.
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This driver doesn't require the chip and bus width to be specified.
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Some tms470-specific commands are defined:
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@deffn Command {tms470 flash_keyset} key0 key1 key2 key3
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Saves programming keys in a register, to enable flash erase and write commands.
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@end deffn
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@deffn Command {tms470 osc_mhz} clock_mhz
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Reports the clock speed, which is used to calculate timings.
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@end deffn
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@deffn Command {tms470 plldis} (0|1)
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Disables (@var{1}) or enables (@var{0}) use of the PLL to speed up
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the flash clock.
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@end deffn
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@end deffn
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@deffn {Flash Driver} virtual
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This is a special driver that maps a previously defined bank to another
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address. All bank settings will be copied from the master physical bank.
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The @var{virtual} driver defines one mandatory parameters,
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@itemize
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@item @var{master_bank} The bank that this virtual address refers to.
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@end itemize
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So in the following example addresses 0xbfc00000 and 0x9fc00000 refer to
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the flash bank defined at address 0x1fc00000. Any cmds executed on
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the virtual banks are actually performed on the physical banks.
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@example
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flash bank $_FLASHNAME pic32mx 0x1fc00000 0 0 0 $_TARGETNAME
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flash bank vbank0 virtual 0xbfc00000 0 0 0 $_TARGETNAME $_FLASHNAME
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flash bank vbank1 virtual 0x9fc00000 0 0 0 $_TARGETNAME $_FLASHNAME
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@end example
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@end deffn
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@deffn {Flash Driver} fm3
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All members of the FM3 microcontroller family from Fujitsu
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include internal flash and use ARM Cortex M3 cores.
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The @var{fm3} driver uses the @var{target} parameter to select the
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correct bank config, it can currently be one of the following:
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@code{mb9bfxx1.cpu}, @code{mb9bfxx2.cpu}, @code{mb9bfxx3.cpu},
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@code{mb9bfxx4.cpu}, @code{mb9bfxx5.cpu} or @code{mb9bfxx6.cpu}.
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@example
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flash bank $_FLASHNAME fm3 0 0 0 0 $_TARGETNAME
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@end example
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@end deffn
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@deffn {Flash Driver} sim3x
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All members of the SiM3 microcontroller family from Silicon Laboratories
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include internal flash and use ARM Cortex M3 cores. It supports both JTAG
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and SWD interface.
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The @var{sim3x} driver tries to probe the device to auto detect the MCU.
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If this failes, it will use the @var{size} parameter as the size of flash bank.
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@example
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flash bank $_FLASHNAME sim3x 0 $_CPUROMSIZE 0 0 $_TARGETNAME
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@end example
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There are 2 commands defined in the @var{sim3x} driver:
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@deffn Command {sim3x mass_erase}
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Erases the complete flash. This is used to unlock the flash.
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And this command is only possible when using the SWD interface.
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@end deffn
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@deffn Command {sim3x lock}
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Lock the flash. To unlock use the @command{sim3x mass_erase} command.
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@end deffn
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@end deffn
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@subsection str9xpec driver
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@deffn {Flash Driver} str9xpec
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@cindex str9xpec
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Only use this driver for locking/unlocking the device or configuring the option bytes.
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Use the standard str9 driver for programming.
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Before using the flash commands the turbo mode must be enabled using the
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@command{str9xpec enable_turbo} command.
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Here is some background info to help
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you better understand how this driver works. OpenOCD has two flash drivers for
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the str9:
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@ -5584,12 +5543,6 @@ When performing a unlock remember that you will not be able to halt the str9 - i
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has been locked. Halting the core is not required for the @option{str9xpec} driver
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as mentioned above, just issue the commands above manually or from a telnet prompt.
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@deffn {Flash Driver} str9xpec
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Only use this driver for locking/unlocking the device or configuring the option bytes.
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Use the standard str9 driver for programming.
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Before using the flash commands the turbo mode must be enabled using the
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@command{str9xpec enable_turbo} command.
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Several str9xpec-specific commands are defined:
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@deffn Command {str9xpec disable_turbo} num
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@ -5640,6 +5593,63 @@ unlock str9 device.
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@end deffn
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@deffn {Flash Driver} tms470
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Most members of the TMS470 microcontroller family from Texas Instruments
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include internal flash and use ARM7TDMI cores.
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This driver doesn't require the chip and bus width to be specified.
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Some tms470-specific commands are defined:
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@deffn Command {tms470 flash_keyset} key0 key1 key2 key3
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Saves programming keys in a register, to enable flash erase and write commands.
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@end deffn
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@deffn Command {tms470 osc_mhz} clock_mhz
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Reports the clock speed, which is used to calculate timings.
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@end deffn
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@deffn Command {tms470 plldis} (0|1)
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Disables (@var{1}) or enables (@var{0}) use of the PLL to speed up
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the flash clock.
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@end deffn
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@end deffn
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@deffn {Flash Driver} fm3
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All members of the FM3 microcontroller family from Fujitsu
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include internal flash and use ARM Cortex M3 cores.
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The @var{fm3} driver uses the @var{target} parameter to select the
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correct bank config, it can currently be one of the following:
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@code{mb9bfxx1.cpu}, @code{mb9bfxx2.cpu}, @code{mb9bfxx3.cpu},
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@code{mb9bfxx4.cpu}, @code{mb9bfxx5.cpu} or @code{mb9bfxx6.cpu}.
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@example
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flash bank $_FLASHNAME fm3 0 0 0 0 $_TARGETNAME
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@end example
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@end deffn
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@deffn {Flash Driver} sim3x
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All members of the SiM3 microcontroller family from Silicon Laboratories
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include internal flash and use ARM Cortex M3 cores. It supports both JTAG
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and SWD interface.
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The @var{sim3x} driver tries to probe the device to auto detect the MCU.
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If this failes, it will use the @var{size} parameter as the size of flash bank.
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@example
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flash bank $_FLASHNAME sim3x 0 $_CPUROMSIZE 0 0 $_TARGETNAME
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@end example
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There are 2 commands defined in the @var{sim3x} driver:
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@deffn Command {sim3x mass_erase}
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Erases the complete flash. This is used to unlock the flash.
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And this command is only possible when using the SWD interface.
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@end deffn
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@deffn Command {sim3x lock}
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Lock the flash. To unlock use the @command{sim3x mass_erase} command.
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@end deffn
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@end deffn
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@deffn {Flash Driver} nrf51
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All members of the nRF51 microcontroller families from Nordic Semiconductor
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include internal flash and use ARM Cortex-M0 core.
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@ -5659,19 +5669,6 @@ code.
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@end deffn
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@deffn {Flash Driver} mrvlqspi
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This driver supports QSPI flash controller of Marvell's Wireless
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Microcontroller platform.
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The flash size is autodetected based on the table of known JEDEC IDs
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hardcoded in the OpenOCD sources.
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@example
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flash bank $_FLASHNAME mrvlqspi 0x0 0 0 0 $_TARGETNAME 0x46010000
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@end example
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@end deffn
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@deffn {Flash Driver} mdr
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This drivers handles the integrated NOR flash on Milandr Cortex-M
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based controllers. A known limitation is that the Info memory can't be
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@ -5700,102 +5697,7 @@ if @{ [info exists IMEMORY] && [string equal $IMEMORY true] @} @{
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@end example
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@end deffn
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@section mFlash
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@subsection mFlash Configuration
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@cindex mFlash Configuration
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@deffn {Config Command} {mflash bank} soc base RST_pin target
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Configures a mflash for @var{soc} host bank at
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address @var{base}.
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The pin number format depends on the host GPIO naming convention.
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Currently, the mflash driver supports s3c2440 and pxa270.
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Example for s3c2440 mflash where @var{RST pin} is GPIO B1:
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@example
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mflash bank $_FLASHNAME s3c2440 0x10000000 1b 0
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@end example
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Example for pxa270 mflash where @var{RST pin} is GPIO 43:
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@example
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mflash bank $_FLASHNAME pxa270 0x08000000 43 0
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@end example
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@end deffn
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@subsection mFlash commands
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@cindex mFlash commands
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@deffn Command {mflash config pll} frequency
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Configure mflash PLL.
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The @var{frequency} is the mflash input frequency, in Hz.
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Issuing this command will erase mflash's whole internal nand and write new pll.
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After this command, mflash needs power-on-reset for normal operation.
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If pll was newly configured, storage and boot(optional) info also need to be update.
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@end deffn
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@deffn Command {mflash config boot}
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Configure bootable option.
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If bootable option is set, mflash offer the first 8 sectors
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(4kB) for boot.
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@end deffn
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@deffn Command {mflash config storage}
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Configure storage information.
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For the normal storage operation, this information must be
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written.
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@end deffn
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@deffn Command {mflash dump} num filename offset size
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Dump @var{size} bytes, starting at @var{offset} bytes from the
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beginning of the bank @var{num}, to the file named @var{filename}.
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@end deffn
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@deffn Command {mflash probe}
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Probe mflash.
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@end deffn
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@deffn Command {mflash write} num filename offset
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Write the binary file @var{filename} to mflash bank @var{num}, starting at
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@var{offset} bytes from the beginning of the bank.
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@end deffn
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@node Flash Programming
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@chapter Flash Programming
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OpenOCD implements numerous ways to program the target flash, whether internal or external.
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Programming can be acheived by either using GDB @ref{programmingusinggdb,,Programming using GDB},
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or using the cmds given in @ref{flashprogrammingcommands,,Flash Programming Commands}.
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@*To simplify using the flash cmds directly a jimtcl script is available that handles the programming and verify stage.
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OpenOCD will program/verify/reset the target and optionally shutdown.
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The script is executed as follows and by default the following actions will be peformed.
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@enumerate
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@item 'init' is executed.
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@item 'reset init' is called to reset and halt the target, any 'reset init' scripts are executed.
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@item @code{flash write_image} is called to erase and write any flash using the filename given.
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@item @code{verify_image} is called if @option{verify} parameter is given.
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@item @code{reset run} is called if @option{reset} parameter is given.
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@item OpenOCD is shutdown if @option{exit} parameter is given.
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@end enumerate
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An example of usage is given below. @xref{program}.
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@example
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# program and verify using elf/hex/s19. verify and reset
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# are optional parameters
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openocd -f board/stm32f3discovery.cfg \
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-c "program filename.elf verify reset exit"
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# binary files need the flash address passing
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openocd -f board/stm32f3discovery.cfg \
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-c "program filename.bin exit 0x08000000"
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@end example
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@node NAND Flash Commands
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@chapter NAND Flash Commands
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@section NAND Flash Commands
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@cindex NAND
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Compared to NOR or SPI flash, NAND devices are inexpensive
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@ -5859,7 +5761,7 @@ Some larger devices will work, since they are actually multi-chip
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modules with two smaller chips and individual chipselect lines.
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@anchor{nandconfiguration}
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@section NAND Configuration Commands
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@subsection NAND Configuration Commands
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@cindex NAND configuration
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NAND chips must be declared in configuration scripts,
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@ -5916,7 +5818,7 @@ You must (successfully) probe a device before you can use
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it with most other NAND commands.
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@end deffn
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@section Erasing, Reading, Writing to NAND Flash
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@subsection Erasing, Reading, Writing to NAND Flash
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@deffn Command {nand dump} num filename offset length [oob_option]
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@cindex NAND reading
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@ -6058,7 +5960,7 @@ hardward-computed ECC before the data is written. This limitation may
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be removed in a future release.
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@end deffn
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@section Other NAND commands
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@subsection Other NAND commands
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@cindex NAND other commands
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@deffn Command {nand check_bad_blocks} num [offset length]
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@ -6102,7 +6004,7 @@ with the wrong ECC data can cause them to be marked as bad.
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@end deffn
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@anchor{nanddriverlist}
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@section NAND Driver List
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@subsection NAND Driver List
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As noted above, the @command{nand device} command allows
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driver-specific options and behaviors.
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Some controllers also activate controller-specific commands.
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@ -6222,6 +6124,100 @@ or @code{read_page} methods, so @command{nand raw_access} won't
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change any behavior.
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@end deffn
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@section mFlash
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@subsection mFlash Configuration
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@cindex mFlash Configuration
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@deffn {Config Command} {mflash bank} soc base RST_pin target
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Configures a mflash for @var{soc} host bank at
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address @var{base}.
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The pin number format depends on the host GPIO naming convention.
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Currently, the mflash driver supports s3c2440 and pxa270.
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Example for s3c2440 mflash where @var{RST pin} is GPIO B1:
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@example
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mflash bank $_FLASHNAME s3c2440 0x10000000 1b 0
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@end example
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Example for pxa270 mflash where @var{RST pin} is GPIO 43:
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@example
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mflash bank $_FLASHNAME pxa270 0x08000000 43 0
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@end example
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@end deffn
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@subsection mFlash commands
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@cindex mFlash commands
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@deffn Command {mflash config pll} frequency
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Configure mflash PLL.
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The @var{frequency} is the mflash input frequency, in Hz.
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Issuing this command will erase mflash's whole internal nand and write new pll.
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After this command, mflash needs power-on-reset for normal operation.
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If pll was newly configured, storage and boot(optional) info also need to be update.
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@end deffn
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@deffn Command {mflash config boot}
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Configure bootable option.
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If bootable option is set, mflash offer the first 8 sectors
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(4kB) for boot.
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@end deffn
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@deffn Command {mflash config storage}
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Configure storage information.
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For the normal storage operation, this information must be
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written.
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@end deffn
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@deffn Command {mflash dump} num filename offset size
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Dump @var{size} bytes, starting at @var{offset} bytes from the
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beginning of the bank @var{num}, to the file named @var{filename}.
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@end deffn
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@deffn Command {mflash probe}
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Probe mflash.
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@end deffn
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@deffn Command {mflash write} num filename offset
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Write the binary file @var{filename} to mflash bank @var{num}, starting at
|
||||
@var{offset} bytes from the beginning of the bank.
|
||||
@end deffn
|
||||
|
||||
@node Flash Programming
|
||||
@chapter Flash Programming
|
||||
|
||||
OpenOCD implements numerous ways to program the target flash, whether internal or external.
|
||||
Programming can be acheived by either using GDB @ref{programmingusinggdb,,Programming using GDB},
|
||||
or using the cmds given in @ref{flashprogrammingcommands,,Flash Programming Commands}.
|
||||
|
||||
@*To simplify using the flash cmds directly a jimtcl script is available that handles the programming and verify stage.
|
||||
OpenOCD will program/verify/reset the target and optionally shutdown.
|
||||
|
||||
The script is executed as follows and by default the following actions will be peformed.
|
||||
@enumerate
|
||||
@item 'init' is executed.
|
||||
@item 'reset init' is called to reset and halt the target, any 'reset init' scripts are executed.
|
||||
@item @code{flash write_image} is called to erase and write any flash using the filename given.
|
||||
@item @code{verify_image} is called if @option{verify} parameter is given.
|
||||
@item @code{reset run} is called if @option{reset} parameter is given.
|
||||
@item OpenOCD is shutdown if @option{exit} parameter is given.
|
||||
@end enumerate
|
||||
|
||||
An example of usage is given below. @xref{program}.
|
||||
|
||||
@example
|
||||
# program and verify using elf/hex/s19. verify and reset
|
||||
# are optional parameters
|
||||
openocd -f board/stm32f3discovery.cfg \
|
||||
-c "program filename.elf verify reset exit"
|
||||
|
||||
# binary files need the flash address passing
|
||||
openocd -f board/stm32f3discovery.cfg \
|
||||
-c "program filename.bin exit 0x08000000"
|
||||
@end example
|
||||
|
||||
@node PLD/FPGA Commands
|
||||
@chapter PLD/FPGA Commands
|
||||
@cindex PLD
|
||||
|
|
|
|||
Loading…
Reference in New Issue