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ADIv5: more messaging cleanup, docs

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When the TAR cache was explicitly invalidated, don't bother
printing it; the actual hardware status is more informative.

Provide some doxygen for the MEM-AP setup routine.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This commit is contained in:
David Brownell 2010-01-31 14:16:53 -08:00
parent 02731cf78b
commit 82f2492138
1 changed files with 20 additions and 12 deletions
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32
src/target/arm_adi_v5.c
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@ -334,7 +334,10 @@ int jtagdp_transaction_endcheck(struct swjdp_common *swjdp)
{ {
uint32_t mem_ap_csw, mem_ap_tar; uint32_t mem_ap_csw, mem_ap_tar;
/* Maybe print information about last MEM-AP access */ /* Maybe print information about last intended
* MEM-AP access; but not if autoincrementing.
* *Real* CSW and TAR values are always shown.
*/
if (swjdp->ap_tar_value != (uint32_t) -1) if (swjdp->ap_tar_value != (uint32_t) -1)
LOG_DEBUG("MEM-AP Cached values: " LOG_DEBUG("MEM-AP Cached values: "
"ap_bank 0x%" PRIx32 "ap_bank 0x%" PRIx32
@ -343,8 +346,6 @@ int jtagdp_transaction_endcheck(struct swjdp_common *swjdp)
swjdp->dp_select_value, swjdp->dp_select_value,
swjdp->ap_csw_value, swjdp->ap_csw_value,
swjdp->ap_tar_value); swjdp->ap_tar_value);
else
LOG_ERROR("Invalid MEM-AP TAR cache!");
if (ctrlstat & SSTICKYORUN) if (ctrlstat & SSTICKYORUN)
LOG_ERROR("JTAG-DP OVERRUN - check clock, " LOG_ERROR("JTAG-DP OVERRUN - check clock, "
@ -463,12 +464,21 @@ int dap_ap_read_reg_u32(struct swjdp_common *swjdp, uint32_t reg_addr, uint32_t
return ERROR_OK; return ERROR_OK;
} }
/*************************************************************************** /**
* * * Set up transfer parameters for the currently selected MEM-AP.
* AHB-AP access to memory and system registers on AHB bus * * Subsequent transfers using registers like AP_REG_DRW or AP_REG_BD2
* * * initiate data reads or writes using memory or peripheral addresses.
***************************************************************************/ * If the CSW is configured for it, the TAR may be automatically
* incremented after each transfer.
*
* @todo Rename to reflect it being specifically a MEM-AP function.
*
* @param swjdp The DAP connected to the MEM-AP.
* @param csw MEM-AP Control/Status Word (CSW) register to assign. If this
* matches the cached value, the register is not changed.
* @param tar MEM-AP Transfer Address Register (TAR) to assign. If this
* matches the cached address, the register is not changed.
*/
int dap_setup_accessport(struct swjdp_common *swjdp, uint32_t csw, uint32_t tar) int dap_setup_accessport(struct swjdp_common *swjdp, uint32_t csw, uint32_t tar)
{ {
csw = csw | CSW_DBGSWENABLE | CSW_MASTER_DEBUG | CSW_HPROT; csw = csw | CSW_DBGSWENABLE | CSW_MASTER_DEBUG | CSW_HPROT;
@ -484,11 +494,9 @@ int dap_setup_accessport(struct swjdp_common *swjdp, uint32_t csw, uint32_t tar)
dap_ap_write_reg_u32(swjdp, AP_REG_TAR, tar); dap_ap_write_reg_u32(swjdp, AP_REG_TAR, tar);
swjdp->ap_tar_value = tar; swjdp->ap_tar_value = tar;
} }
/* Disable TAR cache when autoincrementing */
if (csw & CSW_ADDRINC_MASK) if (csw & CSW_ADDRINC_MASK)
{
/* Do not cache TAR value when autoincrementing */
swjdp->ap_tar_value = -1; swjdp->ap_tar_value = -1;
}
return ERROR_OK; return ERROR_OK;
} }