Nico Coesel <ncoesel@dealogic.nl> MIPS32 speedup patches
git-svn-id: svn://svn.berlios.de/openocd/trunk@1494 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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oharboe
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@ -74,6 +74,7 @@ typedef struct mips32_core_reg_s
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} mips32_core_reg_t;
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#define MIPS32_OP_BEQ 0x04
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#define MIPS32_OP_BNE 0x05
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#define MIPS32_OP_ADDI 0x08
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#define MIPS32_OP_AND 0x24
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#define MIPS32_OP_COP0 0x10
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@ -102,6 +103,7 @@ typedef struct mips32_core_reg_s
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#define MIPS32_AND(reg, off, val) MIPS32_R_INST(0, off, val, reg, 0, MIPS32_OP_AND)
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#define MIPS32_B(off) MIPS32_BEQ(0, 0, off)
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#define MIPS32_BEQ(src,tar,off) MIPS32_I_INST(MIPS32_OP_BEQ, src, tar, off)
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#define MIPS32_BNE(src,tar,off) MIPS32_I_INST(MIPS32_OP_BNE, src, tar, off)
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#define MIPS32_MFC0(gpr, cpr, sel) MIPS32_R_INST(MIPS32_OP_COP0, MIPS32_COP0_MF, gpr, cpr, 0, sel)
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#define MIPS32_MTC0(gpr,cpr, sel) MIPS32_R_INST(MIPS32_OP_COP0, MIPS32_COP0_MT, gpr, cpr, 0, sel)
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#define MIPS32_LBU(reg, off, base) MIPS32_I_INST(MIPS32_OP_LBU, base, reg, off)
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@ -19,6 +19,57 @@
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* Free Software Foundation, Inc., *
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
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***************************************************************************/
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/*
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This version has optimized assembly routines for 32 bit operations:
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- read word
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- write word
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- write array of words
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One thing to be aware of is that the MIPS32 cpu will execute the
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instruction after a branch instruction (one delay slot).
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For example:
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LW $2, ($5 +10)
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B foo
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LW $1, ($2 +100)
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The LW $1, ($2 +100) instruction is also executed. If this is
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not wanted a NOP can be inserted:
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LW $2, ($5 +10)
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B foo
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NOP
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LW $1, ($2 +100)
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or the code can be changed to:
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B foo
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LW $2, ($5 +10)
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LW $1, ($2 +100)
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The original code contained NOPs. I have removed these and moved
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the branches.
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I also moved the PRACC_STACK to 0xFF204000. This allows
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the use of 16 bits offsets to get pointers to the input
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and output area relative to the stack. Note that the stack
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isn't really a stack (the stack pointer is not 'moving')
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but a FIFO simulated in software.
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These changes result in a 35% speed increase when programming an
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external flash.
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More improvement could be gained if the registers do no need
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to be preserved but in that case the routines should be aware
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OpenOCD is used as a flash programmer or as a debug tool.
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Nico Coesel
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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@ -94,7 +145,7 @@ static int mips32_pracc_exec_read(mips32_pracc_context *ctx, u32 address)
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* to start of debug vector */
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data = 0;
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LOG_ERROR("Error reading unexpected address");
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LOG_ERROR("Error reading unexpected address %8.8x", address);
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return ERROR_JTAG_DEVICE_ERROR;
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}
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@ -103,10 +154,15 @@ static int mips32_pracc_exec_read(mips32_pracc_context *ctx, u32 address)
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mips_ejtag_drscan_32(ctx->ejtag_info, &data);
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/* Clear the access pending bit (let the processor eat!) */
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ejtag_ctrl = ejtag_info->ejtag_ctrl & ~EJTAG_CTRL_PRACC;
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mips_ejtag_set_instr(ctx->ejtag_info, EJTAG_INST_CONTROL, NULL);
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mips_ejtag_drscan_32(ctx->ejtag_info, &ejtag_ctrl);
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jtag_add_clocks(5);
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jtag_execute_queue();
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return ERROR_OK;
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}
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@ -115,7 +171,7 @@ static int mips32_pracc_exec_write(mips32_pracc_context *ctx, u32 address)
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u32 ejtag_ctrl,data;
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int offset;
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mips_ejtag_t *ejtag_info = ctx->ejtag_info;
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mips_ejtag_set_instr(ctx->ejtag_info, EJTAG_INST_DATA, NULL);
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mips_ejtag_drscan_32(ctx->ejtag_info, &data);
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@ -123,6 +179,9 @@ static int mips32_pracc_exec_write(mips32_pracc_context *ctx, u32 address)
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ejtag_ctrl = ejtag_info->ejtag_ctrl & ~EJTAG_CTRL_PRACC;
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mips_ejtag_set_instr(ctx->ejtag_info, EJTAG_INST_CONTROL, NULL);
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mips_ejtag_drscan_32(ctx->ejtag_info, &ejtag_ctrl);
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jtag_add_clocks(5);
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jtag_execute_queue();
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if ((address >= MIPS32_PRACC_PARAM_IN)
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&& (address <= MIPS32_PRACC_PARAM_IN + ctx->num_iparam * 4))
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@ -143,7 +202,7 @@ static int mips32_pracc_exec_write(mips32_pracc_context *ctx, u32 address)
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}
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else
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{
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LOG_ERROR("Error writing unexpected address");
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LOG_ERROR("Error writing unexpected address %8.8x", address);
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return ERROR_JTAG_DEVICE_ERROR;
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}
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@ -175,6 +234,8 @@ int mips32_pracc_exec( mips_ejtag_t *ejtag_info, int code_len, u32 *code, int nu
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address = data = 0;
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mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS, NULL);
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mips_ejtag_drscan_32(ejtag_info, &address);
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// printf("Adres: %.8x\n", address);
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/* Check for read or write */
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if (ejtag_ctrl & EJTAG_CTRL_PRNW)
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@ -194,6 +255,7 @@ int mips32_pracc_exec( mips_ejtag_t *ejtag_info, int code_len, u32 *code, int nu
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if ((retval = mips32_pracc_exec_read(&ctx, address)) != ERROR_OK)
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return retval;
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}
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if (cycle == 0)
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@ -309,22 +371,15 @@ int mips32_pracc_read_u32(mips_ejtag_t *ejtag_info, u32 addr, u32 *buf)
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MIPS32_LUI(15,UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */
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MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_STACK)),
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MIPS32_SW(8,0,15), /* sw $8,($15) */
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MIPS32_SW(9,0,15), /* sw $9,($15) */
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MIPS32_LUI(8,UPPER16(MIPS32_PRACC_PARAM_IN)), /* $8 = MIPS32_PRACC_PARAM_IN */
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MIPS32_ORI(8,8,LOWER16(MIPS32_PRACC_PARAM_IN)),
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MIPS32_LW(8,0,8), /* $8=mem[$8]; read addr */
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MIPS32_LUI(9,UPPER16(MIPS32_PRACC_PARAM_OUT)), /* $9=MIPS32_PRACC_PARAM_OUT */
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MIPS32_ORI(9,9,LOWER16(MIPS32_PRACC_PARAM_OUT)),
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MIPS32_LW(8,NEG16(MIPS32_PRACC_STACK-MIPS32_PRACC_PARAM_IN), 15), //load R8 @ param_in[0] = address
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MIPS32_LW(8,0,8), /* lw $8,0($8), Load $8 with the word @mem[$8] */
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MIPS32_SW(8,0,9), /* sw $8,0($9) */
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MIPS32_SW(8,NEG16(MIPS32_PRACC_STACK-MIPS32_PRACC_PARAM_OUT),15), /* sw $8,0($9) */
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MIPS32_LW(9,0,15), /* lw $9,($15) */
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MIPS32_LW(8,0,15), /* lw $8,($15) */
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MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
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MIPS32_NOP,
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MIPS32_B(NEG16(17)), /* b start */
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MIPS32_B(NEG16(9)), //was 17 /* b start */
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MIPS32_MFC0(15,31,0), //this instruction will be executed (MIPS executes instruction after jump) /* move COP0 DeSave to $15 */
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MIPS32_NOP,
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};
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@ -520,6 +575,8 @@ int mips32_pracc_write_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int cou
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int mips32_pracc_write_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 *buf)
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{
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//NC: use destination pointer as loop counter (last address is in $10)
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u32 code[] = {
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/* start: */
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MIPS32_MTC0(15,31,0), /* move $15 to COP0 DeSave */
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@ -530,41 +587,33 @@ int mips32_pracc_write_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32
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MIPS32_SW(10,0,15), /* sw $10,($15) */
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MIPS32_SW(11,0,15), /* sw $11,($15) */
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MIPS32_LUI(8,UPPER16(MIPS32_PRACC_PARAM_IN)), /* $8 = MIPS32_PRACC_PARAM_IN */
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MIPS32_ORI(8,8,LOWER16(MIPS32_PRACC_PARAM_IN)),
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MIPS32_ADDI(8,15,NEG16(MIPS32_PRACC_STACK-MIPS32_PRACC_PARAM_IN)), //$8= MIPS32_PRACC_PARAM_IN
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MIPS32_LW(9,0,8), /* Load write addr to $9 */
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MIPS32_LW(10,4,8), /* Load write count to $10 */
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MIPS32_ADDI(8,8,8), /* $8+=8 */
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MIPS32_NOP,
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/* loop: */
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MIPS32_BEQ(0,10,9), /* beq $0, $10, end */
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MIPS32_NOP,
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MIPS32_LW(10,4,8), //last address /* Load write count to $10 */
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MIPS32_ADDI(8,8,8), // $8+=8 beginning of data
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//loop:
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MIPS32_LW(11,0,8), /* lw $11,0($8), Load $11 with the word @mem[$8] */
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MIPS32_SW(11,0,9), /* sw $11,0($9) */
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MIPS32_ADDI(10,10,NEG16(1)), /* $10-- */
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MIPS32_ADDI(9,9,4), /* $9+=4 */
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MIPS32_ADDI(8,8,4), /* $8+=4 */
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MIPS32_NOP,
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MIPS32_B(NEG16(9)), /* b loop */
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MIPS32_NOP,
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MIPS32_BNE(10,9,NEG16(4)), //was 9 BNE $10, 9, loop /* b loop */
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MIPS32_ADDI(8,8,4), //this instruction is part of the loop (one delay slot)! /* $8+=4 */
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/* end: */
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MIPS32_LW(11,0,15), /* lw $11,($15) */
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MIPS32_LW(10,0,15), /* lw $10,($15) */
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MIPS32_LW(9,0,15), /* lw $9,($15) */
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MIPS32_LW(8,0,15), /* lw $8,($15) */
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MIPS32_B(NEG16(21)), //was 30 /* b start */
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MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
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MIPS32_NOP,
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MIPS32_B(NEG16(30)), /* b start */
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MIPS32_NOP,
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MIPS32_NOP, //this one will not be executed
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};
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/* TODO remove array */
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u32 param_in[count+2];
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param_in[0] = addr;
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param_in[1] = count;
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param_in[1] = addr + count * sizeof(u32); //last address
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memcpy(¶m_in[2], buf, count * sizeof(u32));
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mips32_pracc_exec(ejtag_info, sizeof(code)/sizeof(code[0]), code, \
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@ -582,19 +631,16 @@ int mips32_pracc_write_u32(mips_ejtag_t *ejtag_info, u32 addr, u32 *buf)
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MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_STACK)),
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MIPS32_SW(8,0,15), /* sw $8,($15) */
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MIPS32_SW(9,0,15), /* sw $9,($15) */
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MIPS32_LW(8,NEG16((MIPS32_PRACC_STACK-MIPS32_PRACC_PARAM_IN)-4), 15), //load R8 @ param_in[1] = data
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MIPS32_LW(9,NEG16(MIPS32_PRACC_STACK-MIPS32_PRACC_PARAM_IN), 15), //load R9 @ param_in[0] = address
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MIPS32_LUI(8,UPPER16((MIPS32_PRACC_PARAM_IN+4))), /* $8 = MIPS32_PRACC_PARAM_IN+4 */
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MIPS32_ORI(8,8,LOWER16((MIPS32_PRACC_PARAM_IN+4))),
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MIPS32_LW(9,NEG16(4),8), /* Load write addr to $9 */
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MIPS32_LW(8,0,8), /* lw $8,0($8), Load $8 with the word @mem[$8] */
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MIPS32_SW(8,0,9), /* sw $8,0($9) */
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MIPS32_LW(9,0,15), /* lw $9,($15) */
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MIPS32_LW(8,0,15), /* lw $8,($15) */
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MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
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MIPS32_NOP,
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MIPS32_B(NEG16(15)), /* b start */
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MIPS32_B(NEG16(11)), /* b start */
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MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
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MIPS32_NOP,
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};
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@ -25,7 +25,8 @@
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#include "mips_ejtag.h"
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#define MIPS32_PRACC_TEXT 0xFF200200
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#define MIPS32_PRACC_STACK 0xFF2FFFFC
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//#define MIPS32_PRACC_STACK 0xFF2FFFFC
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#define MIPS32_PRACC_STACK 0xFF204000
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#define MIPS32_PRACC_PARAM_IN 0xFF201000
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#define MIPS32_PRACC_PARAM_IN_SIZE 0x1000
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#define MIPS32_PRACC_PARAM_OUT (MIPS32_PRACC_PARAM_IN + MIPS32_PRACC_PARAM_IN_SIZE)
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