- corrected str91x bank1 programming issues
- str91x protect_check fixed - bank number now correctly given to str91x flash_config command git-svn-id: svn://svn.berlios.de/openocd/trunk@211 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
ntfreak
parent
e27696f6b0
commit
89d0e422c9
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@ -36,7 +36,7 @@
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#include <string.h>
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#include <unistd.h>
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str9x_mem_layout_t mem_layout_str9[] = {
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str9x_mem_layout_t mem_layout_str9bank0[] = {
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{0x00000000, 0x10000, 0x01},
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{0x00010000, 0x10000, 0x02},
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{0x00020000, 0x10000, 0x04},
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@ -45,12 +45,17 @@ str9x_mem_layout_t mem_layout_str9[] = {
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{0x00050000, 0x10000, 0x20},
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{0x00060000, 0x10000, 0x40},
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{0x00070000, 0x10000, 0x80},
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{0x00080000, 0x02000, 0x100},
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{0x00082000, 0x02000, 0x200},
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{0x00084000, 0x02000, 0x400},
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{0x00086000, 0x02000, 0x800}
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};
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str9x_mem_layout_t mem_layout_str9bank1[] = {
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{0x00000000, 0x02000, 0x100},
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{0x00002000, 0x02000, 0x200},
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{0x00004000, 0x02000, 0x400},
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{0x00006000, 0x02000, 0x800}
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};
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static u32 bank1start = 0x00080000;
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int str9x_register_commands(struct command_context_s *cmd_ctx);
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int str9x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
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int str9x_erase(struct flash_bank_s *bank, int first, int last);
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@ -93,22 +98,27 @@ int str9x_build_block_list(struct flash_bank_s *bank)
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str9x_flash_bank_t *str9x_info = bank->driver_priv;
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int i;
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int num_sectors = 0, b0_sectors = 0;
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int num_sectors = 0;
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int b0_sectors = 0, b1_sectors = 0;
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switch (bank->size)
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{
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case 256 * 1024:
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case (256 * 1024):
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b0_sectors = 4;
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break;
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case 512 * 1024:
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case (512 * 1024):
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b0_sectors = 8;
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break;
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case (32 * 1024):
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b1_sectors = 4;
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bank1start = bank->base;
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break;
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default:
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ERROR("BUG: unknown bank->size encountered");
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exit(-1);
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}
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num_sectors = b0_sectors + 4;
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num_sectors = b0_sectors + b1_sectors;
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bank->num_sectors = num_sectors;
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bank->sectors = malloc(sizeof(flash_sector_t) * num_sectors);
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@ -118,20 +128,20 @@ int str9x_build_block_list(struct flash_bank_s *bank)
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for (i = 0; i < b0_sectors; i++)
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{
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bank->sectors[num_sectors].offset = mem_layout_str9[i].sector_start;
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bank->sectors[num_sectors].size = mem_layout_str9[i].sector_size;
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bank->sectors[num_sectors].offset = mem_layout_str9bank0[i].sector_start;
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bank->sectors[num_sectors].size = mem_layout_str9bank0[i].sector_size;
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bank->sectors[num_sectors].is_erased = -1;
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bank->sectors[num_sectors].is_protected = 1;
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str9x_info->sector_bits[num_sectors++] = mem_layout_str9[i].sector_bit;
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str9x_info->sector_bits[num_sectors++] = mem_layout_str9bank0[i].sector_bit;
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}
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for (i = 8; i < 12; i++)
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for (i = 0; i < b1_sectors; i++)
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{
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bank->sectors[num_sectors].offset = mem_layout_str9[i].sector_start;
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bank->sectors[num_sectors].size = mem_layout_str9[i].sector_size;
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bank->sectors[num_sectors].offset = mem_layout_str9bank1[i].sector_start;
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bank->sectors[num_sectors].size = mem_layout_str9bank1[i].sector_size;
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bank->sectors[num_sectors].is_erased = -1;
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bank->sectors[num_sectors].is_protected = 1;
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str9x_info->sector_bits[num_sectors++] = mem_layout_str9[i].sector_bit;
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str9x_info->sector_bits[num_sectors++] = mem_layout_str9bank1[i].sector_bit;
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}
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return ERROR_OK;
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@ -152,12 +162,6 @@ int str9x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char
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str9x_info = malloc(sizeof(str9x_flash_bank_t));
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bank->driver_priv = str9x_info;
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if (bank->base != 0x00000000)
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{
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WARNING("overriding flash base address for STR91x device with 0x00000000");
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bank->base = 0x00000000;
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}
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str9x_build_block_list(bank);
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str9x_info->write_algorithm = NULL;
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@ -219,11 +223,11 @@ int str9x_protect_check(struct flash_bank_s *bank)
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/* read level one protection */
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adr = mem_layout_str9[10].sector_start + 4;
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adr = bank1start + 0x10;
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target_write_u32(target, adr, 0x90);
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target_write_u16(target, adr, 0x90);
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target_read_u16(target, adr, &status);
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target_write_u32(target, adr, 0xFF);
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target_write_u16(target, adr, 0xFF);
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for (i = 0; i < bank->num_sectors; i++)
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{
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@ -250,7 +254,7 @@ int str9x_erase(struct flash_bank_s *bank, int first, int last)
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for (i = first; i <= last; i++)
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{
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adr = bank->sectors[i].offset;
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adr = bank->base + bank->sectors[i].offset;
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/* erase sectors */
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target_write_u16(target, adr, 0x20);
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@ -301,7 +305,7 @@ int str9x_protect(struct flash_bank_s *bank, int set, int first, int last)
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{
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/* Level One Protection */
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adr = bank->sectors[i].offset;
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adr = bank->base + bank->sectors[i].offset;
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target_write_u16(target, adr, 0x60);
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if( set )
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@ -593,14 +597,21 @@ int str9x_handle_flash_config_command(struct command_context_s *cmd_ctx, char *c
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flash_bank_t *bank;
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target_t *target = NULL;
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if (argc < 4)
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if (argc < 5)
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{
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command_print(cmd_ctx, "usage: str9x flash_config <b0size> <b1size> <b0start> <b1start>");
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command_print(cmd_ctx, "usage: str9x flash_config <bank> <bbsize> <nbsize> <bbstart> <nbstart>");
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return ERROR_OK;
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}
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bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
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if (!bank)
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{
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command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
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return ERROR_OK;
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}
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bank = get_flash_bank_by_num(0);
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str9x_info = bank->driver_priv;
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target = bank->target;
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if (bank->target->state != TARGET_HALTED)
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@ -609,12 +620,12 @@ int str9x_handle_flash_config_command(struct command_context_s *cmd_ctx, char *c
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}
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/* config flash controller */
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target_write_u32(target, FLASH_BBSR, strtoul(args[0], NULL, 0));
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target_write_u32(target, FLASH_NBBSR, strtoul(args[1], NULL, 0));
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target_write_u32(target, FLASH_BBADR, (strtoul(args[2], NULL, 0) >> 2));
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target_write_u32(target, FLASH_NBBADR, (strtoul(args[3], NULL, 0) >> 2));
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target_write_u32(target, FLASH_BBSR, strtoul(args[1], NULL, 0));
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target_write_u32(target, FLASH_NBBSR, strtoul(args[2], NULL, 0));
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target_write_u32(target, FLASH_BBADR, (strtoul(args[3], NULL, 0) >> 2));
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target_write_u32(target, FLASH_NBBADR, (strtoul(args[4], NULL, 0) >> 2));
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/* set b18 instruction TCM order as per flash programming manual */
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/* set bit 18 instruction TCM order as per flash programming manual */
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arm966e_write_cp15(target, 62, 0x40000);
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/* enable flash bank 1 */
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@ -45,25 +45,6 @@ enum str9x_status_codes
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STR9X_BUSY = 11
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};
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/* FMI sectors */
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#define FMI_BANK_0 (0x5400000C << 2) /* FMI Bank 0 */
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#define FMI_BANK_1 (0x54000010 << 2) /* FMI Bank 1 */
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#define FMI_B0S0 (0x00000000 + FMI_BANK_0) /* Bank 0 sector 0 */
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#define FMI_B0S1 (0x00010000 + FMI_BANK_0) /* Bank 0 sector 1 */
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#define FMI_B0S2 (0x00020000 + FMI_BANK_0) /* Bank 0 sector 2 */
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#define FMI_B0S3 (0x00030000 + FMI_BANK_0) /* Bank 0 sector 3 */
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#define FMI_B0S4 (0x00040000 + FMI_BANK_0) /* Bank 0 sector 4 */
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#define FMI_B0S5 (0x00050000 + FMI_BANK_0) /* Bank 0 sector 5 */
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#define FMI_B0S6 (0x00060000 + FMI_BANK_0) /* Bank 0 sector 6 */
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#define FMI_B0S7 (0x00070000 + FMI_BANK_0) /* Bank 0 sector 7 */
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#define FMI_B1S0 (0x00000000 + FMI_BANK_1) /* Bank 1 sector 0 */
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#define FMI_B1S1 (0x00002000 + FMI_BANK_1) /* Bank 1 sector 1 */
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#define FMI_B1S2 (0x00004000 + FMI_BANK_1) /* Bank 1 sector 2 */
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#define FMI_B1S3 (0x00006000 + FMI_BANK_1) /* Bank 1 sector 3 */
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/* Flash registers */
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#define FLASH_BBSR 0x54000000 /* Boot Bank Size Register */
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@ -125,6 +125,12 @@ int str9xpec_register_commands(struct command_context_s *cmd_ctx)
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int str9xpec_set_instr(int chain_pos, u32 new_instr, enum tap_state end_state)
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{
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jtag_device_t *device = jtag_get_device(chain_pos);
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if (device == NULL)
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{
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DEBUG("Invalid Target");
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return ERROR_TARGET_INVALID;
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}
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if (buf_get_u32(device->cur_instr, 0, device->ir_length) != new_instr)
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{
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@ -154,7 +160,8 @@ u8 str9xpec_isc_status(int chain_pos)
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scan_field_t field;
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u8 status;
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str9xpec_set_instr(chain_pos, ISC_NOOP, TAP_PI);
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if (str9xpec_set_instr(chain_pos, ISC_NOOP, TAP_PI) != ERROR_OK)
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return ISC_STATUS_ERROR;
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field.device = chain_pos;
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field.num_bits = 8;
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@ -189,7 +196,8 @@ int str9xpec_isc_enable(struct flash_bank_s *bank)
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return ERROR_OK;
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/* enter isc mode */
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str9xpec_set_instr(chain_pos, ISC_ENABLE, TAP_RTI);
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if (str9xpec_set_instr(chain_pos, ISC_ENABLE, TAP_RTI) != ERROR_OK)
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return ERROR_TARGET_INVALID;
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/* check ISC status */
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status = str9xpec_isc_status(chain_pos);
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@ -214,7 +222,8 @@ int str9xpec_isc_disable(struct flash_bank_s *bank)
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if (!str9xpec_info->isc_enable)
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return ERROR_OK;
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str9xpec_set_instr(chain_pos, ISC_DISABLE, TAP_RTI);
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if (str9xpec_set_instr(chain_pos, ISC_DISABLE, TAP_RTI) != ERROR_OK)
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return ERROR_TARGET_INVALID;
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/* delay to handle aborts */
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jtag_add_sleep(50);
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@ -273,10 +282,10 @@ int str9xpec_build_block_list(struct flash_bank_s *bank)
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switch (bank->size)
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{
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case 256 * 1024:
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case (256 * 1024):
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b0_sectors = 4;
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break;
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case 512 * 1024:
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case (512 * 1024):
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b0_sectors = 8;
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break;
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default:
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@ -284,7 +293,9 @@ int str9xpec_build_block_list(struct flash_bank_s *bank)
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exit(-1);
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}
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/* include bank 1 sectors */
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num_sectors = b0_sectors + 4;
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bank->size += (32 * 1024);
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bank->num_sectors = num_sectors;
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bank->sectors = malloc(sizeof(flash_sector_t) * num_sectors);
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@ -1327,6 +1338,7 @@ int str9xpec_handle_flash_disable_turbo_command(struct command_context_s *cmd_ct
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if( str9xpec_info->devarm ) {
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dev0->next = str9xpec_info->devarm;
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jtag_num_devices++;
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str9xpec_info->devarm = NULL;
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}
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return ERROR_OK;
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