cortex_m: use unsigned int for FPB and DWT quantifiers
related quantifiers are: - fp_num_lit - fp_num_code - dwt_num_comp - dwt_comp_available Change-Id: I07dec2d4aa21bc0e580be0d9fd0a6809f876c2a8 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/6185 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
This commit is contained in:
Tarek BOCHKATI
Tomas Vanek
parent
a115b589a7
commit
8ecc2888cf
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@ -285,7 +285,6 @@ static int cortex_m_enable_fpb(struct target *target)
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static int cortex_m_endreset_event(struct target *target)
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{
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int i;
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int retval;
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uint32_t dcb_demcr;
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struct cortex_m_common *cortex_m = target_to_cm(target);
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@ -343,14 +342,14 @@ static int cortex_m_endreset_event(struct target *target)
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cortex_m->fpb_enabled = true;
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/* Restore FPB registers */
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for (i = 0; i < cortex_m->fp_num_code + cortex_m->fp_num_lit; i++) {
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for (unsigned int i = 0; i < cortex_m->fp_num_code + cortex_m->fp_num_lit; i++) {
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retval = target_write_u32(target, fp_list[i].fpcr_address, fp_list[i].fpcr_value);
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if (retval != ERROR_OK)
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return retval;
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}
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/* Restore DWT registers */
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for (i = 0; i < cortex_m->dwt_num_comp; i++) {
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for (unsigned int i = 0; i < cortex_m->dwt_num_comp; i++) {
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retval = target_write_u32(target, dwt_list[i].dwt_comparator_address + 0,
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dwt_list[i].comp);
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if (retval != ERROR_OK)
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@ -1266,7 +1265,7 @@ static int cortex_m_deassert_reset(struct target *target)
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int cortex_m_set_breakpoint(struct target *target, struct breakpoint *breakpoint)
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{
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int retval;
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int fp_num = 0;
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unsigned int fp_num = 0;
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struct cortex_m_common *cortex_m = target_to_cm(target);
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struct cortex_m_fp_comparator *comparator_list = cortex_m->fp_comparator_list;
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@ -1353,7 +1352,7 @@ int cortex_m_unset_breakpoint(struct target *target, struct breakpoint *breakpoi
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struct cortex_m_common *cortex_m = target_to_cm(target);
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struct cortex_m_fp_comparator *comparator_list = cortex_m->fp_comparator_list;
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if (!breakpoint->set) {
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if (breakpoint->set <= 0) {
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LOG_WARNING("breakpoint not set");
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return ERROR_OK;
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}
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@ -1366,8 +1365,8 @@ int cortex_m_unset_breakpoint(struct target *target, struct breakpoint *breakpoi
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breakpoint->set);
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if (breakpoint->type == BKPT_HARD) {
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int fp_num = breakpoint->set - 1;
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if ((fp_num < 0) || (fp_num >= cortex_m->fp_num_code)) {
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unsigned int fp_num = breakpoint->set - 1;
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if (fp_num >= cortex_m->fp_num_code) {
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LOG_DEBUG("Invalid FP Comparator number in breakpoint");
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return ERROR_OK;
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}
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@ -1413,7 +1412,7 @@ int cortex_m_remove_breakpoint(struct target *target, struct breakpoint *breakpo
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static int cortex_m_set_watchpoint(struct target *target, struct watchpoint *watchpoint)
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{
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int dwt_num = 0;
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unsigned int dwt_num = 0;
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struct cortex_m_common *cortex_m = target_to_cm(target);
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/* REVISIT Don't fully trust these "not used" records ... users
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@ -1498,21 +1497,20 @@ static int cortex_m_unset_watchpoint(struct target *target, struct watchpoint *w
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{
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struct cortex_m_common *cortex_m = target_to_cm(target);
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struct cortex_m_dwt_comparator *comparator;
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int dwt_num;
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if (!watchpoint->set) {
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if (watchpoint->set <= 0) {
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LOG_WARNING("watchpoint (wpid: %d) not set",
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watchpoint->unique_id);
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return ERROR_OK;
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}
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dwt_num = watchpoint->set - 1;
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unsigned int dwt_num = watchpoint->set - 1;
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LOG_DEBUG("Watchpoint (ID %d) DWT%d address: 0x%08x clear",
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watchpoint->unique_id, dwt_num,
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(unsigned) watchpoint->address);
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if ((dwt_num < 0) || (dwt_num >= cortex_m->dwt_num_comp)) {
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if (dwt_num >= cortex_m->dwt_num_comp) {
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LOG_DEBUG("Invalid DWT Comparator number in watchpoint");
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return ERROR_OK;
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}
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@ -1851,7 +1849,7 @@ static void cortex_m_dwt_setup(struct cortex_m_common *cm, struct target *target
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uint32_t dwtcr;
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struct reg_cache *cache;
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struct cortex_m_dwt_comparator *comparator;
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int reg, i;
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int reg;
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target_read_u32(target, DWT_CTRL, &dwtcr);
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LOG_DEBUG("DWT_CTRL: 0x%" PRIx32, dwtcr);
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@ -1893,7 +1891,7 @@ fail1:
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dwt_base_regs + reg);
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comparator = cm->dwt_comparator_list;
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for (i = 0; i < cm->dwt_num_comp; i++, comparator++) {
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for (unsigned int i = 0; i < cm->dwt_num_comp; i++, comparator++) {
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int j;
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comparator->dwt_comparator_address = DWT_COMP0 + 0x10 * i;
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@ -1964,7 +1962,6 @@ int cortex_m_examine(struct target *target)
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{
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int retval;
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uint32_t cpuid, fpcr, mvfr0, mvfr1;
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int i;
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struct cortex_m_common *cortex_m = target_to_cm(target);
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struct adiv5_dap *swjdp = cortex_m->armv7m.arm.dap;
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struct armv7m_common *armv7m = target_to_armv7m(target);
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@ -2000,23 +1997,23 @@ int cortex_m_examine(struct target *target)
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return retval;
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/* Get CPU Type */
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i = (cpuid >> 4) & 0xf;
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unsigned int core = (cpuid >> 4) & 0xf;
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/* Check if it is an ARMv8-M core */
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armv7m->arm.is_armv8m = true;
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switch (cpuid & ARM_CPUID_PARTNO_MASK) {
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case CORTEX_M23_PARTNO:
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i = 23;
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core = 23;
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break;
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case CORTEX_M33_PARTNO:
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i = 33;
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core = 33;
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break;
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case CORTEX_M35P_PARTNO:
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i = 35;
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core = 35;
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break;
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case CORTEX_M55_PARTNO:
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i = 55;
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core = 55;
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break;
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default:
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armv7m->arm.is_armv8m = false;
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@ -2025,9 +2022,9 @@ int cortex_m_examine(struct target *target)
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LOG_DEBUG("Cortex-M%d r%" PRId8 "p%" PRId8 " processor detected",
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i, (uint8_t)((cpuid >> 20) & 0xf), (uint8_t)((cpuid >> 0) & 0xf));
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core, (uint8_t)((cpuid >> 20) & 0xf), (uint8_t)((cpuid >> 0) & 0xf));
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cortex_m->maskints_erratum = false;
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if (i == 7) {
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if (core == 7) {
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uint8_t rev, patch;
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rev = (cpuid >> 20) & 0xf;
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patch = (cpuid >> 0) & 0xf;
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@ -2041,28 +2038,28 @@ int cortex_m_examine(struct target *target)
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/* VECTRESET is supported only on ARMv7-M cores */
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cortex_m->vectreset_supported = !armv7m->arm.is_armv8m && !armv7m->arm.is_armv6m;
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if (i == 4) {
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if (core == 4) {
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target_read_u32(target, MVFR0, &mvfr0);
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target_read_u32(target, MVFR1, &mvfr1);
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/* test for floating point feature on Cortex-M4 */
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if ((mvfr0 == MVFR0_DEFAULT_M4) && (mvfr1 == MVFR1_DEFAULT_M4)) {
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LOG_DEBUG("Cortex-M%d floating point feature FPv4_SP found", i);
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LOG_DEBUG("Cortex-M%d floating point feature FPv4_SP found", core);
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armv7m->fp_feature = FPV4_SP;
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}
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} else if (i == 7 || i == 33 || i == 35 || i == 55) {
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} else if (core == 7 || core == 33 || core == 35 || core == 55) {
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target_read_u32(target, MVFR0, &mvfr0);
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target_read_u32(target, MVFR1, &mvfr1);
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/* test for floating point features on Cortex-M7 */
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if ((mvfr0 == MVFR0_DEFAULT_M7_SP) && (mvfr1 == MVFR1_DEFAULT_M7_SP)) {
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LOG_DEBUG("Cortex-M%d floating point feature FPv5_SP found", i);
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LOG_DEBUG("Cortex-M%d floating point feature FPv5_SP found", core);
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armv7m->fp_feature = FPV5_SP;
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} else if ((mvfr0 == MVFR0_DEFAULT_M7_DP) && (mvfr1 == MVFR1_DEFAULT_M7_DP)) {
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LOG_DEBUG("Cortex-M%d floating point feature FPv5_DP found", i);
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LOG_DEBUG("Cortex-M%d floating point feature FPv5_DP found", core);
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armv7m->fp_feature = FPV5_DP;
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}
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} else if (i == 0) {
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} else if (core == 0) {
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/* Cortex-M0 does not support unaligned memory access */
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armv7m->arm.is_armv6m = true;
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}
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@ -2074,11 +2071,11 @@ int cortex_m_examine(struct target *target)
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if (!armv7m->stlink) {
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if (i == 3 || i == 4)
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if (core == 3 || core == 4)
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/* Cortex-M3/M4 have 4096 bytes autoincrement range,
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* s. ARM IHI 0031C: MEM-AP 7.2.2 */
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armv7m->debug_ap->tar_autoincr_block = (1 << 12);
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else if (i == 7)
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else if (core == 7)
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/* Cortex-M7 has only 1024 bytes autoincrement range */
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armv7m->debug_ap->tar_autoincr_block = (1 << 10);
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}
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@ -2119,7 +2116,7 @@ int cortex_m_examine(struct target *target)
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cortex_m->fp_num_code + cortex_m->fp_num_lit,
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sizeof(struct cortex_m_fp_comparator));
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cortex_m->fpb_enabled = fpcr & 1;
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for (i = 0; i < cortex_m->fp_num_code + cortex_m->fp_num_lit; i++) {
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for (unsigned int i = 0; i < cortex_m->fp_num_code + cortex_m->fp_num_lit; i++) {
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cortex_m->fp_comparator_list[i].type =
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(i < cortex_m->fp_num_code) ? FPCR_CODE : FPCR_LITERAL;
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cortex_m->fp_comparator_list[i].fpcr_address = FP_COMP0 + 4 * i;
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@ -196,15 +196,15 @@ struct cortex_m_common {
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uint32_t nvic_icsr; /* Interrupt Control State Register - shows active and pending IRQ */
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/* Flash Patch and Breakpoint (FPB) */
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int fp_num_lit;
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int fp_num_code;
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unsigned int fp_num_lit;
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unsigned int fp_num_code;
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int fp_rev;
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bool fpb_enabled;
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struct cortex_m_fp_comparator *fp_comparator_list;
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/* Data Watchpoint and Trace (DWT) */
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int dwt_num_comp;
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int dwt_comp_available;
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unsigned int dwt_num_comp;
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unsigned int dwt_comp_available;
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uint32_t dwt_devarch;
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struct cortex_m_dwt_comparator *dwt_comparator_list;
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struct reg_cache *dwt_cache;
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