cosmetic fixes to debug output + phasing out printf() in favour of logging system. From Pavel Chromy <chromy@asix.cz>
git-svn-id: svn://svn.berlios.de/openocd/trunk@326 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
oharboe
parent
885ae471ad
commit
958f845f4b
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@ -1,179 +1,179 @@
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/* src/flash/s3c2440_nand.c
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*
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* S3C2440 OpenOCD NAND Flash controller support.
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*
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* Copyright 2007,2008 Ben Dooks <ben@fluff.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* Many thanks to Simtec Electronics for sponsoring this work.
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include "replacements.h"
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#include "log.h"
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#include <stdlib.h>
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#include <string.h>
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#include "nand.h"
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#include "s3c24xx_nand.h"
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#include "target.h"
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int s3c2440_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device);
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int s3c2440_init(struct nand_device_s *device);
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int s3c2440_nand_ready(struct nand_device_s *device, int timeout);
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nand_flash_controller_t s3c2440_nand_controller =
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{
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.name = "s3c2440",
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.nand_device_command = s3c2440_nand_device_command,
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.register_commands = s3c24xx_register_commands,
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.init = s3c2440_init,
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.reset = s3c24xx_reset,
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.command = s3c24xx_command,
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.address = s3c24xx_address,
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.write_data = s3c24xx_write_data,
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.read_data = s3c24xx_read_data,
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.write_page = s3c24xx_write_page,
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.read_page = s3c24xx_read_page,
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.write_block_data = s3c2440_write_block_data,
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.read_block_data = s3c2440_read_block_data,
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.controller_ready = s3c24xx_controller_ready,
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.nand_ready = s3c2440_nand_ready,
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};
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int s3c2440_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
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char **args, int argc,
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struct nand_device_s *device)
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{
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s3c24xx_nand_controller_t *info;
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info = s3c24xx_nand_device_command(cmd_ctx, cmd, args, argc, device);
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if (info == NULL) {
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return ERROR_NAND_DEVICE_INVALID;
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}
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/* fill in the address fields for the core device */
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info->cmd = S3C2440_NFCMD;
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info->addr = S3C2440_NFADDR;
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info->data = S3C2440_NFDATA;
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info->nfstat = S3C2440_NFSTAT;
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return ERROR_OK;
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}
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int s3c2440_init(struct nand_device_s *device)
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{
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s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
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target_t *target = s3c24xx_info->target;
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u32 version;
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target_write_u32(target, S3C2410_NFCONF,
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S3C2440_NFCONF_TACLS(3) |
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S3C2440_NFCONF_TWRPH0(7) |
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S3C2440_NFCONF_TWRPH1(7));
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target_write_u32(target, S3C2440_NFCONT,
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S3C2440_NFCONT_INITECC | S3C2440_NFCONT_ENABLE);
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return ERROR_OK;
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}
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int s3c2440_nand_ready(struct nand_device_s *device, int timeout)
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{
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s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
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target_t *target = s3c24xx_info->target;
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u8 status;
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if (target->state != TARGET_HALTED) {
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ERROR("target must be halted to use S3C24XX NAND flash controller");
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return ERROR_NAND_OPERATION_FAILED;
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}
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do {
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target_read_u8(target, s3c24xx_info->nfstat, &status);
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if (status & S3C2440_NFSTAT_READY)
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return 1;
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usleep(1000);
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} while (timeout-- > 0);
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return 0;
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}
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/* use the fact we can read/write 4 bytes in one go via a single 32bit op */
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int s3c2440_read_block_data(struct nand_device_s *device, u8 *data, int data_size)
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{
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s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
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target_t *target = s3c24xx_info->target;
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u32 nfdata = s3c24xx_info->data;
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u32 tmp;
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printf("%s: reading data: %p, %p, %d\n", __func__, device, data, data_size);
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if (target->state != TARGET_HALTED) {
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ERROR("target must be halted to use S3C24XX NAND flash controller");
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return ERROR_NAND_OPERATION_FAILED;
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}
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while (data_size >= 4) {
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target_read_u32(target, nfdata, &tmp);
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data[0] = tmp;
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data[1] = tmp >> 8;
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data[2] = tmp >> 16;
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data[3] = tmp >> 24;
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data_size -= 4;
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data += 4;
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}
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while (data_size > 0) {
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target_read_u8(target, nfdata, data);
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data_size -= 1;
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data += 1;
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}
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return ERROR_OK;
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}
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int s3c2440_write_block_data(struct nand_device_s *device, u8 *data, int data_size)
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{
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s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
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target_t *target = s3c24xx_info->target;
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u32 nfdata = s3c24xx_info->data;
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u32 tmp;
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if (target->state != TARGET_HALTED) {
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ERROR("target must be halted to use S3C24XX NAND flash controller");
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return ERROR_NAND_OPERATION_FAILED;
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}
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while (data_size >= 4) {
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tmp = le_to_h_u32(data);
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target_write_u32(target, nfdata, tmp);
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data_size -= 4;
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data += 4;
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}
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while (data_size > 0) {
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target_write_u8(target, nfdata, *data);
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data_size -= 1;
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data += 1;
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}
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return ERROR_OK;
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}
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/* src/flash/s3c2440_nand.c
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*
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* S3C2440 OpenOCD NAND Flash controller support.
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*
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* Copyright 2007,2008 Ben Dooks <ben@fluff.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* Many thanks to Simtec Electronics for sponsoring this work.
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include "replacements.h"
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#include "log.h"
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#include <stdlib.h>
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#include <string.h>
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#include "nand.h"
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#include "s3c24xx_nand.h"
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#include "target.h"
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int s3c2440_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device);
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int s3c2440_init(struct nand_device_s *device);
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int s3c2440_nand_ready(struct nand_device_s *device, int timeout);
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nand_flash_controller_t s3c2440_nand_controller =
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{
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.name = "s3c2440",
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.nand_device_command = s3c2440_nand_device_command,
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.register_commands = s3c24xx_register_commands,
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.init = s3c2440_init,
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.reset = s3c24xx_reset,
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.command = s3c24xx_command,
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.address = s3c24xx_address,
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.write_data = s3c24xx_write_data,
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.read_data = s3c24xx_read_data,
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.write_page = s3c24xx_write_page,
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.read_page = s3c24xx_read_page,
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.write_block_data = s3c2440_write_block_data,
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.read_block_data = s3c2440_read_block_data,
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.controller_ready = s3c24xx_controller_ready,
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.nand_ready = s3c2440_nand_ready,
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};
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int s3c2440_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
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char **args, int argc,
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struct nand_device_s *device)
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{
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s3c24xx_nand_controller_t *info;
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info = s3c24xx_nand_device_command(cmd_ctx, cmd, args, argc, device);
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if (info == NULL) {
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return ERROR_NAND_DEVICE_INVALID;
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}
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/* fill in the address fields for the core device */
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info->cmd = S3C2440_NFCMD;
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info->addr = S3C2440_NFADDR;
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info->data = S3C2440_NFDATA;
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info->nfstat = S3C2440_NFSTAT;
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return ERROR_OK;
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}
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int s3c2440_init(struct nand_device_s *device)
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{
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s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
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target_t *target = s3c24xx_info->target;
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u32 version;
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target_write_u32(target, S3C2410_NFCONF,
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S3C2440_NFCONF_TACLS(3) |
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S3C2440_NFCONF_TWRPH0(7) |
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S3C2440_NFCONF_TWRPH1(7));
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target_write_u32(target, S3C2440_NFCONT,
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S3C2440_NFCONT_INITECC | S3C2440_NFCONT_ENABLE);
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return ERROR_OK;
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}
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int s3c2440_nand_ready(struct nand_device_s *device, int timeout)
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{
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s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
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target_t *target = s3c24xx_info->target;
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u8 status;
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if (target->state != TARGET_HALTED) {
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ERROR("target must be halted to use S3C24XX NAND flash controller");
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return ERROR_NAND_OPERATION_FAILED;
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}
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do {
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target_read_u8(target, s3c24xx_info->nfstat, &status);
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if (status & S3C2440_NFSTAT_READY)
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return 1;
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usleep(1000);
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} while (timeout-- > 0);
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return 0;
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}
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/* use the fact we can read/write 4 bytes in one go via a single 32bit op */
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int s3c2440_read_block_data(struct nand_device_s *device, u8 *data, int data_size)
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{
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s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
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target_t *target = s3c24xx_info->target;
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u32 nfdata = s3c24xx_info->data;
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u32 tmp;
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INFO("%s: reading data: %p, %p, %d\n", __func__, device, data, data_size);
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if (target->state != TARGET_HALTED) {
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ERROR("target must be halted to use S3C24XX NAND flash controller");
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return ERROR_NAND_OPERATION_FAILED;
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}
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while (data_size >= 4) {
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target_read_u32(target, nfdata, &tmp);
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data[0] = tmp;
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data[1] = tmp >> 8;
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data[2] = tmp >> 16;
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data[3] = tmp >> 24;
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data_size -= 4;
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data += 4;
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}
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while (data_size > 0) {
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target_read_u8(target, nfdata, data);
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data_size -= 1;
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data += 1;
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}
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return ERROR_OK;
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}
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int s3c2440_write_block_data(struct nand_device_s *device, u8 *data, int data_size)
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{
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s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
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target_t *target = s3c24xx_info->target;
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u32 nfdata = s3c24xx_info->data;
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u32 tmp;
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if (target->state != TARGET_HALTED) {
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ERROR("target must be halted to use S3C24XX NAND flash controller");
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return ERROR_NAND_OPERATION_FAILED;
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}
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while (data_size >= 4) {
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tmp = le_to_h_u32(data);
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target_write_u32(target, nfdata, tmp);
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data_size -= 4;
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data += 4;
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}
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while (data_size > 0) {
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target_write_u8(target, nfdata, *data);
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data_size -= 1;
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data += 1;
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}
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return ERROR_OK;
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}
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396
src/helper/log.c
396
src/helper/log.c
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@ -1,198 +1,198 @@
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/***************************************************************************
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* Copyright (C) 2005 by Dominic Rath *
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* Dominic.Rath@gmx.de *
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* *
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* This program is free software; you can redistribute it and/or modify *
|
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* it under the terms of the GNU General Public License as published by *
|
||||
* the Free Software Foundation; either version 2 of the License, or *
|
||||
* (at your option) any later version. *
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* *
|
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* This program is distributed in the hope that it will be useful, *
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
|
||||
* GNU General Public License for more details. *
|
||||
* *
|
||||
* You should have received a copy of the GNU General Public License *
|
||||
* along with this program; if not, write to the *
|
||||
* Free Software Foundation, Inc., *
|
||||
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
|
||||
***************************************************************************/
|
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include "log.h"
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#include "configuration.h"
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <stdarg.h>
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#include <time.h>
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int debug_level = -1;
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static FILE* log_output;
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static void *privData;
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static logCallback callback;
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void log_setCallback(logCallback c, void *p)
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{
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callback = c;
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privData = p;
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}
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static char *log_strings[5] =
|
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{
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"User: ",
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"Error: ",
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"Warning:",
|
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"Info: ",
|
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"Debug: "
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};
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void log_printf(enum log_levels level, const char *file, int line, const char *function, const char *format, ...)
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{
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static int count = 0;
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count++;
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va_list args;
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char buffer[512];
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if (level > debug_level)
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return;
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va_start(args, format);
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vsnprintf(buffer, 512, format, args);
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char *f = strrchr(file, '/');
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if (f != NULL)
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file = f + 1;
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|
||||
if (debug_level >= LOG_DEBUG)
|
||||
{
|
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/* print with count and time information */
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fprintf(log_output, "%s %d %ld %s:%d %s(): %s\n", log_strings[level+1], count, time(NULL), file, line, function, buffer);
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||||
}
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else
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{
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||||
/* do not print count and time */
|
||||
fprintf(log_output, "%s %s:%d %s(): %s\n", log_strings[level+1], file, line, function, buffer);
|
||||
}
|
||||
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||||
fflush(log_output);
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||||
|
||||
va_end(args);
|
||||
|
||||
/* Never forward LOG_DEBUG, too verbose and they can be found in the log if need be */
|
||||
if (callback && (level <= LOG_INFO))
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||||
{
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va_start(args, format);
|
||||
callback(privData, file, line, function, format, args);
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||||
va_end(args);
|
||||
}
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||||
}
|
||||
|
||||
/* change the current debug level on the fly
|
||||
* 0: only ERRORS
|
||||
* 1: + WARNINGS
|
||||
* 2: + INFORMATIONAL MSGS
|
||||
* 3: + DEBUG MSGS
|
||||
*/
|
||||
int handle_debug_level_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
|
||||
{
|
||||
if (argc == 0)
|
||||
command_print(cmd_ctx, "debug_level: %i", debug_level);
|
||||
|
||||
if (argc > 0)
|
||||
debug_level = strtoul(args[0], NULL, 0);
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||||
if (debug_level < 0)
|
||||
debug_level = 0;
|
||||
|
||||
if (debug_level > 3)
|
||||
debug_level = 3;
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int handle_log_output_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
|
||||
{
|
||||
if (argc == 1)
|
||||
{
|
||||
FILE* file = fopen(args[0], "w");
|
||||
|
||||
if (file)
|
||||
{
|
||||
log_output = file;
|
||||
}
|
||||
}
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int log_register_commands(struct command_context_s *cmd_ctx)
|
||||
{
|
||||
register_command(cmd_ctx, NULL, "log_output", handle_log_output_command,
|
||||
COMMAND_ANY, "redirect logging to <file> (default: stderr)");
|
||||
register_command(cmd_ctx, NULL, "debug_level", handle_debug_level_command,
|
||||
COMMAND_ANY, "adjust debug level <0-3>");
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int log_init(struct command_context_s *cmd_ctx)
|
||||
{
|
||||
/* set defaults for daemon configuration, if not set by cmdline or cfgfile */
|
||||
if (debug_level == -1)
|
||||
debug_level = LOG_INFO;
|
||||
|
||||
if (log_output == NULL)
|
||||
{
|
||||
log_output = stderr;
|
||||
}
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int set_log_output(struct command_context_s *cmd_ctx, FILE *output)
|
||||
{
|
||||
log_output = output;
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
/* return allocated string w/printf() result */
|
||||
char *allocPrintf(const char *fmt, va_list ap)
|
||||
{
|
||||
char *string = NULL;
|
||||
|
||||
/* start by 0 to exercise all the code paths. Need minimum 2 bytes to
|
||||
* fit 1 char and 0 terminator. */
|
||||
int size = 0;
|
||||
int first = 1;
|
||||
for (;;)
|
||||
{
|
||||
if ((string == NULL) || (!first))
|
||||
{
|
||||
size = size * 2 + 2;
|
||||
char *t = string;
|
||||
string = realloc(string, size);
|
||||
if (string == NULL)
|
||||
{
|
||||
if (t != NULL)
|
||||
free(t);
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
|
||||
int ret;
|
||||
ret = vsnprintf(string, size, fmt, ap);
|
||||
/* NB! The result of the vsnprintf() might be an *EMPTY* string! */
|
||||
if ((ret >= 0) && ((ret + 1) < size))
|
||||
{
|
||||
return string;
|
||||
}
|
||||
/* there was just enough or not enough space, allocate more. */
|
||||
first = 0;
|
||||
}
|
||||
}
|
||||
/***************************************************************************
|
||||
* Copyright (C) 2005 by Dominic Rath *
|
||||
* Dominic.Rath@gmx.de *
|
||||
* *
|
||||
* This program is free software; you can redistribute it and/or modify *
|
||||
* it under the terms of the GNU General Public License as published by *
|
||||
* the Free Software Foundation; either version 2 of the License, or *
|
||||
* (at your option) any later version. *
|
||||
* *
|
||||
* This program is distributed in the hope that it will be useful, *
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
|
||||
* GNU General Public License for more details. *
|
||||
* *
|
||||
* You should have received a copy of the GNU General Public License *
|
||||
* along with this program; if not, write to the *
|
||||
* Free Software Foundation, Inc., *
|
||||
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
|
||||
***************************************************************************/
|
||||
#ifdef HAVE_CONFIG_H
|
||||
#include "config.h"
|
||||
#endif
|
||||
|
||||
#include "log.h"
|
||||
#include "configuration.h"
|
||||
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include <stdarg.h>
|
||||
#include <time.h>
|
||||
|
||||
int debug_level = -1;
|
||||
|
||||
static FILE* log_output;
|
||||
|
||||
static void *privData;
|
||||
static logCallback callback;
|
||||
|
||||
void log_setCallback(logCallback c, void *p)
|
||||
{
|
||||
callback = c;
|
||||
privData = p;
|
||||
}
|
||||
|
||||
static char *log_strings[5] =
|
||||
{
|
||||
"User: ",
|
||||
"Error: ",
|
||||
"Warning:",
|
||||
"Info: ",
|
||||
"Debug: "
|
||||
};
|
||||
|
||||
void log_printf(enum log_levels level, const char *file, int line, const char *function, const char *format, ...)
|
||||
{
|
||||
static int count = 0;
|
||||
count++;
|
||||
va_list args;
|
||||
char buffer[512];
|
||||
|
||||
if (level > debug_level)
|
||||
return;
|
||||
|
||||
va_start(args, format);
|
||||
vsnprintf(buffer, 512, format, args);
|
||||
|
||||
char *f = strrchr(file, '/');
|
||||
if (f != NULL)
|
||||
file = f + 1;
|
||||
|
||||
if (debug_level >= LOG_DEBUG)
|
||||
{
|
||||
/* print with count and time information */
|
||||
fprintf(log_output, "%s %d %ld %s:%d %s(): %s\n", log_strings[level+1], count, time(NULL), file, line, function, buffer);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* do not print count and time */
|
||||
fprintf(log_output, "%s %s:%d %s(): %s\n", log_strings[level+1], file, line, function, buffer);
|
||||
}
|
||||
|
||||
fflush(log_output);
|
||||
|
||||
va_end(args);
|
||||
|
||||
/* Never forward LOG_DEBUG, too verbose and they can be found in the log if need be */
|
||||
if (callback && (level <= LOG_INFO))
|
||||
{
|
||||
va_start(args, format);
|
||||
callback(privData, file, line, function, format, args);
|
||||
va_end(args);
|
||||
}
|
||||
}
|
||||
|
||||
/* change the current debug level on the fly
|
||||
* 0: only ERRORS
|
||||
* 1: + WARNINGS
|
||||
* 2: + INFORMATIONAL MSGS
|
||||
* 3: + DEBUG MSGS
|
||||
*/
|
||||
int handle_debug_level_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
|
||||
{
|
||||
if (argc == 0)
|
||||
command_print(cmd_ctx, "debug_level: %i", debug_level);
|
||||
|
||||
if (argc > 0)
|
||||
debug_level = strtoul(args[0], NULL, 0);
|
||||
|
||||
if (debug_level < 0)
|
||||
debug_level = 0;
|
||||
|
||||
if (debug_level > 3)
|
||||
debug_level = 3;
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int handle_log_output_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
|
||||
{
|
||||
if (argc == 1)
|
||||
{
|
||||
FILE* file = fopen(args[0], "w");
|
||||
|
||||
if (file)
|
||||
{
|
||||
log_output = file;
|
||||
}
|
||||
}
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int log_register_commands(struct command_context_s *cmd_ctx)
|
||||
{
|
||||
register_command(cmd_ctx, NULL, "log_output", handle_log_output_command,
|
||||
COMMAND_ANY, "redirect logging to <file> (default: stderr)");
|
||||
register_command(cmd_ctx, NULL, "debug_level", handle_debug_level_command,
|
||||
COMMAND_ANY, "adjust debug level <0-3>");
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int log_init(struct command_context_s *cmd_ctx)
|
||||
{
|
||||
/* set defaults for daemon configuration, if not set by cmdline or cfgfile */
|
||||
if (debug_level == -1)
|
||||
debug_level = LOG_INFO;
|
||||
|
||||
if (log_output == NULL)
|
||||
{
|
||||
log_output = stderr;
|
||||
}
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int set_log_output(struct command_context_s *cmd_ctx, FILE *output)
|
||||
{
|
||||
log_output = output;
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
/* return allocated string w/printf() result */
|
||||
char *allocPrintf(const char *fmt, va_list ap)
|
||||
{
|
||||
char *string = NULL;
|
||||
|
||||
/* start by 0 to exercise all the code paths. Need minimum 2 bytes to
|
||||
* fit 1 char and 0 terminator. */
|
||||
int size = 0;
|
||||
int first = 1;
|
||||
for (;;)
|
||||
{
|
||||
if ((string == NULL) || (!first))
|
||||
{
|
||||
size = size * 2 + 2;
|
||||
char *t = string;
|
||||
string = realloc(string, size);
|
||||
if (string == NULL)
|
||||
{
|
||||
if (t != NULL)
|
||||
free(t);
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
|
||||
int ret;
|
||||
ret = vsnprintf(string, size, fmt, ap);
|
||||
/* NB! The result of the vsnprintf() might be an *EMPTY* string! */
|
||||
if ((ret >= 0) && ((ret + 1) < size))
|
||||
{
|
||||
return string;
|
||||
}
|
||||
/* there was just enough or not enough space, allocate more. */
|
||||
first = 0;
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,237 +1,237 @@
|
|||
/***************************************************************************
|
||||
* Copyright (C) 2005 by Dominic Rath *
|
||||
* Dominic.Rath@gmx.de *
|
||||
* *
|
||||
* This program is free software; you can redistribute it and/or modify *
|
||||
* it under the terms of the GNU General Public License as published by *
|
||||
* the Free Software Foundation; either version 2 of the License, or *
|
||||
* (at your option) any later version. *
|
||||
* *
|
||||
* This program is distributed in the hope that it will be useful, *
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
|
||||
* GNU General Public License for more details. *
|
||||
* *
|
||||
* You should have received a copy of the GNU General Public License *
|
||||
* along with this program; if not, write to the *
|
||||
* Free Software Foundation, Inc., *
|
||||
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
|
||||
***************************************************************************/
|
||||
#ifdef HAVE_CONFIG_H
|
||||
#include "config.h"
|
||||
#endif
|
||||
|
||||
#include "log.h"
|
||||
#include "jtag.h"
|
||||
#include "bitbang.h"
|
||||
|
||||
#define TDO_BIT 1
|
||||
#define TDI_BIT 2
|
||||
#define TCK_BIT 4
|
||||
#define TMS_BIT 8
|
||||
#define TRST_BIT 16
|
||||
#define SRST_BIT 32
|
||||
#define VCC_BIT 64
|
||||
|
||||
/* system includes */
|
||||
#include <string.h>
|
||||
#include <stdlib.h>
|
||||
#include <stdio.h>
|
||||
#include <sys/mman.h>
|
||||
#include <unistd.h>
|
||||
#include <fcntl.h>
|
||||
|
||||
static u8 output_value = 0x0;
|
||||
static int dev_mem_fd;
|
||||
static void *gpio_controller;
|
||||
static volatile u8 *gpio_data_register;
|
||||
static volatile u8 *gpio_data_direction_register;
|
||||
|
||||
/* low level command set
|
||||
*/
|
||||
int ep93xx_read(void);
|
||||
void ep93xx_write(int tck, int tms, int tdi);
|
||||
void ep93xx_reset(int trst, int srst);
|
||||
|
||||
int ep93xx_speed(int speed);
|
||||
int ep93xx_register_commands(struct command_context_s *cmd_ctx);
|
||||
int ep93xx_init(void);
|
||||
int ep93xx_quit(void);
|
||||
|
||||
struct timespec ep93xx_zzzz;
|
||||
|
||||
jtag_interface_t ep93xx_interface =
|
||||
{
|
||||
.name = "ep93xx",
|
||||
|
||||
.execute_queue = bitbang_execute_queue,
|
||||
|
||||
.speed = ep93xx_speed,
|
||||
.register_commands = ep93xx_register_commands,
|
||||
.init = ep93xx_init,
|
||||
.quit = ep93xx_quit,
|
||||
};
|
||||
|
||||
bitbang_interface_t ep93xx_bitbang =
|
||||
{
|
||||
.read = ep93xx_read,
|
||||
.write = ep93xx_write,
|
||||
.reset = ep93xx_reset,
|
||||
.blink = 0;
|
||||
};
|
||||
|
||||
int ep93xx_read(void)
|
||||
{
|
||||
return !!(*gpio_data_register & TDO_BIT);
|
||||
}
|
||||
|
||||
void ep93xx_write(int tck, int tms, int tdi)
|
||||
{
|
||||
if (tck)
|
||||
output_value |= TCK_BIT;
|
||||
else
|
||||
output_value &= TCK_BIT;
|
||||
|
||||
if (tms)
|
||||
output_value |= TMS_BIT;
|
||||
else
|
||||
output_value &= TMS_BIT;
|
||||
|
||||
if (tdi)
|
||||
output_value |= TDI_BIT;
|
||||
else
|
||||
output_value &= TDI_BIT;
|
||||
|
||||
*gpio_data_register = output_value;
|
||||
nanosleep(ep93xx_zzzz);
|
||||
}
|
||||
|
||||
/* (1) assert or (0) deassert reset lines */
|
||||
void ep93xx_reset(int trst, int srst)
|
||||
{
|
||||
if (trst == 0)
|
||||
output_value |= TRST_BIT;
|
||||
else if (trst == 1)
|
||||
output_value &= TRST_BIT;
|
||||
|
||||
if (srst == 0)
|
||||
output_value |= SRST_BIT;
|
||||
else if (srst == 1)
|
||||
output_value &= SRST_BIT;
|
||||
|
||||
*gpio_data_register = output_value;
|
||||
nanosleep(ep93xx_zzzz);
|
||||
}
|
||||
|
||||
int ep93xx_speed(int speed)
|
||||
{
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int ep93xx_register_commands(struct command_context_s *cmd_ctx)
|
||||
{
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
static int set_gonk_mode(void)
|
||||
{
|
||||
void *syscon;
|
||||
u32 devicecfg;
|
||||
|
||||
syscon = mmap(NULL, 4096, PROT_READ | PROT_WRITE,
|
||||
MAP_SHARED, dev_mem_fd, 0x80930000);
|
||||
if (syscon == MAP_FAILED) {
|
||||
perror("mmap");
|
||||
return ERROR_JTAG_INIT_FAILED;
|
||||
}
|
||||
|
||||
devicecfg = *((volatile int *)(syscon + 0x80));
|
||||
*((volatile int *)(syscon + 0xc0)) = 0xaa;
|
||||
*((volatile int *)(syscon + 0x80)) = devicecfg | 0x08000000;
|
||||
|
||||
munmap(syscon, 4096);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int ep93xx_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
bitbang_interface = &ep93xx_bitbang;
|
||||
|
||||
ep93xx_zzzz.tv_sec = 0;
|
||||
ep93xx_zzzz.tv_nsec = 10000000;
|
||||
|
||||
dev_mem_fd = open("/dev/mem", O_RDWR | O_SYNC);
|
||||
if (dev_mem_fd < 0) {
|
||||
perror("open");
|
||||
return ERROR_JTAG_INIT_FAILED;
|
||||
}
|
||||
|
||||
gpio_controller = mmap(NULL, 4096, PROT_READ | PROT_WRITE,
|
||||
MAP_SHARED, dev_mem_fd, 0x80840000);
|
||||
if (gpio_controller == MAP_FAILED) {
|
||||
perror("mmap");
|
||||
close(dev_mem_fd);
|
||||
return ERROR_JTAG_INIT_FAILED;
|
||||
}
|
||||
|
||||
ret = set_gonk_mode();
|
||||
if (ret != ERROR_OK) {
|
||||
munmap(gpio_controller, 4096);
|
||||
close(dev_mem_fd);
|
||||
return ret;
|
||||
}
|
||||
|
||||
#if 0
|
||||
/* Use GPIO port A. */
|
||||
gpio_data_register = gpio_controller + 0x00;
|
||||
gpio_data_direction_register = gpio_controller + 0x10;
|
||||
|
||||
|
||||
/* Use GPIO port B. */
|
||||
gpio_data_register = gpio_controller + 0x04;
|
||||
gpio_data_direction_register = gpio_controller + 0x14;
|
||||
|
||||
/* Use GPIO port C. */
|
||||
gpio_data_register = gpio_controller + 0x08;
|
||||
gpio_data_direction_register = gpio_controller + 0x18;
|
||||
|
||||
/* Use GPIO port D. */
|
||||
gpio_data_register = gpio_controller + 0x0c;
|
||||
gpio_data_direction_register = gpio_controller + 0x1c;
|
||||
#endif
|
||||
|
||||
/* Use GPIO port C. */
|
||||
gpio_data_register = gpio_controller + 0x08;
|
||||
gpio_data_direction_register = gpio_controller + 0x18;
|
||||
|
||||
printf("gpio_data_register = %p\n", gpio_data_register);
|
||||
printf("gpio_data_direction_reg = %p\n", gpio_data_direction_register);
|
||||
/*
|
||||
* Configure bit 0 (TDO) as an input, and bits 1-5 (TDI, TCK
|
||||
* TMS, TRST, SRST) as outputs. Drive TDI and TCK low, and
|
||||
* TMS/TRST/SRST high.
|
||||
*/
|
||||
output_value = TMS_BIT | TRST_BIT | SRST_BIT | VCC_BIT;
|
||||
*gpio_data_register = output_value;
|
||||
nanosleep(ep93xx_zzzz);
|
||||
|
||||
/*
|
||||
* Configure the direction register. 1 = output, 0 = input.
|
||||
*/
|
||||
*gpio_data_direction_register =
|
||||
TDI_BIT | TCK_BIT | TMS_BIT | TRST_BIT | SRST_BIT | VCC_BIT;
|
||||
|
||||
nanosleep(ep93xx_zzzz);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int ep93xx_quit(void)
|
||||
{
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
/***************************************************************************
|
||||
* Copyright (C) 2005 by Dominic Rath *
|
||||
* Dominic.Rath@gmx.de *
|
||||
* *
|
||||
* This program is free software; you can redistribute it and/or modify *
|
||||
* it under the terms of the GNU General Public License as published by *
|
||||
* the Free Software Foundation; either version 2 of the License, or *
|
||||
* (at your option) any later version. *
|
||||
* *
|
||||
* This program is distributed in the hope that it will be useful, *
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
|
||||
* GNU General Public License for more details. *
|
||||
* *
|
||||
* You should have received a copy of the GNU General Public License *
|
||||
* along with this program; if not, write to the *
|
||||
* Free Software Foundation, Inc., *
|
||||
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
|
||||
***************************************************************************/
|
||||
#ifdef HAVE_CONFIG_H
|
||||
#include "config.h"
|
||||
#endif
|
||||
|
||||
#include "log.h"
|
||||
#include "jtag.h"
|
||||
#include "bitbang.h"
|
||||
|
||||
#define TDO_BIT 1
|
||||
#define TDI_BIT 2
|
||||
#define TCK_BIT 4
|
||||
#define TMS_BIT 8
|
||||
#define TRST_BIT 16
|
||||
#define SRST_BIT 32
|
||||
#define VCC_BIT 64
|
||||
|
||||
/* system includes */
|
||||
#include <string.h>
|
||||
#include <stdlib.h>
|
||||
#include <stdio.h>
|
||||
#include <sys/mman.h>
|
||||
#include <unistd.h>
|
||||
#include <fcntl.h>
|
||||
|
||||
static u8 output_value = 0x0;
|
||||
static int dev_mem_fd;
|
||||
static void *gpio_controller;
|
||||
static volatile u8 *gpio_data_register;
|
||||
static volatile u8 *gpio_data_direction_register;
|
||||
|
||||
/* low level command set
|
||||
*/
|
||||
int ep93xx_read(void);
|
||||
void ep93xx_write(int tck, int tms, int tdi);
|
||||
void ep93xx_reset(int trst, int srst);
|
||||
|
||||
int ep93xx_speed(int speed);
|
||||
int ep93xx_register_commands(struct command_context_s *cmd_ctx);
|
||||
int ep93xx_init(void);
|
||||
int ep93xx_quit(void);
|
||||
|
||||
struct timespec ep93xx_zzzz;
|
||||
|
||||
jtag_interface_t ep93xx_interface =
|
||||
{
|
||||
.name = "ep93xx",
|
||||
|
||||
.execute_queue = bitbang_execute_queue,
|
||||
|
||||
.speed = ep93xx_speed,
|
||||
.register_commands = ep93xx_register_commands,
|
||||
.init = ep93xx_init,
|
||||
.quit = ep93xx_quit,
|
||||
};
|
||||
|
||||
bitbang_interface_t ep93xx_bitbang =
|
||||
{
|
||||
.read = ep93xx_read,
|
||||
.write = ep93xx_write,
|
||||
.reset = ep93xx_reset,
|
||||
.blink = 0;
|
||||
};
|
||||
|
||||
int ep93xx_read(void)
|
||||
{
|
||||
return !!(*gpio_data_register & TDO_BIT);
|
||||
}
|
||||
|
||||
void ep93xx_write(int tck, int tms, int tdi)
|
||||
{
|
||||
if (tck)
|
||||
output_value |= TCK_BIT;
|
||||
else
|
||||
output_value &= TCK_BIT;
|
||||
|
||||
if (tms)
|
||||
output_value |= TMS_BIT;
|
||||
else
|
||||
output_value &= TMS_BIT;
|
||||
|
||||
if (tdi)
|
||||
output_value |= TDI_BIT;
|
||||
else
|
||||
output_value &= TDI_BIT;
|
||||
|
||||
*gpio_data_register = output_value;
|
||||
nanosleep(ep93xx_zzzz);
|
||||
}
|
||||
|
||||
/* (1) assert or (0) deassert reset lines */
|
||||
void ep93xx_reset(int trst, int srst)
|
||||
{
|
||||
if (trst == 0)
|
||||
output_value |= TRST_BIT;
|
||||
else if (trst == 1)
|
||||
output_value &= TRST_BIT;
|
||||
|
||||
if (srst == 0)
|
||||
output_value |= SRST_BIT;
|
||||
else if (srst == 1)
|
||||
output_value &= SRST_BIT;
|
||||
|
||||
*gpio_data_register = output_value;
|
||||
nanosleep(ep93xx_zzzz);
|
||||
}
|
||||
|
||||
int ep93xx_speed(int speed)
|
||||
{
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int ep93xx_register_commands(struct command_context_s *cmd_ctx)
|
||||
{
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
static int set_gonk_mode(void)
|
||||
{
|
||||
void *syscon;
|
||||
u32 devicecfg;
|
||||
|
||||
syscon = mmap(NULL, 4096, PROT_READ | PROT_WRITE,
|
||||
MAP_SHARED, dev_mem_fd, 0x80930000);
|
||||
if (syscon == MAP_FAILED) {
|
||||
perror("mmap");
|
||||
return ERROR_JTAG_INIT_FAILED;
|
||||
}
|
||||
|
||||
devicecfg = *((volatile int *)(syscon + 0x80));
|
||||
*((volatile int *)(syscon + 0xc0)) = 0xaa;
|
||||
*((volatile int *)(syscon + 0x80)) = devicecfg | 0x08000000;
|
||||
|
||||
munmap(syscon, 4096);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int ep93xx_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
bitbang_interface = &ep93xx_bitbang;
|
||||
|
||||
ep93xx_zzzz.tv_sec = 0;
|
||||
ep93xx_zzzz.tv_nsec = 10000000;
|
||||
|
||||
dev_mem_fd = open("/dev/mem", O_RDWR | O_SYNC);
|
||||
if (dev_mem_fd < 0) {
|
||||
perror("open");
|
||||
return ERROR_JTAG_INIT_FAILED;
|
||||
}
|
||||
|
||||
gpio_controller = mmap(NULL, 4096, PROT_READ | PROT_WRITE,
|
||||
MAP_SHARED, dev_mem_fd, 0x80840000);
|
||||
if (gpio_controller == MAP_FAILED) {
|
||||
perror("mmap");
|
||||
close(dev_mem_fd);
|
||||
return ERROR_JTAG_INIT_FAILED;
|
||||
}
|
||||
|
||||
ret = set_gonk_mode();
|
||||
if (ret != ERROR_OK) {
|
||||
munmap(gpio_controller, 4096);
|
||||
close(dev_mem_fd);
|
||||
return ret;
|
||||
}
|
||||
|
||||
#if 0
|
||||
/* Use GPIO port A. */
|
||||
gpio_data_register = gpio_controller + 0x00;
|
||||
gpio_data_direction_register = gpio_controller + 0x10;
|
||||
|
||||
|
||||
/* Use GPIO port B. */
|
||||
gpio_data_register = gpio_controller + 0x04;
|
||||
gpio_data_direction_register = gpio_controller + 0x14;
|
||||
|
||||
/* Use GPIO port C. */
|
||||
gpio_data_register = gpio_controller + 0x08;
|
||||
gpio_data_direction_register = gpio_controller + 0x18;
|
||||
|
||||
/* Use GPIO port D. */
|
||||
gpio_data_register = gpio_controller + 0x0c;
|
||||
gpio_data_direction_register = gpio_controller + 0x1c;
|
||||
#endif
|
||||
|
||||
/* Use GPIO port C. */
|
||||
gpio_data_register = gpio_controller + 0x08;
|
||||
gpio_data_direction_register = gpio_controller + 0x18;
|
||||
|
||||
INFO("gpio_data_register = %p\n", gpio_data_register);
|
||||
INFO("gpio_data_direction_reg = %p\n", gpio_data_direction_register);
|
||||
/*
|
||||
* Configure bit 0 (TDO) as an input, and bits 1-5 (TDI, TCK
|
||||
* TMS, TRST, SRST) as outputs. Drive TDI and TCK low, and
|
||||
* TMS/TRST/SRST high.
|
||||
*/
|
||||
output_value = TMS_BIT | TRST_BIT | SRST_BIT | VCC_BIT;
|
||||
*gpio_data_register = output_value;
|
||||
nanosleep(ep93xx_zzzz);
|
||||
|
||||
/*
|
||||
* Configure the direction register. 1 = output, 0 = input.
|
||||
*/
|
||||
*gpio_data_direction_register =
|
||||
TDI_BIT | TCK_BIT | TMS_BIT | TRST_BIT | SRST_BIT | VCC_BIT;
|
||||
|
||||
nanosleep(ep93xx_zzzz);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int ep93xx_quit(void)
|
||||
{
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
|
|
|||
4278
src/jtag/ft2232.c
4278
src/jtag/ft2232.c
File diff suppressed because it is too large
Load Diff
1008
src/xsvf/xsvf.c
1008
src/xsvf/xsvf.c
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue