DM36x: Use enable bit for PLL pre-divider

The PLL pre- and postdividers seem to have enable bits, although
these are not mentioned in the chip documentation.

Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>

tcl/target/davinci.cfg

@@ -179,7 +179,7 @@ proc pll_v03_setup {pll_addr mult config} {
 	mww [expr $pll_addr + 0x0110] [expr ($mult / 2) & 0x1ff]
 	if { [dict exists $config prediv] } {
 		set div [dict get $config prediv]
-		set div [expr ($div - 1)]
+		set div [expr 0x8000 | ($div - 1)]
 		mww [expr $pll_addr + 0x0114] $div
 	}
 	if { [dict exists $config postdiv] } {