Support for sam3n0a sam3n0b sam3n00a sam3n00b

Change-Id: I70a04f5f9b0b20d42a677ea8781130e44be758d3
Signed-off-by: Stefan Arnold <sarnold@sh-sw.de>
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/2042
Tested-by: jenkins
Reviewed-by: Stian Skjelstad <stian@nixia.no>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This commit is contained in:
Andreas Fritiofson 2014-03-13 22:18:29 +01:00 committed by Paul Fertser
parent 67ce08c431
commit a5ef7b83e2

View File

@ -1518,6 +1518,143 @@ static const struct sam3_chip_details all_sam3_details[] = {
},
},
{
.chipid_cidr = 0x29480360,
.name = "at91sam3n0b",
.total_flash_size = 32 * 1024,
.total_sram_size = 8 * 1024,
.n_gpnvms = 3,
.n_banks = 1,
/* .bank[0] = { */
{
{
.probed = 0,
.pChip = NULL,
.pBank = NULL,
.bank_number = 0,
.base_address = FLASH_BANK_BASE_N,
.controller_address = 0x400e0A00,
.flash_wait_states = 6, /* workaround silicon bug */
.present = 1,
.size_bytes = 32 * 1024,
.nsectors = 2,
.sector_size = 16384,
.page_size = 256,
},
/* .bank[1] = { */
{
.present = 0,
.probed = 0,
.bank_number = 1,
},
},
},
{
.chipid_cidr = 0x29380360,
.name = "at91sam3n0a",
.total_flash_size = 32 * 1024,
.total_sram_size = 8 * 1024,
.n_gpnvms = 3,
.n_banks = 1,
/* .bank[0] = { */
{
{
.probed = 0,
.pChip = NULL,
.pBank = NULL,
.bank_number = 0,
.base_address = FLASH_BANK_BASE_N,
.controller_address = 0x400e0A00,
.flash_wait_states = 6, /* workaround silicon bug */
.present = 1,
.size_bytes = 32 * 1024,
.nsectors = 2,
.sector_size = 16384,
.page_size = 256,
},
/* .bank[1] = { */
{
.present = 0,
.probed = 0,
.bank_number = 1,
},
},
},
{
.chipid_cidr = 0x29450260,
.name = "at91sam3n00b",
.total_flash_size = 16 * 1024,
.total_sram_size = 4 * 1024,
.n_gpnvms = 3,
.n_banks = 1,
/* .bank[0] = { */
{
{
.probed = 0,
.pChip = NULL,
.pBank = NULL,
.bank_number = 0,
.base_address = FLASH_BANK_BASE_N,
.controller_address = 0x400e0A00,
.flash_wait_states = 6, /* workaround silicon bug */
.present = 1,
.size_bytes = 16 * 1024,
.nsectors = 1,
.sector_size = 16384,
.page_size = 256,
},
/* .bank[1] = { */
{
.present = 0,
.probed = 0,
.bank_number = 1,
},
},
},
{
.chipid_cidr = 0x29350260,
.name = "at91sam3n00a",
.total_flash_size = 16 * 1024,
.total_sram_size = 4 * 1024,
.n_gpnvms = 3,
.n_banks = 1,
/* .bank[0] = { */
{
{
.probed = 0,
.pChip = NULL,
.pBank = NULL,
.bank_number = 0,
.base_address = FLASH_BANK_BASE_N,
.controller_address = 0x400e0A00,
.flash_wait_states = 6, /* workaround silicon bug */
.present = 1,
.size_bytes = 16 * 1024,
.nsectors = 1,
.sector_size = 16384,
.page_size = 256,
},
/* .bank[1] = { */
{
.present = 0,
.probed = 0,
.bank_number = 1,
},
},
},
/* Start at91sam3a series*/
/* System boots at address 0x0 */
/* gpnvm[1] = selects boot code */
@ -2993,7 +3130,7 @@ static int sam3_GetDetails(struct sam3_bank_private *pPrivate)
pDetails = all_sam3_details;
while (pDetails->name) {
/* Compare cidr without version bits */
if (pDetails->chipid_cidr == (pPrivate->pChip->cfg.CHIPID_CIDR & 0xFFFFFFE0))
if (((pDetails->chipid_cidr ^ pPrivate->pChip->cfg.CHIPID_CIDR) & 0xFFFFFFE0) == 0)
break;
else
pDetails++;