imi415/openocd
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

ARM7/ARM9: use shared examine() method

Browse Source 
No point in having two identical examine methods for the
ARM7TDMI and ARM9TDMI drivers; move, rename, shrink, share.

Add a bit of doxygen; stop needlessly exporting a method.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This commit is contained in:
David Brownell 2009-11-13 16:26:39 -08:00
parent 78c6b922e2
commit aafb916bea
12 changed files with 65 additions and 84 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
src/target/arm720t.c
View File

@ -548,8 +548,7 @@ struct target_type arm720t_target =
.register_commands = arm720t_register_commands,
.target_create = arm720t_target_create,
.init_target = arm720t_init_target,
.examine = arm7tdmi_examine,
.examine = arm7_9_examine,
.mrc = arm720t_mrc,
.mcr = arm720t_mcr,
};

58
src/target/arm7_9_common.c
View File

@ -37,7 +37,25 @@
#include "arm_simulator.h"
int arm7_9_debug_entry(struct target *target);
/**
* @file
* Hold common code supporting the ARM7 and ARM9 core generations.
*
* While the ARM core implementations evolved substantially during these
* two generations, they look quite similar from the JTAG perspective.
* Both have similar debug facilities, based on the same two scan chains
* providing access to the core and to an EmbeddedICE module. Both can
* support similar ETM and ETB modules, for tracing. And both expose
* what could be viewed as "ARM Classic", with multiple processor modes,
* shadowed registers, and support for the Thumb instruction set.
*
* Processor differences include things like presence or absence of MMU
* and cache, pipeline sizes, use of a modified Harvard Architecure
* (with separate instruction and data busses from the CPU), support
* for cpu clock gating during idle, and more.
*/
static int arm7_9_debug_entry(struct target *target);
/**
* Clear watchpoints for an ARM7/9 target.
@ -1311,7 +1329,7 @@ int arm7_9_halt(struct target *target)
* @param target Pointer to target that is entering debug mode
* @return Error code if anything fails, otherwise ERROR_OK
*/
int arm7_9_debug_entry(struct target *target)
static int arm7_9_debug_entry(struct target *target)
{
int i;
uint32_t context[16];
@ -2838,6 +2856,42 @@ int arm7_9_blank_check_memory(struct target *target, uint32_t address, uint32_t
return ERROR_OK;
}
/**
* Perform per-target setup that requires JTAG access.
*/
int arm7_9_examine(struct target *target)
{
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
int retval;
if (!target_was_examined(target)) {
struct reg_cache *t, **cache_p;
t = embeddedice_build_reg_cache(target, arm7_9);
if (t == NULL)
return ERROR_FAIL;
cache_p = register_get_last_cache_p(&target->reg_cache);
(*cache_p) = t;
arm7_9->eice_cache = (*cache_p);
if (arm7_9->armv4_5_common.etm)
(*cache_p)->next = etm_build_reg_cache(target,
&arm7_9->jtag_info,
arm7_9->armv4_5_common.etm);
target_set_examined(target);
}
retval = embeddedice_setup(target);
if (retval == ERROR_OK)
retval = arm7_9_setup(target);
if (retval == ERROR_OK && arm7_9->armv4_5_common.etm)
retval = etm_setup(target);
return retval;
}
COMMAND_HANDLER(handle_arm7_9_write_xpsr_command)
{
uint32_t value;

1
src/target/arm7_9_common.h
View File

@ -159,5 +159,6 @@ void arm7_9_disable_eice_step(struct target *target);
int arm7_9_execute_sys_speed(struct target *target);
int arm7_9_init_arch_info(struct target *target, struct arm7_9_common *arm7_9);
int arm7_9_examine(struct target *target);
#endif /* ARM7_9_COMMON_H */

38
src/target/arm7tdmi.c
View File

@ -646,42 +646,6 @@ static void arm7tdmi_build_reg_cache(struct target *target)
armv4_5->core_cache = (*cache_p);
}
int arm7tdmi_examine(struct target *target)
{
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
int retval;
if (!target_was_examined(target))
{
/* get pointers to arch-specific information */
struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
struct reg_cache *t = embeddedice_build_reg_cache(target, arm7_9);
if (t == NULL)
return ERROR_FAIL;
(*cache_p) = t;
arm7_9->eice_cache = (*cache_p);
if (arm7_9->armv4_5_common.etm)
(*cache_p)->next = etm_build_reg_cache(target,
&arm7_9->jtag_info,
arm7_9->armv4_5_common.etm);
target_set_examined(target);
}
if ((retval = embeddedice_setup(target)) != ERROR_OK)
return retval;
if ((retval = arm7_9_setup(target)) != ERROR_OK)
return retval;
if (arm7_9->armv4_5_common.etm)
{
if ((retval = etm_setup(target)) != ERROR_OK)
return retval;
}
return ERROR_OK;
}
int arm7tdmi_init_target(struct command_context *cmd_ctx, struct target *target)
{
arm7tdmi_build_reg_cache(target);
@ -786,5 +750,5 @@ struct target_type arm7tdmi_target =
.register_commands = arm7_9_register_commands,
.target_create = arm7tdmi_target_create,
.init_target = arm7tdmi_init_target,
.examine = arm7tdmi_examine,
.examine = arm7_9_examine,
};

1
src/target/arm7tdmi.h
View File

@ -35,6 +35,5 @@ struct arm7tdmi_common
int arm7tdmi_init_arch_info(struct target *target, struct arm7tdmi_common *arm7tdmi, struct jtag_tap *tap);
int arm7tdmi_init_target(struct command_context *cmd_ctx, struct target *target);
int arm7tdmi_examine(struct target *target);
#endif /* ARM7TDMI_H */

2
src/target/arm920t.c
View File

@ -1420,7 +1420,7 @@ struct target_type arm920t_target =
.register_commands = arm920t_register_commands,
.target_create = arm920t_target_create,
.init_target = arm9tdmi_init_target,
.examine = arm9tdmi_examine,
.examine = arm7_9_examine,
.mrc = arm920t_mrc,
.mcr = arm920t_mcr,
};

2
src/target/arm926ejs.c
View File

@ -877,7 +877,7 @@ struct target_type arm926ejs_target =
.register_commands = arm926ejs_register_commands,
.target_create = arm926ejs_target_create,
.init_target = arm9tdmi_init_target,
.examine = arm9tdmi_examine,
.examine = arm7_9_examine,
.virt2phys = arm926ejs_virt2phys,
.mmu = arm926ejs_mmu,

2
src/target/arm966e.c
View File

@ -268,5 +268,5 @@ struct target_type arm966e_target =
.register_commands = arm966e_register_commands,
.target_create = arm966e_target_create,
.init_target = arm9tdmi_init_target,
.examine = arm9tdmi_examine,
.examine = arm7_9_examine,
};

37
src/target/arm9tdmi.c
View File

@ -742,41 +742,6 @@ static void arm9tdmi_build_reg_cache(struct target *target)
armv4_5->core_cache = (*cache_p);
}
int arm9tdmi_examine(struct target *target)
{
int retval;
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
if (!target_was_examined(target))
{
struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
struct reg_cache *t;
/* one extra register (vector catch) */
t = embeddedice_build_reg_cache(target, arm7_9);
if (t == NULL)
return ERROR_FAIL;
(*cache_p) = t;
arm7_9->eice_cache = (*cache_p);
if (arm7_9->armv4_5_common.etm)
(*cache_p)->next = etm_build_reg_cache(target,
&arm7_9->jtag_info,
arm7_9->armv4_5_common.etm);
target_set_examined(target);
}
if ((retval = embeddedice_setup(target)) != ERROR_OK)
return retval;
if ((retval = arm7_9_setup(target)) != ERROR_OK)
return retval;
if (arm7_9->armv4_5_common.etm)
{
if ((retval = etm_setup(target)) != ERROR_OK)
return retval;
}
return ERROR_OK;
}
int arm9tdmi_init_target(struct command_context *cmd_ctx,
struct target *target)
{
@ -986,5 +951,5 @@ struct target_type arm9tdmi_target =
.register_commands = arm9tdmi_register_commands,
.target_create = arm9tdmi_target_create,
.init_target = arm9tdmi_init_target,
.examine = arm9tdmi_examine,
.examine = arm7_9_examine,
};

1
src/target/arm9tdmi.h
View File

@ -53,7 +53,6 @@ enum arm9tdmi_vector_bit
int arm9tdmi_init_target(struct command_context *cmd_ctx,
struct target *target);
int arm9tdmi_examine(struct target *target);
int arm9tdmi_init_arch_info(struct target *target,
struct arm9tdmi_common *arm9tdmi, struct jtag_tap *tap);
int arm9tdmi_register_commands(struct command_context *cmd_ctx);

2
src/target/fa526.c
View File

@ -393,5 +393,5 @@ struct target_type fa526_target =
.register_commands = arm920t_register_commands,
.target_create = fa526_target_create,
.init_target = arm9tdmi_init_target,
.examine = arm9tdmi_examine,
.examine = arm7_9_examine,
};

2
src/target/feroceon.c
View File

@ -646,7 +646,7 @@ int feroceon_examine(struct target *target)
struct arm7_9_common *arm7_9;
int retval;
retval = arm9tdmi_examine(target);
retval = arm7_9_examine(target);
if (retval != ERROR_OK)
return retval;