tcl: Support for Analog Devices ADSP-SC58x

target tcl to enable debugging of ARM Cortex-A5 on ADSP-SC58x

Change-Id: I378f8b94b7d6d6b9d0567985abc0e36aea7c8dea
Signed-off-by: Peter Lawrence <majbthrd@gmail.com>
Reviewed-on: http://openocd.zylin.com/3125
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
This commit is contained in:
Peter Lawrence 2015-11-27 17:28:16 -06:00 committed by Paul Fertser
parent 4732471b2e
commit ab9d92490c
1 changed files with 45 additions and 0 deletions

45
tcl/target/adsp-sc58x.cfg Normal file
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# Analog Devices ADSP-SC58x (ARM Cortex-A5 plus one or two SHARC+ DSPs)
# evaluation boards by Analog Devices (and designs derived from them) use a non-standard 10-pin 0.05" ARM Cortex Debug Connector
# pin 9 (GND or GNDDetect) has been usurped with JTAG /TRST
# as a result, a standards-compliant debug pod will only force the processor's debug interface into reset, preventing usage
# so, a connector adapter must be employed on these boards to isolate or otherwise prevent /TRST from being asserted
transport select swd
source [find target/swj-dp.tcl]
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME ADSP-SC58x
}
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x3BA02477
}
swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_a -endian $_ENDIAN -chain-position $_TARGETNAME
$_TARGETNAME configure -event examine-end {
global _TARGETNAME
sc58x_enabledebug $_TARGETNAME
}
proc sc58x_enabledebug {target} {
# Enable debugging functionality by setting relevant bits in the TAPC_DBGCTL register
# the "phys" option is critical; the OpenOCD Cortex-A target code prevents normal mww when the target is not halted
# however, it is not possible to halt the target unless these register bits have been set
$target mww phys 0x31131000 0xFFFF
}