- updated docs with new commands/features
- added deprecated/removed commands chapter git-svn-id: svn://svn.berlios.de/openocd/trunk@521 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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doc/openocd.texi
293
doc/openocd.texi
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@ -50,6 +50,7 @@ This manual documents edition @value{EDITION} of the Open On-Chip Debugger
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* Commands:: Openocd Commands
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* Sample Scripts:: Sample Target Scripts
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* GDB and Openocd:: Using GDB and Openocd
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* Upgrading:: Deprecated/Removed Commands
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* FAQ:: Frequently Asked Questions
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* License:: GNU Free Documentation License
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* Index:: Main index.
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@ -162,6 +163,14 @@ build properly.}
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@option{--enable-ft2232_libftdi}
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@item
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@option{--with-ftd2xx=/path/to/d2xx/}
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@item
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@option{--enable-gw16012}
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@item
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@option{--enable-usbprog}
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@item
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@option{--enable-presto_libftdi}
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@item
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@option{--enable-presto_ftd2xx}
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@end itemize
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If you want to access the parallel port using the PPDEV interface you have to specify
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@ -237,8 +246,9 @@ Default behaviour is <@var{disable}>
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Set to <@var{enable}> so that openocd will program the flash memory when a
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vFlash packet is received.
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Default behaviour is <@var{disable}>
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@item @b{daemon_startup} <@var{mode}> either @samp{attach} or @samp{reset}
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@item @b{daemon_startup} <@var{mode}>
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@cindex daemon_startup
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@option{mode} can either @option{attach} or @option{reset}
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Tells the OpenOCD whether it should reset the target when the daemon is launched, or
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if it should just attach to the target.
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@end itemize
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@ -251,25 +261,37 @@ if it should just attach to the target.
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Use the interface driver <@var{name}> to connect to the target. Currently supported
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interfaces are
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@itemize @minus
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@item parport
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@item @b{parport}
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PC parallel port bit-banging (Wigglers, PLD download cable, ...)
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@end itemize
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@itemize @minus
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@item amt_jtagaccel
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@item @b{amt_jtagaccel}
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Amontec Chameleon in its JTAG Accelerator configuration connected to a PC's EPP
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mode parallel port
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@end itemize
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@itemize @minus
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@item ft2232
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@item @b{ft2232}
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FTDI FT2232 based devices using either the open-source libftdi or the binary only
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FTD2XX driver. The FTD2XX is superior in performance, but not available on every
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platform. The libftdi uses libusb, and should be portable to all systems that provide
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libusb.
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@end itemize
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@itemize @minus
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@item ep93xx
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@item @b{ep93xx}
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Cirrus Logic EP93xx based single-board computer bit-banging (in development)
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@end itemize
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@itemize @minus
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@item @b{presto}
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ASIX PRESTO USB JTAG programmer.
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@end itemize
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@itemize @minus
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@item @b{usbprog}
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usbprog is a freely programmable USB adapter.
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@end itemize
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@itemize @minus
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@item @b{gw16012}
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Gateworks GW16012 JTAG programmer.
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@end itemize
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@end itemize
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@itemize @bullet
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@ -281,10 +303,6 @@ speed is used during reset and post reset speed after reset. post reset speed
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is optional, in which case the reset speed is used.
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@itemize @minus
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@item wiggler: maximum speed / @var{number}
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@item ft2232: 6MHz / (@var{number}+1)
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@item amt jtagaccel: 8 / 2**@var{number}
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@ -304,18 +322,21 @@ is not supported, then an error is reported.
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@cindex reset_config
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The configuration of the reset signals available on the JTAG interface AND the target.
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If the JTAG interface provides SRST, but the target doesn't connect that signal properly,
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then OpenOCD can't use it. <@var{signals}> can be @samp{none}, @samp{trst_only},
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@samp{srst_only} or @samp{trst_and_srst}.
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then OpenOCD can't use it. <@var{signals}> can be @option{none}, @option{trst_only},
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@option{srst_only} or @option{trst_and_srst}.
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[@var{combination}] is an optional value specifying broken reset signal implementations.
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@samp{srst_pulls_trst} states that the testlogic is reset together with the reset of
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the system (e.g. Philips LPC2000, "broken" board layout), @samp{trst_pulls_srst} says
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@option{srst_pulls_trst} states that the testlogic is reset together with the reset of
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the system (e.g. Philips LPC2000, "broken" board layout), @option{trst_pulls_srst} says
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that the system is reset together with the test logic (only hypothetical, I haven't
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seen hardware with such a bug, and can be worked around).
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@option{combined} imples both @option{srst_pulls_trst} and @option{trst_pulls_srst}.
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The default behaviour if no option given is @option{separate}.
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The [@var{trst_type}] and [@var{srst_type}] parameters allow the driver type of the
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reset lines to be specified. Possible values are @samp{trst_push_pull} (default)
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and @samp{trst_open_drain} for the test reset signal, and @samp{srst_open_drain}
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(default) and @samp{srst_push_pull} for the system reset. These values only affect
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reset lines to be specified. Possible values are @option{trst_push_pull} (default)
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and @option{trst_open_drain} for the test reset signal, and @option{srst_open_drain}
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(default) and @option{srst_push_pull} for the system reset. These values only affect
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JTAG interfaces with support for different drivers, like the Amontec JTAGkey and JTAGAccelerator.
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@item @b{jtag_device} <@var{IR length}> <@var{IR capture}> <@var{IR mask}> <@var{IDCODE instruction}>
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@ -365,28 +386,28 @@ you may encounter a problem.
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The layout of the parallel port cable used to connect to the target.
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Currently supported cables are
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@itemize @minus
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@item wiggler
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@item @b{wiggler}
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@cindex wiggler
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Original Wiggler layout, also supported by several clones, such
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as the Olimex ARM-JTAG
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@item old_amt_wiggler
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@item @b{old_amt_wiggler}
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@cindex old_amt_wiggler
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The Wiggler configuration that comes with Amontec's Chameleon Programmer. The new
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version available from the website uses the original Wiggler layout ('@var{wiggler}')
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@item chameleon
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@item @b{chameleon}
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@cindex chameleon
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Describes the connection of the Amontec Chameleon's CPLD when operated in
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configuration mode. This is only used to program the Chameleon itself, not
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a connected target.
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@item dlc5
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@item @b{dlc5}
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@cindex dlc5
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Xilinx Parallel cable III.
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@item triton
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@item @b{triton}
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@cindex triton
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The parallel port adapter found on the 'Karo Triton 1 Development Board'.
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This is also the layout used by the HollyGates design
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(see @uref{http://www.lartmaker.nl/projects/jtag/}).
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@item flashlink
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@item @b{flashlink}
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@cindex flashlink
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ST Parallel cable.
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@end itemize
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@ -415,28 +436,28 @@ default value is used. This setting is only valid if compiled with FTD2XX suppor
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The layout of the FT2232 GPIO signals used to control output-enables and reset
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signals. Valid layouts are
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@itemize @minus
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@item usbjtag
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@item @b{usbjtag}
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The "USBJTAG-1" layout described in the original OpenOCD diploma thesis
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@item jtagkey
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@item @b{jtagkey}
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Amontec JTAGkey and JTAGkey-tiny
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@item signalyzer
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@item @b{signalyzer}
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Signalyzer
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@item olimex-jtag
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@item @b{olimex-jtag}
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Olimex ARM-USB-OCD
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@item m5960
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@item @b{m5960}
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American Microsystems M5960
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@item evb_lm3s811
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@item @b{evb_lm3s811}
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Luminary Micro EVB_LM3S811 as a JTAG interface (not onboard processor), no TRST or
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SRST signals on external connector
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@item comstick
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@item @b{comstick}
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Hitex STR9 comstick
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@item stm32stick
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@item @b{stm32stick}
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Hitex STM32 Performance Stick
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@item flyswatter
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@item @b{flyswatter}
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Tin Can Tools Flyswatter
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@item turtelizer2
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@item @b{turtelizer2}
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egnite Software turtelizer2
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@item oocdlink
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@item @b{oocdlink}
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OOCDLink
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@end itemize
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@ -465,16 +486,16 @@ Currently, there are no options available for the ep93xx interface.
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@cindex target
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Defines a target that should be debugged. Currently supported types are:
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@itemize @minus
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@item arm7tdmi
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@item arm720t
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@item arm9tdmi
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@item arm920t
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@item arm922t
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@item arm926ejs
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@item arm966e
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@item cortex_m3
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@item feroceon
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@item xscale
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@item @b{arm7tdmi}
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@item @b{arm720t}
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@item @b{arm9tdmi}
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@item @b{arm920t}
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@item @b{arm922t}
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@item @b{arm926ejs}
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@item @b{arm966e}
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@item @b{cortex_m3}
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@item @b{feroceon}
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@item @b{xscale}
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@end itemize
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If you want to use a target board that is not on this list, see Adding a new
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@ -484,23 +505,23 @@ Endianess may be @option{little} or @option{big}.
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The reset_mode specifies what should happen to the target when a reset occurs:
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@itemize @minus
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@item reset_halt
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@item @b{reset_halt}
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@cindex reset_halt
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Immediately request a target halt after reset. This allows targets to be debugged
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from the very first instruction. This is only possible with targets and JTAG
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interfaces that correctly implement the reset signals.
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@item reset_init
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@item @b{reset_init}
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@cindex reset_init
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Similar to @option{reset_halt}, but executes the script file defined to handle the
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'reset' event for the target. Like @option{reset_halt} this only works with
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correct reset implementations.
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@item reset_run
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@item @b{reset_run}
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@cindex reset_run
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Simply let the target run after a reset.
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@item run_and_halt
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@item @b{run_and_halt}
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@cindex run_and_halt
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Let the target run for some time (default: 1s), and then request halt.
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@item run_and_init
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@item @b{run_and_init}
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@cindex run_and_init
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A combination of @option{reset_init} and @option{run_and_halt}. The target is allowed
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to run for some time, then halted, and the @option{reset} event script is executed.
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@ -720,20 +741,20 @@ Do a hard-reset. The optional parameter specifies what should happen after the r
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This optional parameter overwrites the setting specified in the configuration file,
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making the new behaviour the default for the @option{reset} command.
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@itemize @minus
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@item run
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@item @b{run}
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@cindex reset run
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Let the target run.
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@item halt
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@item @b{halt}
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@cindex reset halt
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Immediately halt the target (works only with certain configurations).
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@item init
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@item @b{init}
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@cindex reset init
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Immediately halt the target, and execute the reset script (works only with certain
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configurations)
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@item run_and_halt
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@item @b{run_and_halt}
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@cindex reset run_and_halt
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Let the target run for a certain amount of time, then request a halt.
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@item run_and_init
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@item @b{run_and_init}
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@cindex reset run_and_init
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Let the target run for a certain amount of time, then request a halt. Execute the
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reset script once the target entered debug mode.
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@ -773,13 +794,6 @@ Dump <@var{size}> bytes of target memory starting at <@var{address}> to a
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@cindex verify_image
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Verify <@var{file}> to target memory starting at <@var{address}>.
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This will first attempt using a crc checksum, if this fails it will try a binary compare.
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@item @b{load_binary} <@var{file}> <@var{address}> [DEPRECATED]
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@cindex load_binary
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Load binary <@var{file}> to target memory at <@var{address}>
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@item @b{dump_binary} <@var{file}> <@var{address}> <@var{size}> [DEPRECATED]
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@cindex dump_binary
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Dump <@var{size}> bytes of target memory starting at <@var{address}> to a
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(binary) <@var{file}>.
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@end itemize
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@subsection Flash commands
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@ -804,13 +818,6 @@ updated information.
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@item @b{flash protect_check} <@var{num}>
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@cindex flash protect_check
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Check protection state of sectors in flash bank <num>.
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@item @b{flash erase} <@var{num}> <@var{first}> <@var{last}> [DEPRECATED]
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@cindex flash erase
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Erase sectors at bank <@var{num}>, starting at sector <@var{first}> up to and including
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<@var{last}>. Sector numbering starts at 0. Depending on the flash type, erasing might
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require the protection to be disabled first (e.g. Intel Advanced Bootblock flash using
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the CFI driver). This command was replaced by the new command
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@option{flash erase_sector} using the same syntax.
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@item @b{flash erase_sector} <@var{num}> <@var{first}> <@var{last}>
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@cindex flash erase_sector
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@ -821,21 +828,16 @@ the CFI driver).
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@item @b{flash erase_address} <@var{address}> <@var{length}>
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@cindex flash erase_address
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Erase sectors starting at <@var{address}> for <@var{length}> number of bytes
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@item @b{flash write} <@var{num}> <@var{file}> <@var{offset}> [DEPRECATED]
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@cindex flash write
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Write the binary <@var{file}> to flash bank <@var{num}>, starting at <@var{offset}>
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bytes from the beginning of the bank. This command was replaced by the new command
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@option{flash write_binary} using the same syntax.
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@item @b{flash write_binary} <@var{num}> <@var{file}> <@var{offset}>
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@cindex flash write_binary
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@item @b{flash write_bank} <@var{num}> <@var{file}> <@var{offset}>
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@cindex flash write_bank
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Write the binary <@var{file}> to flash bank <@var{num}>, starting at
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<@option{offset}> bytes from the beginning of the bank.
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<@option{offset}> bytes from the beginning of the bank.
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@item @b{flash write_image} <@var{file}> [@var{offset}] [@var{type}]
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@cindex flash write_image
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Write the image <@var{file}> to the current target's flash bank(s). A relocation
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[@var{offset}] can be specified and the file [@var{type}] can be specified
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explicitly as @option{bin} (binary), @option{ihex} (Intel hex), @option{elf}
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(ELF file) or @option{s19} (Motorola s19).
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(ELF file) or @option{s19} (Motorola s19).
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@item @b{flash protect} <@var{num}> <@var{first}> <@var{last}> <@option{on}|@option{off}>
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@cindex flash protect
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Enable (@var{on}) or disable (@var{off}) protection of flash sectors <@var{first}> to
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@ -964,7 +966,7 @@ or Intel XScale (XScale isn't supported yet).
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Display a list of all banked core registers, fetching the current value from every
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core mode if necessary. OpenOCD versions before rev. 60 didn't fetch the current
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register value.
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@item @b{armv4_5 core_mode} [@option{arm}|@option{thumb}]
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@item @b{armv4_5 core_mode} [@var{arm}|@var{thumb}]
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@cindex armv4_5 core_mode
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Displays the core_mode, optionally changing it to either ARM or Thumb mode.
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The target is resumed in the currently set @option{core_mode}.
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@ -976,29 +978,26 @@ The target is resumed in the currently set @option{core_mode}.
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These commands are specific to ARM7 and ARM9 targets, like ARM7TDMI, ARM720t,
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ARM920t or ARM926EJ-S.
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@itemize @bullet
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@item @b{arm7_9 sw_bkpts} <@option{enable}|@option{disable}>
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@item @b{arm7_9 sw_bkpts} <@var{enable}|@var{disable}>
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@cindex arm7_9 sw_bkpts
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Enable/disable use of software breakpoints. On ARMv4 systems, this reserves
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one of the watchpoint registers to implement software breakpoints. Disabling
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SW Bkpts frees that register again.
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@item @b{arm7_9 force_hw_bkpts} <@option{enable}|@option{disable}>
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@item @b{arm7_9 force_hw_bkpts} <@var{enable}|@var{disable}>
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@cindex arm7_9 force_hw_bkpts
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When @option{force_hw_bkpts} is enabled, the @option{sw_bkpts} support is disabled, and all
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breakpoints are turned into hardware breakpoints.
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@item @b{arm7_9 dbgrq} <@option{enable}|@option{disable}>
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@item @b{arm7_9 dbgrq} <@var{enable}|@var{disable}>
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@cindex arm7_9 dbgrq
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Enable use of the DBGRQ bit to force entry into debug mode. This should be
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safe for all but ARM7TDMI--S cores (like Philips LPC).
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@item @b{arm7_9 fast_writes} <@option{enable}|@option{disable}>
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@cindex arm7_9 fast_writes [DEPRECATED]
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See @option{arm7_9 fast_memory_access} instead.
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@item @b{arm7_9 fast_memory_access} <@option{enable}|@option{disable}>
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@item @b{arm7_9 fast_memory_access} <@var{enable}|@var{disable}>
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@cindex arm7_9 fast_memory_access
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Allow the OpenOCD to read and write memory without checking completion of
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the operation. This provides a huge speed increase, especially with USB JTAG
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cables (FT2232), but might be unsafe if used with targets running at a very low
|
||||
speed, like the 32kHz startup clock of an AT91RM9200.
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@item @b{arm7_9 dcc_downloads} <@option{enable}|@option{disable}>
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@item @b{arm7_9 dcc_downloads} <@var{enable}|@var{disable}>
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@cindex arm7_9 dcc_downloads
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Enable the use of the debug communications channel (DCC) to write larger (>128 byte)
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amounts of memory. DCC downloads offer a huge speed increase, but might be potentially
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|
|
@ -1006,10 +1005,56 @@ unsafe, especially with targets running at a very low speed. This command was in
|
|||
with OpenOCD rev. 60.
|
||||
@end itemize
|
||||
|
||||
@subsection ARM720T specific commands
|
||||
@cindex ARM720T specific commands
|
||||
|
||||
@itemize @bullet
|
||||
@item @b{arm720t cp15} <@var{num}> [@var{value}]
|
||||
@cindex arm720t cp15
|
||||
display/modify cp15 register <@option{num}> [@option{value}].
|
||||
@item @b{arm720t md<bhw>_phys} <@var{addr}> [@var{count}]
|
||||
@cindex arm720t md<bhw>_phys
|
||||
Display memory at physical address addr.
|
||||
@item @b{arm720t mw<bhw>_phys} <@var{addr}> <@var{value}>
|
||||
@cindex arm720t mw<bhw>_phys
|
||||
Write memory at physical address addr.
|
||||
@item @b{arm720t virt2phys} <@var{va}>
|
||||
@cindex arm720t virt2phys
|
||||
Translate a virtual address to a physical address.
|
||||
@end itemize
|
||||
|
||||
@subsection ARM9TDMI specific commands
|
||||
@cindex ARM9TDMI specific commands
|
||||
|
||||
@itemize @bullet
|
||||
@item @b{arm9tdmi vector_catch} <@var{all}|@var{none}>
|
||||
@cindex arm9tdmi vector_catch
|
||||
Catch arm9 interrupt vectors, can be @option{all} @option{none} or any of the following:
|
||||
@option{reset} @option{undef} @option{swi} @option{pabt} @option{dabt} @option{reserved}
|
||||
@option{irq} @option{fiq}.
|
||||
|
||||
Can also be used on other arm9 based cores, arm966, arm920t and arm926ejs.
|
||||
@end itemize
|
||||
|
||||
@subsection ARM966E specific commands
|
||||
@cindex ARM966E specific commands
|
||||
|
||||
@itemize @bullet
|
||||
@item @b{arm966e cp15} <@var{num}> [@var{value}]
|
||||
@cindex arm966e cp15
|
||||
display/modify cp15 register <@option{num}> [@option{value}].
|
||||
@end itemize
|
||||
|
||||
@subsection ARM920T specific commands
|
||||
@cindex ARM920T specific commands
|
||||
|
||||
@itemize @bullet
|
||||
@item @b{arm920t cp15} <@var{num}> [@var{value}]
|
||||
@cindex arm920t cp15
|
||||
display/modify cp15 register <@option{num}> [@option{value}].
|
||||
@item @b{arm920t cp15i} <@var{num}> [@var{value}] [@var{address}]
|
||||
@cindex arm920t cp15i
|
||||
display/modify cp15 (interpreted access) <@option{opcode}> [@option{value}] [@option{address}]
|
||||
@item @b{arm920t cache_info}
|
||||
@cindex arm920t cache_info
|
||||
Print information about the caches found. This allows you to see if your target
|
||||
|
|
@ -1026,11 +1071,32 @@ Dump the content of ICache and DCache to a file.
|
|||
@item @b{arm920t read_mmu} <@var{filename}>
|
||||
@cindex arm920t read_mmu
|
||||
Dump the content of the ITLB and DTLB to a file.
|
||||
@item @b{arm920t virt2phys} <@var{VA}>
|
||||
@item @b{arm920t virt2phys} <@var{va}>
|
||||
@cindex arm920t virt2phys
|
||||
Translate a virtual address to a physical address.
|
||||
@end itemize
|
||||
|
||||
@subsection ARM926EJS specific commands
|
||||
@cindex ARM926EJS specific commands
|
||||
|
||||
@itemize @bullet
|
||||
@item @b{arm926ejs cp15} <@var{num}> [@var{value}]
|
||||
@cindex arm926ejs cp15
|
||||
display/modify cp15 register <@option{num}> [@option{value}].
|
||||
@item @b{arm926ejs cache_info}
|
||||
@cindex arm926ejs cache_info
|
||||
Print information about the caches found.
|
||||
@item @b{arm926ejs md<bhw>_phys} <@var{addr}> [@var{count}]
|
||||
@cindex arm926ejs md<bhw>_phys
|
||||
Display memory at physical address addr.
|
||||
@item @b{arm926ejs mw<bhw>_phys} <@var{addr}> <@var{value}>
|
||||
@cindex arm926ejs mw<bhw>_phys
|
||||
Write memory at physical address addr.
|
||||
@item @b{arm926ejs virt2phys} <@var{va}>
|
||||
@cindex arm926ejs virt2phys
|
||||
Translate a virtual address to a physical address.
|
||||
@end itemize
|
||||
|
||||
@page
|
||||
@section Debug commands
|
||||
@cindex Debug commands
|
||||
|
|
@ -1061,9 +1127,9 @@ encoding of the [M4:M0] bits of the PSR.
|
|||
@item @b{scan_chain}
|
||||
@cindex scan_chain
|
||||
Print current scan chain configuration.
|
||||
@item @b{jtag_reset}
|
||||
@item @b{jtag_reset} <@var{trst}> <@var{srst}>
|
||||
@cindex jtag_reset
|
||||
Toggle reset lines <@var{trst}> <@var{srst}>.
|
||||
Toggle reset lines.
|
||||
@item @b{endstate} <@var{tap_state}>
|
||||
@cindex endstate
|
||||
Finish JTAG operations in <@var{tap_state}>.
|
||||
|
|
@ -1073,21 +1139,32 @@ Move to Run-Test/Idle, and execute <@var{num_cycles}>
|
|||
@item @b{statemove} [@var{tap_state}]
|
||||
@cindex statemove
|
||||
Move to current endstate or [@var{tap_state}]
|
||||
@item @b{irscan}
|
||||
@item @b{irscan} <@var{device}> <@var{instr}> [@var{dev2}] [@var{instr2}] ...
|
||||
@cindex irscan
|
||||
Execute IR scan <@var{device}> <@var{instr}> [@var{dev2}] [@var{instr2}] ...
|
||||
@item @b{drscan}
|
||||
@item @b{drscan} <@var{device}> [@var{dev2}] [@var{var2}] ...
|
||||
@cindex drscan
|
||||
Execute DR scan <@var{device}> [@var{dev2}] [@var{var2}] ...
|
||||
@item @b{verify_ircapture}
|
||||
@item @b{verify_ircapture} <@option{enable}|@option{disable}>
|
||||
@cindex verify_ircapture
|
||||
Verify value captured during Capture-IR <@option{enable}|@option{disable}>
|
||||
@item @b{var}
|
||||
Verify value captured during Capture-IR. Default is enabled.
|
||||
@item @b{var} <@var{name}> [@var{num_fields}|@var{del}] [@var{size1}] ...
|
||||
@cindex var
|
||||
Allocate, display or delete variable <@var{name}> [@var{num_fields}|@var{del}] [@var{size1}] ...
|
||||
@item @b{field}
|
||||
@item @b{field} <@var{var}> <@var{field}> [@var{value}|@var{flip}]
|
||||
@cindex field
|
||||
Display/modify variable field <@var{var}> <@var{field}> [@var{value}|@var{flip}]
|
||||
Display/modify variable field <@var{var}> <@var{field}> [@var{value}|@var{flip}].
|
||||
@end itemize
|
||||
|
||||
@page
|
||||
@section Target Requests
|
||||
@cindex Target Requests
|
||||
Openocd can handle certain target requests, currently debugmsg are only supported for arm7_9 and cortex_m3.
|
||||
See libdcc in the contrib dir for more details.
|
||||
@itemize @bullet
|
||||
@item @b{target_request debugmsgs} <@var{enable}|@var{disable}>
|
||||
@cindex target_request debugmsgs
|
||||
Enable/disable target debugmsgs requests. debugmsgs enable messages to be sent to the debugger while the target is running.
|
||||
@end itemize
|
||||
|
||||
@node Sample Scripts
|
||||
|
|
@ -1822,6 +1899,32 @@ target_script 0 gdb_program_config config.script
|
|||
To verify any flash programming the gdb command @option{compare-sections}
|
||||
can be used.
|
||||
|
||||
@node Upgrading
|
||||
@chapter Deprecated/Removed Commands
|
||||
@cindex Deprecated/Removed Commands
|
||||
Certain openocd commands have been deprecated/removed during the various revisions.
|
||||
|
||||
@itemize @bullet
|
||||
@item @b{load_binary}
|
||||
@cindex load_binary
|
||||
use @option{load_image} command with same args
|
||||
@item @b{dump_binary}
|
||||
@cindex dump_binary
|
||||
use @option{dump_image} command with same args
|
||||
@item @b{flash erase}
|
||||
@cindex flash erase
|
||||
use @option{flash erase_sector} command with same args
|
||||
@item @b{flash write}
|
||||
@cindex flash write
|
||||
use @option{flash write_bank} command with same args
|
||||
@item @b{flash write_binary}
|
||||
@cindex flash write_binary
|
||||
use @option{flash write_bank} command with same args
|
||||
@item @b{arm7_9 fast_writes}
|
||||
@cindex arm7_9 fast_writes
|
||||
use @option{arm7_9 fast_memory_access} command with same args
|
||||
@end itemize
|
||||
|
||||
@node FAQ
|
||||
@chapter FAQ
|
||||
@cindex faq
|
||||
|
|
|
|||
Loading…
Reference in New Issue