doc: fix over/underfull hboxes in PDF
This adds some cosmetic changes to make the PDF User Manual look
proper.
Building it now requires Texinfo 5.0 which shouldn't be problematic
according to [0]. Commit 79fdeb37f4 is
effectively reverted.
[0] https://repology.org/project/texinfo/versions
Change-Id: I990bc23bdb53d24c302b26d74fd770ea738e4096
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/5995
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This commit is contained in:
Paul Fertser
Antonio Borneo
parent
cc79bcd587
commit
b5098754cf
2
README
2
README
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@ -216,7 +216,7 @@ Additionally, for building from git:
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- autoconf >= 2.64
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- automake >= 1.14
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- texinfo
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- texinfo >= 5.0
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USB-based adapters depend on libusb-1.0 and some older drivers require
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libusb-0.1 or libusb-compat-0.1. A compatible implementation, such as
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@ -4547,8 +4547,10 @@ The current implementation supports three JTAG TAP cores:
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@end itemize
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And two debug interfaces cores:
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@itemize @minus
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@item @code{Advanced debug interface} (See: @url{http://opencores.org/project@comma{}adv_debug_sys})
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@item @code{SoC Debug Interface} (See: @url{http://opencores.org/project@comma{}dbg_interface})
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@item @code{Advanced debug interface}
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@*(See: @url{http://opencores.org/project@comma{}adv_debug_sys})
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@item @code{SoC Debug Interface}
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@*(See: @url{http://opencores.org/project@comma{}dbg_interface})
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@end itemize
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@item @code{quark_d20xx} -- an Intel Quark D20xx core.
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@item @code{quark_x10xx} -- an Intel Quark X10xx core.
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@ -5616,8 +5618,10 @@ is attempted. If this fails or gives inappropriate results, manual setting is
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required (see 'set' command).
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@example
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flash bank $_FLASHNAME stmqspi 0x90000000 0 0 0 $_TARGETNAME 0xA0001000
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flash bank $_FLASHNAME stmqspi 0x70000000 0 0 0 $_TARGETNAME 0xA0001400
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flash bank $_FLASHNAME stmqspi 0x90000000 0 0 0 \
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$_TARGETNAME 0xA0001000
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flash bank $_FLASHNAME stmqspi 0x70000000 0 0 0 \
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$_TARGETNAME 0xA0001400
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@end example
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There are three specific commands
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@ -5655,11 +5659,13 @@ Note the hardware dictated subtle difference of those two cases in dual-flash mo
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To check basic communication settings, issue
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@example
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stmqspi cmd bank_id 0 0x04; stmqspi cmd bank_id 1 0x05; stmqspi cmd bank_id 0 0x06; stmqspi cmd bank_id 1 0x05
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stmqspi cmd bank_id 0 0x04; stmqspi cmd bank_id 1 0x05
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stmqspi cmd bank_id 0 0x06; stmqspi cmd bank_id 1 0x05
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@end example
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for single flash mode or
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@example
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stmqspi cmd bank_id 0 0x04; stmqspi cmd bank_id 2 0x05; stmqspi cmd bank_id 0 0x06; stmqspi cmd bank_id 2 0x05
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stmqspi cmd bank_id 0 0x04; stmqspi cmd bank_id 2 0x05
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stmqspi cmd bank_id 0 0x06; stmqspi cmd bank_id 2 0x05
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@end example
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for dual flash mode. This should return the status register contents.
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@ -5717,9 +5723,9 @@ CS1/CS2 is routed to on the given SoC.
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@example
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flash bank $_FLASHNAME ath79 0xbf000000 0 0 0 $_TARGETNAME
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# When using multiple chipselects the base should be different for each,
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# otherwise the write_image command is not able to distinguish the
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# banks.
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# When using multiple chipselects the base should be different
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# for each, otherwise the write_image command is not able to
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# distinguish the banks.
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flash bank flash0 ath79 0xbf000000 0 0 0 $_TARGETNAME cs0
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flash bank flash1 ath79 0x10000000 0 0 0 $_TARGETNAME cs1
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flash bank flash2 ath79 0x20000000 0 0 0 $_TARGETNAME cs2
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@ -5880,7 +5886,8 @@ reserved-bits are masked out and cannot be changed.
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NVMUSERROW: 0xFFFFFC5DD8E0C788
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# Write 0xFFFFFC5DD8E0C788 to user row
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>at91samd nvmuserrow 0xFFFFFC5DD8E0C788
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# Write 0x12300 to user row but leave other bits and low byte unchanged
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# Write 0x12300 to user row but leave other bits and low
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# byte unchanged
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>at91samd nvmuserrow 0x12345 0xFFF00
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@end example
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@end deffn
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@ -6028,8 +6035,9 @@ The reserved fields are always masked out and cannot be changed.
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USER PAGE: 0xAEECFF80FE9A9239
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# Write
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>atsame5 userpage 0xAEECFF80FE9A9239
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# Write 2 to SEESBLK and 4 to SEEPSZ fields but leave other bits unchanged
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# (setup SmartEEPROM of virtual size 8192 bytes)
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# Write 2 to SEESBLK and 4 to SEEPSZ fields but leave other
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# bits unchanged (setup SmartEEPROM of virtual size 8192
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# bytes)
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>atsame5 userpage 0x4200000000 0x7f00000000
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@end example
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@end deffn
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@ -6788,7 +6796,8 @@ The driver probes for a number of these chips and autoconfigures itself,
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apart from the base address.
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@example
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flash bank $_CHIPNAME.eeprom psoc5lp_eeprom 0x40008000 0 0 0 $_TARGETNAME
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flash bank $_CHIPNAME.eeprom psoc5lp_eeprom 0x40008000 0 0 0 \
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$_TARGETNAME
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@end example
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@end deffn
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@ -6842,19 +6851,31 @@ automatically by parsing data in SPCIF_GEOMETRY register.
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PSoC6 is equipped with NOR Flash so erased Flash reads as 0x00.
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@example
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flash bank main_flash_cm0 psoc6 0x10000000 0 0 0 $@{TARGET@}.cm0
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flash bank work_flash_cm0 psoc6 0x14000000 0 0 0 $@{TARGET@}.cm0
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flash bank super_flash_user_cm0 psoc6 0x16000800 0 0 0 $@{TARGET@}.cm0
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flash bank super_flash_nar_cm0 psoc6 0x16001A00 0 0 0 $@{TARGET@}.cm0
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flash bank super_flash_key_cm0 psoc6 0x16005A00 0 0 0 $@{TARGET@}.cm0
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flash bank super_flash_toc2_cm0 psoc6 0x16007C00 0 0 0 $@{TARGET@}.cm0
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flash bank main_flash_cm0 psoc6 0x10000000 0 0 0 \
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$@{TARGET@}.cm0
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flash bank work_flash_cm0 psoc6 0x14000000 0 0 0 \
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$@{TARGET@}.cm0
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flash bank super_flash_user_cm0 psoc6 0x16000800 0 0 0 \
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$@{TARGET@}.cm0
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flash bank super_flash_nar_cm0 psoc6 0x16001A00 0 0 0 \
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$@{TARGET@}.cm0
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flash bank super_flash_key_cm0 psoc6 0x16005A00 0 0 0 \
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$@{TARGET@}.cm0
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flash bank super_flash_toc2_cm0 psoc6 0x16007C00 0 0 0 \
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$@{TARGET@}.cm0
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flash bank main_flash_cm4 psoc6 0x10000000 0 0 0 $@{TARGET@}.cm4
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flash bank work_flash_cm4 psoc6 0x14000000 0 0 0 $@{TARGET@}.cm4
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flash bank super_flash_user_cm4 psoc6 0x16000800 0 0 0 $@{TARGET@}.cm4
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flash bank super_flash_nar_cm4 psoc6 0x16001A00 0 0 0 $@{TARGET@}.cm4
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flash bank super_flash_key_cm4 psoc6 0x16005A00 0 0 0 $@{TARGET@}.cm4
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flash bank super_flash_toc2_cm4 psoc6 0x16007C00 0 0 0 $@{TARGET@}.cm4
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flash bank main_flash_cm4 psoc6 0x10000000 0 0 0 \
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$@{TARGET@}.cm4
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flash bank work_flash_cm4 psoc6 0x14000000 0 0 0 \
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$@{TARGET@}.cm4
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flash bank super_flash_user_cm4 psoc6 0x16000800 0 0 0 \
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$@{TARGET@}.cm4
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flash bank super_flash_nar_cm4 psoc6 0x16001A00 0 0 0 \
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$@{TARGET@}.cm4
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flash bank super_flash_key_cm4 psoc6 0x16005A00 0 0 0 \
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$@{TARGET@}.cm4
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flash bank super_flash_toc2_cm4 psoc6 0x16007C00 0 0 0 \
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$@{TARGET@}.cm4
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@end example
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psoc6-specific commands
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@ -7110,7 +7131,8 @@ will be touched).
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Example usage:
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@example
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# swap bank 1 and bank 2 in dual bank devices, by setting SWAP_BANK_OPT bit in OPTSR_PRG
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# swap bank 1 and bank 2 in dual bank devices
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# by setting SWAP_BANK_OPT bit in OPTSR_PRG
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stm32h7x option_write 0 0x20 0x8000000 0x8000000
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@end example
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@end deffn
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@ -10069,7 +10091,7 @@ Perform a 32-bit DMI write of value at address.
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Synopsys DesignWare ARC Processors are a family of 32-bit CPUs that SoC
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designers can optimize for a wide range of uses, from deeply embedded to
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high-performance host applications in a variety of market segments. See more
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at: http://www.synopsys.com/IP/ProcessorIP/ARCProcessors/Pages/default.aspx.
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at: @url{http://www.synopsys.com/IP/ProcessorIP/ARCProcessors/Pages/default.aspx}.
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OpenOCD currently supports ARC EM processors.
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There is a set ARC-specific OpenOCD commands that allow low-level
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access to the core and provide necessary support for ARC extensibility and
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@ -10681,7 +10703,8 @@ target remote localhost:3333
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@item
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A pipe connection is typically started as follows:
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@example
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target extended-remote | openocd -c "gdb_port pipe; log_output openocd.log"
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target extended-remote | \
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openocd -c "gdb_port pipe; log_output openocd.log"
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@end example
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This would cause GDB to run OpenOCD and communicate using pipes (stdin/stdout).
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Using this method has the advantage of GDB starting/stopping OpenOCD for the debug
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@ -10895,17 +10918,11 @@ Cyg_Thread::thread_list, Cyg_Scheduler_Base::current_thread.
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@item ThreadX symbols
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_tx_thread_current_ptr, _tx_thread_created_ptr, _tx_thread_created_count.
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@item FreeRTOS symbols
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@c The following is taken from recent texinfo to provide compatibility
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@c with ancient versions that do not support @raggedright
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@tex
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\begingroup
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\rightskip0pt plus2em \spaceskip.3333em \xspaceskip.5em\relax
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@raggedright
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pxCurrentTCB, pxReadyTasksLists, xDelayedTaskList1, xDelayedTaskList2,
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pxDelayedTaskList, pxOverflowDelayedTaskList, xPendingReadyList,
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uxCurrentNumberOfTasks, uxTopUsedPriority.
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\par
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\endgroup
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@end tex
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@end raggedright
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@item linux symbols
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init_task.
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@item ChibiOS symbols
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@ -10916,11 +10933,14 @@ Rtos::sListSuspended, Rtos::sMaxPriorities, Rtos::sCurrentTaskCount.
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@item mqx symbols
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_mqx_kernel_data, MQX_init_struct.
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@item uC/OS-III symbols
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OSRunning, OSTCBCurPtr, OSTaskDbgListPtr, OSTaskQty
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OSRunning, OSTCBCurPtr, OSTaskDbgListPtr, OSTaskQty.
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@item nuttx symbols
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g_readytorun, g_tasklisttable
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g_readytorun, g_tasklisttable.
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@item RIOT symbols
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sched_threads, sched_num_threads, sched_active_pid, max_threads, _tcb_name_offset
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@raggedright
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sched_threads, sched_num_threads, sched_active_pid, max_threads,
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_tcb_name_offset.
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@end raggedright
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@end table
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For most RTOS supported the above symbols will be exported by default. However for
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