diff --git a/tcl/board/spear320cpu.cfg b/tcl/board/spear320cpu.cfg
index 71efca769..e21db3412 100644
--- a/tcl/board/spear320cpu.cfg
+++ b/tcl/board/spear320cpu.cfg
@@ -34,11 +34,18 @@ if { [info exists BOARD_HAS_SRST] } {
 
 $_TARGETNAME configure -event reset-init { spear320cpu_init }
 
+if { [info exists DDR_CHIPS] } {
+        set _DDR_CHIPS $DDR_CHIPS
+} else {
+        set _DDR_CHIPS 1
+}
+
 proc spear320cpu_init {} {
+	global _DDR_CHIPS
 	reg pc 0xffff0020;	# loop forever
 
 	sp3xx_clock_default
 	sp3xx_common_init
-	sp3xx_ddr_init "mt47h64m16_3_333_cl5_async" $DDR_CHIPS
+	sp3xx_ddr_init "mt47h64m16_3_333_cl5_async" $_DDR_CHIPS
 	sp320_init
 }