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am437x: always use highest possible JTAG clock. 

With DAP WAIT support, it's no longer necessary to start with slow
JTAG clock.

Change-Id: I2cb62c44752b27e6854637e8073e9f9501f5a660
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3190
Tested-by: jenkins
Reviewed-by: Felipe Balbi <balbi@ti.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This commit is contained in:
Matthias Welwarsky 2016-01-07 13:06:37 +01:00 committed by Paul Fertser
parent ac8471f89d
commit c520fdf902
2 changed files with 1 additions and 9 deletions
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6
tcl/board/ti_am437x_idk.cfg
View File

@ -4,13 +4,9 @@
source [find interface/ftdi/xds100v2.cfg]
transport select jtag
adapter_khz 1000
adapter_khz 30000
source [find target/am437x.cfg]
$_TARGETNAME configure -event reset-init { init_platform 0x61a11b32 }
reset_config trst_and_srst
init
ftdi_set_signal PWR_RST 1
jtag arp_init

4
tcl/target/am437x.cfg
View File

@ -993,11 +993,7 @@ proc config_ddr3 { SDRAM_CONFIG } {
proc init_platform { SDRAM_CONFIG } {
config_opp100
config_ddr3 $SDRAM_CONFIG
# now that PLLs are configured, we can run JTAG at full speed
adapter_khz 16000
}
$_TARGETNAME configure -event reset-start { adapter_khz 1000 }
$_TARGETNAME configure -event reset-init { init_platform 0x61a013b2 }
$_TARGETNAME configure -event reset-end { disable_watchdog }