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- disabled use of single-step bit for EmbeddedICE version 6 cores 

git-svn-id: svn://svn.berlios.de/openocd/trunk@128 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
drath 2007-01-26 12:40:48 +00:00
parent 30ebf9fece
commit c7383a8bea
2 changed files with 1 additions and 2 deletions
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2
src/openocd.c
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@ -18,7 +18,7 @@
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#define OPENOCD_VERSION "Open On-Chip Debugger (2006-01-25 11:30 CET)"
#define OPENOCD_VERSION "Open On-Chip Debugger (2006-01-26 13:30 CET)"
#ifdef HAVE_CONFIG_H
#include "config.h"

1
src/target/embeddedice.c
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@ -169,7 +169,6 @@ reg_cache_t* embeddedice_build_reg_cache(target_t *target, arm7_9_common_t *arm7
case 6:
reg_list[EICE_DBG_CTRL].size = 6;
reg_list[EICE_DBG_STAT].size = 10;
arm7_9->has_single_step = 1;
arm7_9->has_monitor_mode = 1;
break;
default: