diff --git a/src/target/aarch64.h b/src/target/aarch64.h index be7f246b5..2721fe747 100644 --- a/src/target/aarch64.h +++ b/src/target/aarch64.h @@ -40,6 +40,8 @@ struct aarch64_brp { struct aarch64_common { unsigned int common_magic; + struct armv8_common armv8_common; + /* Context information */ uint32_t system_control_reg; uint32_t system_control_reg_curr; @@ -55,8 +57,6 @@ struct aarch64_common { int wp_num_available; struct aarch64_brp *wp_list; - struct armv8_common armv8_common; - enum aarch64_isrmasking_mode isrmasking_mode; }; diff --git a/src/target/cortex_a.h b/src/target/cortex_a.h index 656ccea8a..37fba1a88 100644 --- a/src/target/cortex_a.h +++ b/src/target/cortex_a.h @@ -69,6 +69,8 @@ struct cortex_a_wrp { struct cortex_a_common { unsigned int common_magic; + struct armv7a_common armv7a_common; + /* Context information */ uint32_t cpudbg_dscr; @@ -96,9 +98,6 @@ struct cortex_a_common { enum cortex_a_isrmasking_mode isrmasking_mode; enum cortex_a_dacrfixup_mode dacrfixup_mode; - - struct armv7a_common armv7a_common; - }; static inline struct cortex_a_common * diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h index 54767c5df..168613590 100644 --- a/src/target/cortex_m.h +++ b/src/target/cortex_m.h @@ -201,6 +201,8 @@ enum cortex_m_isrmasking_mode { struct cortex_m_common { unsigned int common_magic; + struct armv7m_common armv7m; + /* Context information */ uint32_t dcb_dhcsr; uint32_t dcb_dhcsr_cumulated_sticky; @@ -226,7 +228,6 @@ struct cortex_m_common { enum cortex_m_isrmasking_mode isrmasking_mode; const struct cortex_m_part_info *core_info; - struct armv7m_common armv7m; bool slow_register_read; /* A register has not been ready, poll S_REGRDY */ diff --git a/src/target/mips_m4k.h b/src/target/mips_m4k.h index b563ea513..8026de232 100644 --- a/src/target/mips_m4k.h +++ b/src/target/mips_m4k.h @@ -20,8 +20,9 @@ struct target; struct mips_m4k_common { unsigned int common_magic; - bool is_pic32mx; struct mips32_common mips32; + + bool is_pic32mx; }; static inline struct mips_m4k_common *