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David Brownell <david-b@pacbell.net> "set _TARGETNAME ..." cleanup 

git-svn-id: svn://svn.berlios.de/openocd/trunk@2665 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
oharboe 2009-09-04 05:17:03 +00:00
parent 76b78feef1
commit ce89c7bf65
45 changed files with 54 additions and 49 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
tcl/target/aduc702x.cfg
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@ -36,7 +36,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
##
## Target configuration
##
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
# allocate the entire SRAM as working area

2
tcl/target/at91eb40a.cfg
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@ -34,7 +34,7 @@ reset_config srst_only srst_pulls_trst
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
#target configuration
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
# speed up memory downloads

3
tcl/target/at91r40008.cfg
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@ -28,7 +28,8 @@ reset_config srst_only srst_pulls_trst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi

2
tcl/target/at91sam3uXX.cfg
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@ -29,7 +29,7 @@ if { [info exists CPUTAPID ] } {
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
# 16K is plenty, the smallest chip has this much

2
tcl/target/at91sam7sx.cfg
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@ -21,7 +21,7 @@ if { [info exists CPUTAPID ] } {
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
$_TARGETNAME configure -event reset-init {

2
tcl/target/at91sam9260.cfg
View File

@ -35,7 +35,7 @@ jtag_rclk 3
# Target configuration
######################
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
# Internal sram1 memory

2
tcl/target/at91sam9260_ext_RAM_ext_flash.cfg
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@ -41,7 +41,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
# Target configuration
######################
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
$_TARGETNAME invoke-event halted

2
tcl/target/c100.cfg
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@ -36,7 +36,7 @@ jtag newtap $_CHIPNAME dsp -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_D
# Per ARM: DDI0211J_arm1136_r1p5_trm.pdf - the ARM 1136 as a 5 bit IR register
jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME
# C100's ARAM 64k SRAM

3
tcl/target/cs351x.cfg
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@ -19,8 +19,9 @@ if { [info exists CPUTAPID ] } {
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
# Create the GDB Target.
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME fa526 -endian $_ENDIAN -chain-position $_TARGETNAME -variant fa526
# There is 16K of SRAM on this chip
# FIXME: flash programming is not working by using this work area. So comment this out for now.
#$_TARGETNAME configure -work-area-virt 0x00000000 -work-area-phys 0x00000000 -work-area-size 0x4000 -work-area-backup 1

2
tcl/target/epc9301.cfg
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@ -23,7 +23,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
jtag_nsrst_delay 100
jtag_ntrst_delay 100
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME -work-area-virt 0 -work-area-phys 0x80014000 -work-area-size 0x1000 -work-area-backup 1
#flash configuration

3
tcl/target/feroceon.cfg
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@ -21,7 +21,8 @@ if { [info exists CPUTAPID ] } {
}
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME feroceon -endian $_ENDIAN -chain-position $_TARGETNAME
reset_config trst_and_srst

2
tcl/target/imx21.cfg
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@ -28,7 +28,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_C
# Create the GDB Target.
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
arm7_9 dcc_downloads enable

2
tcl/target/imx27.cfg
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@ -38,7 +38,7 @@ if { [info exists CPUTAPID ] } {
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
# Create the GDB Target.
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
$_TARGETNAME configure -work-area-virt 0xffff4c00 -work-area-phys 0xffff4c00 -work-area-size 0x8000 -work-area-backup 1
# Internal to the chip, there is 45K of SRAM

2
tcl/target/imx31.cfg
View File

@ -54,7 +54,7 @@ jtag newtap $_CHIPNAME whatchacallit -irlen 4 -ircapture 0 -irmask 0xf -expected
# But this conflicts with Diagram 6-13, "3bits ir and drs"
jtag newtap $_CHIPNAME smda -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_SDMATAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME

2
tcl/target/imx35.cfg
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@ -43,7 +43,7 @@ jtag newtap $_CHIPNAME whatchacallit -irlen 4 -ircapture 0 -irmask 0x0 -expected
jtag newtap $_CHIPNAME smda -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_SDMATAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME
proc power_restore {} { puts "Sensed power restore. No action." }

2
tcl/target/is5114.cfg
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@ -38,7 +38,7 @@ jtag newtap $_CHIPNAME unknown2 -irlen 5 -ircapture 1 -irmask 1
#arm946e-s and
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm966e
$_TARGETNAME configure -event reset-start { jtag_rclk 16 }

2
tcl/target/ixp42x.cfg
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@ -27,6 +27,6 @@ reset_config srst_only srst_pulls_trst
jtag newtap $_CHIPNAME cpu -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME -variant ixp42x

2
tcl/target/lpc1768.cfg
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@ -27,7 +27,7 @@ reset_config trst_and_srst srst_pulls_trst
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
# LPC1768 has 32kB of SRAM on its main system bus (so-called Local On-Chip SRAM)

3
tcl/target/lpc2103.cfg
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@ -27,8 +27,7 @@ jtag_ntrst_delay 100
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
# 8kB of internal SRAM

2
tcl/target/lpc2124.cfg
View File

@ -32,7 +32,7 @@ jtag_khz 1000
#jtag scan chain
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0

2
tcl/target/lpc2129.cfg
View File

@ -32,7 +32,7 @@ jtag_ntrst_delay 100
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0

3
tcl/target/lpc2148.cfg
View File

@ -32,8 +32,7 @@ reset_config trst_and_srst srst_pulls_trst
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0

2
tcl/target/lpc2294.cfg
View File

@ -26,7 +26,7 @@ reset_config trst_and_srst srst_pulls_trst
#jtag scan chain
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0

2
tcl/target/lpc2378.cfg
View File

@ -27,7 +27,7 @@ reset_config trst_and_srst srst_pulls_trst
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
# LPC2378 has 32kB of SRAM on its main system bus (so-called Local On-Chip SRAM)

2
tcl/target/lpc2478.cfg
View File

@ -27,7 +27,7 @@ reset_config trst_and_srst srst_pulls_trst
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
# LPC2478 has 64kB of SRAM on its main system bus (so-called Local On-Chip SRAM)

2
tcl/target/mega128.cfg
View File

@ -17,7 +17,7 @@ if { [info exists CPUTAPID ] } {
}
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME avr -endian $_ENDIAN -chain-position $_TARGETNAME
#$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0

2
tcl/target/netx500.cfg
View File

@ -29,6 +29,6 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
jtag_nsrst_delay 100
jtag_ntrst_delay 100
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs

2
tcl/target/pic32mx.cfg
View File

@ -28,7 +28,7 @@ reset_config srst_only
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME mips_m4k -endian $_ENDIAN -chain-position $_TARGETNAME
$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0xa0000000 -work-area-size 16384 -work-area-backup 0

2
tcl/target/pxa270.cfg
View File

@ -30,7 +30,7 @@ jtag_nsrst_delay 260
# the rest of the needed delays are built into the openocd program
jtag_ntrst_delay 0
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
jtag newtap $_CHIPNAME cpu -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPID
target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME -variant pxa27x

2
tcl/target/sam7se512.cfg
View File

@ -29,7 +29,7 @@ reset_config srst_only srst_pulls_trst
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
# The target
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0

4
tcl/target/sam7x256.cfg
View File

@ -21,9 +21,9 @@ if { [info exists CPUTAPID ] } {
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
$_TARGETNAME configure -event reset-init {
# disable watchdog
mww 0xfffffd44 0x00008000

2
tcl/target/samsung_s3c2410.cfg
View File

@ -25,7 +25,7 @@ reset_config trst_and_srst
#jtag scan chain
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm920t
$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x30800000 -work-area-size 0x20000 -work-area-backup 0

3
tcl/target/samsung_s3c2440.cfg
View File

@ -26,8 +26,9 @@ if { [info exists CPUTAPID ] } {
#jtag scan chain
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm920t
$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x200000 -work-area-size 0x4000 -work-area-backup 1
#reset configuration

4
tcl/target/samsung_s3c2450.cfg
View File

@ -36,7 +36,7 @@ if { [info exists CPUTAPID ] } {
#jtag scan chain
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0xE -irmask 0x0f -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
# FIX!!!!! should this really use srst_pulls_trst?
@ -46,4 +46,4 @@ target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNA
# However, without "srst_pulls_trst", then "reset halt" produces weird
# errors:
# WARNING: unknown debug reason: 0x0
reset_config trst_and_srst
reset_config trst_and_srst

2
tcl/target/samsung_s3c4510.cfg
View File

@ -20,6 +20,6 @@ if { [info exists CPUTAPID ] } {
}
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME

2
tcl/target/samsung_s3c6410.cfg
View File

@ -39,7 +39,7 @@ if { [info exists CPUTAPID ] } {
jtag newtap $_CHIPNAME unknown -irlen 4 -ircapture 0x1 -irmask 0xe -expected-id $_BSTAPID
jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm1176
jtag_nsrst_delay 500

2
tcl/target/sharp_lh79532.cfg
View File

@ -20,7 +20,7 @@ if { [info exists CPUTAPID ] } {
}
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME

2
tcl/target/smp8634.cfg
View File

@ -28,5 +28,5 @@ reset_config trst_and_srst separate
# format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME mips_m4k -endian $_ENDIAN -variant

2
tcl/target/stm32.cfg
View File

@ -57,7 +57,7 @@ if { [info exists BSTAPID ] } {
}
jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID1 -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 -expected-id $_BSTAPID4 -expected-id $_BSTAPID5
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0

3
tcl/target/str710.cfg
View File

@ -26,8 +26,9 @@ reset_config trst_and_srst srst_pulls_trst
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
$_TARGETNAME configure -event reset-start { jtag_khz 10 }
$_TARGETNAME configure -event reset-init { jtag_khz 6000 }
$_TARGETNAME configure -event gdb-flash-erase-start {

3
tcl/target/str730.cfg
View File

@ -31,8 +31,9 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_C
jtag_nsrst_delay 500
jtag_ntrst_delay 500
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
$_TARGETNAME configure -event reset-start { jtag_khz 10 }
$_TARGETNAME configure -event reset-init { jtag_khz 3000 }
$_TARGETNAME configure -event gdb-flash-erase-start {

2
tcl/target/str750.cfg
View File

@ -33,7 +33,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_C
jtag_nsrst_delay 500
jtag_ntrst_delay 500
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
$_TARGETNAME configure -event reset-start { jtag_khz 10 }

2
tcl/target/str912.cfg
View File

@ -43,7 +43,7 @@ if { [info exists BSTAPID ] } {
}
jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm966e
$_TARGETNAME configure -event reset-start { jtag_rclk 16 }

2
tcl/target/test_reset_syntax_error.cfg
View File

@ -8,7 +8,7 @@ set _CHIPNAME syntaxtest
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf
#target configuration
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
$_TARGETNAME configure -event reset-init {

3
tcl/target/xba_revA3.cfg
View File

@ -28,8 +28,9 @@ jtag_ntrst_delay 100
#jtag scan chain
jtag newtap $_CHIPNAME cpu -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME -variant ixp42x
$_TARGETNAME configure -event reset-init {
#############################################################################
# setup expansion bus CS, disable external wdt