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- rename log functions to stop conflicts under win32 (wingdi)

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git-svn-id: svn://svn.berlios.de/openocd/trunk@523 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
ntfreak 2008-03-25 15:45:17 +00:00
parent a96f96d1f0
commit d47e1b8f36
72 changed files with 1507 additions and 1515 deletions
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46
src/flash/at91sam7.c
View File

@ -243,7 +243,7 @@ void at91sam7_set_flash_mode(flash_bank_t *bank, u8 flashplane, int mode)
if (at91sam7_info->mck_freq > 30000000ul)
fws = 1;
DEBUG("fmcn[%i]: %i", flashplane, fmcn);
LOG_DEBUG("fmcn[%i]: %i", flashplane, fmcn);
fmr = fmcn << 16 | fws << 8;
target_write_u32(target, MC_FMR[flashplane], fmr);
}
@ -257,21 +257,21 @@ u32 at91sam7_wait_status_busy(flash_bank_t *bank, u8 flashplane, u32 waitbits, i
while ((!((status = at91sam7_get_flash_status(bank,flashplane)) & waitbits)) && (timeout-- > 0))
{
DEBUG("status[%i]: 0x%x", flashplane, status);
LOG_DEBUG("status[%i]: 0x%x", flashplane, status);
usleep(1000);
}
DEBUG("status[%i]: 0x%x", flashplane, status);
LOG_DEBUG("status[%i]: 0x%x", flashplane, status);
if (status & 0x0C)
{
ERROR("status register: 0x%x", status);
LOG_ERROR("status register: 0x%x", status);
if (status & 0x4)
ERROR("Lock Error Bit Detected, Operation Abort");
LOG_ERROR("Lock Error Bit Detected, Operation Abort");
if (status & 0x8)
ERROR("Invalid command and/or bad keyword, Operation Abort");
LOG_ERROR("Invalid command and/or bad keyword, Operation Abort");
if (status & 0x10)
ERROR("Security Bit Set, Operation Abort");
LOG_ERROR("Security Bit Set, Operation Abort");
}
return status;
@ -287,7 +287,7 @@ int at91sam7_flash_command(struct flash_bank_s *bank, u8 flashplane, u8 cmd, u16
fcr = (0x5A<<24) | ((pagen&0x3FF)<<8) | cmd;
target_write_u32(target, MC_FCR[flashplane], fcr);
DEBUG("Flash command: 0x%x, flashplane: %i, pagenumber:%u", fcr, flashplane, pagen);
LOG_DEBUG("Flash command: 0x%x, flashplane: %i, pagenumber:%u", fcr, flashplane, pagen);
if ((at91sam7_info->cidr_arch == 0x60)&&((cmd==SLB)|(cmd==CLB)))
{
@ -322,7 +322,7 @@ int at91sam7_read_part_info(struct flash_bank_s *bank)
if (cidr == 0)
{
WARNING("Cannot identify target as an AT91SAM");
LOG_WARNING("Cannot identify target as an AT91SAM");
return ERROR_FLASH_OPERATION_FAILED;
}
@ -363,7 +363,7 @@ int at91sam7_read_part_info(struct flash_bank_s *bank)
DEBUG("nvptyp: 0x%3.3x, arch: 0x%4.4x", at91sam7_info->cidr_nvptyp, at91sam7_info->cidr_arch );
LOG_DEBUG("nvptyp: 0x%3.3x, arch: 0x%4.4x", at91sam7_info->cidr_nvptyp, at91sam7_info->cidr_arch );
/* Read main and master clock freqency register */
at91sam7_read_clock_info(bank);
@ -384,7 +384,7 @@ int at91sam7_read_part_info(struct flash_bank_s *bank)
at91sam7_info->target_name = "AT91SAM7S512";
at91sam7_info->num_planes = 2;
if (at91sam7_info->num_planes != bank->num_sectors)
WARNING("Internal error: Number of flash planes and erase sectors does not match, please report");;
LOG_WARNING("Internal error: Number of flash planes and erase sectors does not match, please report");;
at91sam7_info->num_lockbits = 2*16;
at91sam7_info->pagesize = 256;
at91sam7_info->pages_in_lockregion = 64;
@ -437,7 +437,7 @@ int at91sam7_read_part_info(struct flash_bank_s *bank)
at91sam7_info->target_name = "AT91SAM7XC512";
at91sam7_info->num_planes = 2;
if (at91sam7_info->num_planes != bank->num_sectors)
WARNING("Internal error: Number of flash planes and erase sectors does not match, please report");;
LOG_WARNING("Internal error: Number of flash planes and erase sectors does not match, please report");;
at91sam7_info->num_lockbits = 2*16;
at91sam7_info->pagesize = 256;
at91sam7_info->pages_in_lockregion = 64;
@ -474,7 +474,7 @@ int at91sam7_read_part_info(struct flash_bank_s *bank)
at91sam7_info->target_name = "AT91SAM7SE512";
at91sam7_info->num_planes = 2;
if (at91sam7_info->num_planes != bank->num_sectors)
WARNING("Internal error: Number of flash planes and erase sectors does not match, please report");;
LOG_WARNING("Internal error: Number of flash planes and erase sectors does not match, please report");;
at91sam7_info->num_lockbits = 32;
at91sam7_info->pagesize = 256;
at91sam7_info->pages_in_lockregion = 64;
@ -511,12 +511,12 @@ int at91sam7_read_part_info(struct flash_bank_s *bank)
at91sam7_info->target_name = "AT91SAM7X512";
at91sam7_info->num_planes = 2;
if (at91sam7_info->num_planes != bank->num_sectors)
WARNING("Internal error: Number of flash planes and erase sectors does not match, please report");;
LOG_WARNING("Internal error: Number of flash planes and erase sectors does not match, please report");;
at91sam7_info->num_lockbits = 32;
at91sam7_info->pagesize = 256;
at91sam7_info->pages_in_lockregion = 64;
at91sam7_info->num_pages = 2*16*64;
DEBUG("Support for AT91SAM7X512 is experimental in this version!");
LOG_DEBUG("Support for AT91SAM7X512 is experimental in this version!");
}
if (bank->size==0x40000) /* AT91SAM7X256 */
{
@ -556,7 +556,7 @@ int at91sam7_read_part_info(struct flash_bank_s *bank)
return ERROR_OK;
}
WARNING("at91sam7 flash only tested for AT91SAM7Sxx series");
LOG_WARNING("at91sam7 flash only tested for AT91SAM7Sxx series");
return ERROR_OK;
}
@ -609,7 +609,7 @@ int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, ch
if (argc < 6)
{
WARNING("incomplete flash_bank at91sam7 configuration");
LOG_WARNING("incomplete flash_bank at91sam7 configuration");
return ERROR_FLASH_BANK_INVALID;
}
@ -643,7 +643,7 @@ int at91sam7_erase(struct flash_bank_s *bank, int first, int last)
{
if ((first == 0) && (last == (at91sam7_info->num_lockbits-1)))
{
WARNING("Sector numbers based on lockbit count, probably a deprecated script");
LOG_WARNING("Sector numbers based on lockbit count, probably a deprecated script");
last = bank->num_sectors-1;
}
else return ERROR_FLASH_SECTOR_INVALID;
@ -738,7 +738,7 @@ int at91sam7_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
if (offset % dst_min_alignment)
{
WARNING("offset 0x%x breaks required alignment 0x%x", offset, dst_min_alignment);
LOG_WARNING("offset 0x%x breaks required alignment 0x%x", offset, dst_min_alignment);
return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
}
@ -748,7 +748,7 @@ int at91sam7_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
first_page = offset/dst_min_alignment;
last_page = CEIL(offset + count, dst_min_alignment);
DEBUG("first_page: %i, last_page: %i, count %i", first_page, last_page, count);
LOG_DEBUG("first_page: %i, last_page: %i, count %i", first_page, last_page, count);
at91sam7_read_clock_info(bank);
@ -773,7 +773,7 @@ int at91sam7_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
return ERROR_FLASH_OPERATION_FAILED;
}
DEBUG("Write flash plane:%i page number:%i", flashplane, pagen);
LOG_DEBUG("Write flash plane:%i page number:%i", flashplane, pagen);
}
return ERROR_OK;
@ -914,7 +914,7 @@ int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd,
if (bank->target->state != TARGET_HALTED)
{
ERROR("target has to be halted to perform flash operation");
LOG_ERROR("target has to be halted to perform flash operation");
return ERROR_TARGET_NOT_HALTED;
}
@ -942,7 +942,7 @@ int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd,
}
status = at91sam7_get_flash_status(bank, 0);
DEBUG("at91sam7_handle_gpnvm_command: cmd 0x%x, value 0x%x, status 0x%x \n",flashcmd,bit,status);
LOG_DEBUG("at91sam7_handle_gpnvm_command: cmd 0x%x, value 0x%x, status 0x%x \n",flashcmd,bit,status);
at91sam7_info->nvmbits = (status>>8)&((1<<at91sam7_info->num_nvmbits)-1);
return ERROR_OK;

160
src/flash/cfi.c
View File

@ -139,7 +139,7 @@ __inline__ u32 flash_address(flash_bank_t *bank, int sector, u32 offset)
{
if (!bank->sectors)
{
ERROR("BUG: sector list not yet built");
LOG_ERROR("BUG: sector list not yet built");
exit(-1);
}
return bank->base + bank->sectors[sector].offset + offset * bank->bus_width;
@ -253,7 +253,7 @@ void cfi_intel_clear_status_register(flash_bank_t *bank)
if (target->state != TARGET_HALTED)
{
ERROR("BUG: attempted to clear status register while target wasn't halted");
LOG_ERROR("BUG: attempted to clear status register while target wasn't halted");
exit(-1);
}
@ -267,34 +267,34 @@ u8 cfi_intel_wait_status_busy(flash_bank_t *bank, int timeout)
while ((!((status = cfi_get_u8(bank, 0, 0x0)) & 0x80)) && (timeout-- > 0))
{
DEBUG("status: 0x%x", status);
LOG_DEBUG("status: 0x%x", status);
usleep(1000);
}
/* mask out bit 0 (reserved) */
status = status & 0xfe;
DEBUG("status: 0x%x", status);
LOG_DEBUG("status: 0x%x", status);
if ((status & 0x80) != 0x80)
{
ERROR("timeout while waiting for WSM to become ready");
LOG_ERROR("timeout while waiting for WSM to become ready");
}
else if (status != 0x80)
{
ERROR("status register: 0x%x", status);
LOG_ERROR("status register: 0x%x", status);
if (status & 0x2)
ERROR("Block Lock-Bit Detected, Operation Abort");
LOG_ERROR("Block Lock-Bit Detected, Operation Abort");
if (status & 0x4)
ERROR("Program suspended");
LOG_ERROR("Program suspended");
if (status & 0x8)
ERROR("Low Programming Voltage Detected, Operation Aborted");
LOG_ERROR("Low Programming Voltage Detected, Operation Aborted");
if (status & 0x10)
ERROR("Program Error / Error in Setting Lock-Bit");
LOG_ERROR("Program Error / Error in Setting Lock-Bit");
if (status & 0x20)
ERROR("Error in Block Erasure or Clear Lock-Bits");
LOG_ERROR("Error in Block Erasure or Clear Lock-Bits");
if (status & 0x40)
ERROR("Block Erase Suspended");
LOG_ERROR("Block Erase Suspended");
cfi_intel_clear_status_register(bank);
}
@ -315,15 +315,15 @@ int cfi_spansion_wait_status_busy(flash_bank_t *bank, int timeout)
oldstatus = cfi_get_u8(bank, 0, 0x0);
status = cfi_get_u8(bank, 0, 0x0);
if ((status ^ oldstatus) & 0x40) {
ERROR("dq5 timeout, status: 0x%x", status);
LOG_ERROR("dq5 timeout, status: 0x%x", status);
return(ERROR_FLASH_OPERATION_FAILED);
} else {
DEBUG("status: 0x%x", status);
LOG_DEBUG("status: 0x%x", status);
return(ERROR_OK);
}
}
} else {
DEBUG("status: 0x%x", status);
LOG_DEBUG("status: 0x%x", status);
return(ERROR_OK);
}
@ -331,7 +331,7 @@ int cfi_spansion_wait_status_busy(flash_bank_t *bank, int timeout)
usleep(1000);
} while (timeout-- > 0);
ERROR("timeout, status: 0x%x", status);
LOG_ERROR("timeout, status: 0x%x", status);
return(ERROR_FLASH_BUSY);
}
@ -361,32 +361,32 @@ int cfi_read_intel_pri_ext(flash_bank_t *bank)
pri_ext->major_version = cfi_query_u8(bank, 0, cfi_info->pri_addr + 3);
pri_ext->minor_version = cfi_query_u8(bank, 0, cfi_info->pri_addr + 4);
DEBUG("pri: '%c%c%c', version: %c.%c", pri_ext->pri[0], pri_ext->pri[1], pri_ext->pri[2], pri_ext->major_version, pri_ext->minor_version);
LOG_DEBUG("pri: '%c%c%c', version: %c.%c", pri_ext->pri[0], pri_ext->pri[1], pri_ext->pri[2], pri_ext->major_version, pri_ext->minor_version);
pri_ext->feature_support = cfi_query_u32(bank, 0, cfi_info->pri_addr + 5);
pri_ext->suspend_cmd_support = cfi_query_u8(bank, 0, cfi_info->pri_addr + 9);
pri_ext->blk_status_reg_mask = cfi_query_u16(bank, 0, cfi_info->pri_addr + 0xa);
DEBUG("feature_support: 0x%x, suspend_cmd_support: 0x%x, blk_status_reg_mask: 0x%x", pri_ext->feature_support, pri_ext->suspend_cmd_support, pri_ext->blk_status_reg_mask);
LOG_DEBUG("feature_support: 0x%x, suspend_cmd_support: 0x%x, blk_status_reg_mask: 0x%x", pri_ext->feature_support, pri_ext->suspend_cmd_support, pri_ext->blk_status_reg_mask);
pri_ext->vcc_optimal = cfi_query_u8(bank, 0, cfi_info->pri_addr + 0xc);
pri_ext->vpp_optimal = cfi_query_u8(bank, 0, cfi_info->pri_addr + 0xd);
DEBUG("Vcc opt: %1.1x.%1.1x, Vpp opt: %1.1x.%1.1x",
LOG_DEBUG("Vcc opt: %1.1x.%1.1x, Vpp opt: %1.1x.%1.1x",
(pri_ext->vcc_optimal & 0xf0) >> 4, pri_ext->vcc_optimal & 0x0f,
(pri_ext->vpp_optimal & 0xf0) >> 4, pri_ext->vpp_optimal & 0x0f);
pri_ext->num_protection_fields = cfi_query_u8(bank, 0, cfi_info->pri_addr + 0xe);
if (pri_ext->num_protection_fields != 1)
{
WARNING("expected one protection register field, but found %i", pri_ext->num_protection_fields);
LOG_WARNING("expected one protection register field, but found %i", pri_ext->num_protection_fields);
}
pri_ext->prot_reg_addr = cfi_query_u16(bank, 0, cfi_info->pri_addr + 0xf);
pri_ext->fact_prot_reg_size = cfi_query_u8(bank, 0, cfi_info->pri_addr + 0x11);
pri_ext->user_prot_reg_size = cfi_query_u8(bank, 0, cfi_info->pri_addr + 0x12);
DEBUG("protection_fields: %i, prot_reg_addr: 0x%x, factory pre-programmed: %i, user programmable: %i", pri_ext->num_protection_fields, pri_ext->prot_reg_addr, 1 << pri_ext->fact_prot_reg_size, 1 << pri_ext->user_prot_reg_size);
LOG_DEBUG("protection_fields: %i, prot_reg_addr: 0x%x, factory pre-programmed: %i, user programmable: %i", pri_ext->num_protection_fields, pri_ext->prot_reg_addr, 1 << pri_ext->fact_prot_reg_size, 1 << pri_ext->user_prot_reg_size);
return ERROR_OK;
}
@ -414,7 +414,7 @@ int cfi_read_spansion_pri_ext(flash_bank_t *bank)
pri_ext->major_version = cfi_query_u8(bank, 0, cfi_info->pri_addr + 3);
pri_ext->minor_version = cfi_query_u8(bank, 0, cfi_info->pri_addr + 4);
DEBUG("pri: '%c%c%c', version: %c.%c", pri_ext->pri[0], pri_ext->pri[1], pri_ext->pri[2], pri_ext->major_version, pri_ext->minor_version);
LOG_DEBUG("pri: '%c%c%c', version: %c.%c", pri_ext->pri[0], pri_ext->pri[1], pri_ext->pri[2], pri_ext->major_version, pri_ext->minor_version);
pri_ext->SiliconRevision = cfi_query_u8(bank, 0, cfi_info->pri_addr + 5);
pri_ext->EraseSuspend = cfi_query_u8(bank, 0, cfi_info->pri_addr + 6);
@ -428,20 +428,20 @@ int cfi_read_spansion_pri_ext(flash_bank_t *bank)
pri_ext->VppMax = cfi_query_u8(bank, 0, cfi_info->pri_addr + 14);
pri_ext->TopBottom = cfi_query_u8(bank, 0, cfi_info->pri_addr + 15);
DEBUG("Silicon Revision: 0x%x, Erase Suspend: 0x%x, Block protect: 0x%x", pri_ext->SiliconRevision,
LOG_DEBUG("Silicon Revision: 0x%x, Erase Suspend: 0x%x, Block protect: 0x%x", pri_ext->SiliconRevision,
pri_ext->EraseSuspend, pri_ext->BlkProt);
DEBUG("Temporary Unprotect: 0x%x, Block Protect Scheme: 0x%x, Simultaneous Ops: 0x%x", pri_ext->TmpBlkUnprotect,
LOG_DEBUG("Temporary Unprotect: 0x%x, Block Protect Scheme: 0x%x, Simultaneous Ops: 0x%x", pri_ext->TmpBlkUnprotect,
pri_ext->BlkProtUnprot, pri_ext->SimultaneousOps);
DEBUG("Burst Mode: 0x%x, Page Mode: 0x%x, ", pri_ext->BurstMode, pri_ext->PageMode);
LOG_DEBUG("Burst Mode: 0x%x, Page Mode: 0x%x, ", pri_ext->BurstMode, pri_ext->PageMode);
DEBUG("Vpp min: %2.2d.%1.1d, Vpp max: %2.2d.%1.1x",
LOG_DEBUG("Vpp min: %2.2d.%1.1d, Vpp max: %2.2d.%1.1x",
(pri_ext->VppMin & 0xf0) >> 4, pri_ext->VppMin & 0x0f,
(pri_ext->VppMax & 0xf0) >> 4, pri_ext->VppMax & 0x0f);
DEBUG("WP# protection 0x%x", pri_ext->TopBottom);
LOG_DEBUG("WP# protection 0x%x", pri_ext->TopBottom);
/* default values for implementation specific workarounds */
pri_ext->_unlock1 = cfi_unlock_addresses[CFI_UNLOCK_555_2AA].unlock1;
@ -486,7 +486,7 @@ int cfi_read_atmel_pri_ext(flash_bank_t *bank)
atmel_pri_ext.major_version = cfi_query_u8(bank, 0, cfi_info->pri_addr + 3);
atmel_pri_ext.minor_version = cfi_query_u8(bank, 0, cfi_info->pri_addr + 4);
DEBUG("pri: '%c%c%c', version: %c.%c", atmel_pri_ext.pri[0], atmel_pri_ext.pri[1], atmel_pri_ext.pri[2], atmel_pri_ext.major_version, atmel_pri_ext.minor_version);
LOG_DEBUG("pri: '%c%c%c', version: %c.%c", atmel_pri_ext.pri[0], atmel_pri_ext.pri[1], atmel_pri_ext.pri[2], atmel_pri_ext.major_version, atmel_pri_ext.minor_version);
pri_ext->major_version = atmel_pri_ext.major_version;
pri_ext->minor_version = atmel_pri_ext.minor_version;
@ -496,7 +496,7 @@ int cfi_read_atmel_pri_ext(flash_bank_t *bank)
atmel_pri_ext.burst_mode = cfi_query_u8(bank, 0, cfi_info->pri_addr + 7);
atmel_pri_ext.page_mode = cfi_query_u8(bank, 0, cfi_info->pri_addr + 8);
DEBUG("features: 0x%2.2x, bottom_boot: 0x%2.2x, burst_mode: 0x%2.2x, page_mode: 0x%2.2x",
LOG_DEBUG("features: 0x%2.2x, bottom_boot: 0x%2.2x, burst_mode: 0x%2.2x, page_mode: 0x%2.2x",
atmel_pri_ext.features, atmel_pri_ext.bottom_boot, atmel_pri_ext.burst_mode, atmel_pri_ext.page_mode);
if (atmel_pri_ext.features & 0x02)
@ -611,14 +611,14 @@ int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **
if (argc < 6)
{
WARNING("incomplete flash_bank cfi configuration");
LOG_WARNING("incomplete flash_bank cfi configuration");
return ERROR_FLASH_BANK_INVALID;
}
if ((strtoul(args[4], NULL, 0) > CFI_MAX_CHIP_WIDTH)
|| (strtoul(args[3], NULL, 0) > CFI_MAX_BUS_WIDTH))
{
ERROR("chip and bus width have to specified in bytes");
LOG_ERROR("chip and bus width have to specified in bytes");
return ERROR_FLASH_BANK_INVALID;
}
@ -677,7 +677,7 @@ int cfi_intel_erase(struct flash_bank_s *bank, int first, int last)
cfi_command(bank, 0xff, command);
target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
ERROR("couldn't erase block %i of flash bank at base 0x%x", i, bank->base);
LOG_ERROR("couldn't erase block %i of flash bank at base 0x%x", i, bank->base);
return ERROR_FLASH_OPERATION_FAILED;
}
}
@ -723,7 +723,7 @@ int cfi_spansion_erase(struct flash_bank_s *bank, int first, int last)
cfi_command(bank, 0xf0, command);
target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
ERROR("couldn't erase block %i of flash bank at base 0x%x", i, bank->base);
LOG_ERROR("couldn't erase block %i of flash bank at base 0x%x", i, bank->base);
return ERROR_FLASH_OPERATION_FAILED;
}
}
@ -761,7 +761,7 @@ int cfi_erase(struct flash_bank_s *bank, int first, int last)
return cfi_spansion_erase(bank, first, last);
break;
default:
ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
break;
}
@ -788,19 +788,19 @@ int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int last)
for (i = first; i <= last; i++)
{
cfi_command(bank, 0x60, command);
DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command));
LOG_DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command));
target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command);
if (set)
{
cfi_command(bank, 0x01, command);
DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command));
LOG_DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command));
target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command);
bank->sectors[i].is_protected = 1;
}
else
{
cfi_command(bank, 0xd0, command);
DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command));
LOG_DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command));
target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command);
bank->sectors[i].is_protected = 0;
}
@ -821,7 +821,7 @@ int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int last)
if ((block_status & 0x1) != set)
{
ERROR("couldn't change block lock status (set = %i, block_status = 0x%2.2x)", set, block_status);
LOG_ERROR("couldn't change block lock status (set = %i, block_status = 0x%2.2x)", set, block_status);
cfi_command(bank, 0x70, command);
target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command);
cfi_intel_wait_status_busy(bank, 10);
@ -889,7 +889,7 @@ int cfi_protect(struct flash_bank_s *bank, int set, int first, int last)
cfi_intel_protect(bank, set, first, last);
break;
default:
ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
break;
}
@ -961,7 +961,7 @@ u32 cfi_command_val(flash_bank_t *bank, u8 cmd)
return target_buffer_get_u32(target, buf);
break;
default :
ERROR("Unsupported bank buswidth %d, can't do block memory writes", bank->bus_width);
LOG_ERROR("Unsupported bank buswidth %d, can't do block memory writes", bank->bus_width);
return 0;
}
}
@ -1071,7 +1071,7 @@ int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u3
target_code_size = sizeof(word_32_code);
break;
default:
ERROR("Unsupported bank buswidth %d, can't do block memory writes", bank->bus_width);
LOG_ERROR("Unsupported bank buswidth %d, can't do block memory writes", bank->bus_width);
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
@ -1080,7 +1080,7 @@ int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u3
{
if ( target_code_size > sizeof(target_code) )
{
WARNING("Internal error - target code buffer to small. Increase CFI_MAX_INTEL_CODESIZE and recompile.");
LOG_WARNING("Internal error - target code buffer to small. Increase CFI_MAX_INTEL_CODESIZE and recompile.");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
cfi_fix_code_endian(target, target_code, target_code_src, target_code_size / 4);
@ -1089,7 +1089,7 @@ int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u3
retval = target_alloc_working_area(target, target_code_size, &cfi_info->write_algorithm);
if (retval != ERROR_OK)
{
WARNING("No working area available, can't do block memory writes");
LOG_WARNING("No working area available, can't do block memory writes");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
};
@ -1097,7 +1097,7 @@ int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u3
retval = target_write_buffer(target, cfi_info->write_algorithm->address, target_code_size, target_code);
if (retval != ERROR_OK)
{
ERROR("Unable to write block write code to target");
LOG_ERROR("Unable to write block write code to target");
goto cleanup;
}
}
@ -1110,7 +1110,7 @@ int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u3
buffer_size /= 2;
if (buffer_size <= 256)
{
WARNING("no large enough working area available, can't do block memory writes");
LOG_WARNING("no large enough working area available, can't do block memory writes");
retval = ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
goto cleanup;
}
@ -1130,7 +1130,7 @@ int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u3
busy_pattern_val = cfi_command_val(bank, 0x80);
error_pattern_val = cfi_command_val(bank, 0x7e);
INFO("Using target buffer at 0x%08x and of size 0x%04x", source->address, buffer_size );
LOG_INFO("Using target buffer at 0x%08x and of size 0x%04x", source->address, buffer_size );
/* Programming main loop */
while (count > 0)
@ -1148,7 +1148,7 @@ int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u3
buf_set_u32(reg_params[5].value, 0, 32, busy_pattern_val);
buf_set_u32(reg_params[6].value, 0, 32, error_pattern_val);
INFO("Write 0x%04x bytes to flash at 0x%08x", thisrun_count, address );
LOG_INFO("Write 0x%04x bytes to flash at 0x%08x", thisrun_count, address );
/* Execute algorithm, assume breakpoint for last instruction */
retval = target->type->run_algorithm(target, 0, NULL, 7, reg_params,
@ -1161,7 +1161,7 @@ int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u3
if (retval != ERROR_OK)
{
cfi_intel_clear_status_register(bank);
ERROR("Execution of flash algorythm failed. Can't fall back. Please report.");
LOG_ERROR("Execution of flash algorythm failed. Can't fall back. Please report.");
retval = ERROR_FLASH_OPERATION_FAILED;
/* retval = ERROR_TARGET_RESOURCE_NOT_AVAILABLE; */
/* FIXME To allow fall back or recovery, we must save the actual status
@ -1366,7 +1366,7 @@ int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address,
target_code_size = sizeof(word_32_code);
break;
default:
ERROR("Unsupported bank buswidth %d, can't do block memory writes", bank->bus_width);
LOG_ERROR("Unsupported bank buswidth %d, can't do block memory writes", bank->bus_width);
return ERROR_FLASH_OPERATION_FAILED;
}
target_code = malloc(target_code_size);
@ -1395,7 +1395,7 @@ int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address,
if (cfi_info->write_algorithm)
target_free_working_area(target, cfi_info->write_algorithm);
WARNING("not enough working area available, can't do block memory writes");
LOG_WARNING("not enough working area available, can't do block memory writes");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
};
@ -1436,7 +1436,7 @@ int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address,
if ((retval != ERROR_OK) || status != 0x80)
{
DEBUG("status: 0x%x", status);
LOG_DEBUG("status: 0x%x", status);
exit_code = ERROR_FLASH_OPERATION_FAILED;
break;
}
@ -1479,7 +1479,7 @@ int cfi_intel_write_word(struct flash_bank_s *bank, u8 *word, u32 address)
cfi_command(bank, 0xff, command);
target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
ERROR("couldn't write word at base 0x%x, address %x", bank->base, address);
LOG_ERROR("couldn't write word at base 0x%x, address %x", bank->base, address);
return ERROR_FLASH_OPERATION_FAILED;
}
@ -1500,7 +1500,7 @@ int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u3
/* Check for valid range */
if (address & buffermask)
{
ERROR("Write address at base 0x%x, address %x not aligned to 2^%d boundary", bank->base, address, cfi_info->max_buf_write_size);
LOG_ERROR("Write address at base 0x%x, address %x not aligned to 2^%d boundary", bank->base, address, cfi_info->max_buf_write_size);
return ERROR_FLASH_OPERATION_FAILED;
}
switch(bank->chip_width)
@ -1509,14 +1509,14 @@ int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u3
case 2 : bufferwsize = buffersize / 2; break;
case 1 : bufferwsize = buffersize; break;
default:
ERROR("Unsupported chip width %d", bank->chip_width);
LOG_ERROR("Unsupported chip width %d", bank->chip_width);
return ERROR_FLASH_OPERATION_FAILED;
}
/* Check for valid size */
if (wordcount > bufferwsize)
{
ERROR("Number of data words %d exceeds available buffersize %d", wordcount, buffersize);
LOG_ERROR("Number of data words %d exceeds available buffersize %d", wordcount, buffersize);
return ERROR_FLASH_OPERATION_FAILED;
}
@ -1531,7 +1531,7 @@ int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u3
cfi_command(bank, 0xff, command);
target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
ERROR("couldn't start buffer write operation at base 0x%x, address %x", bank->base, address);
LOG_ERROR("couldn't start buffer write operation at base 0x%x, address %x", bank->base, address);
return ERROR_FLASH_OPERATION_FAILED;
}
@ -1549,7 +1549,7 @@ int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u3
cfi_command(bank, 0xff, command);
target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
ERROR("Buffer write at base 0x%x, address %x failed.", bank->base, address);
LOG_ERROR("Buffer write at base 0x%x, address %x failed.", bank->base, address);
return ERROR_FLASH_OPERATION_FAILED;
}
@ -1579,7 +1579,7 @@ int cfi_spansion_write_word(struct flash_bank_s *bank, u8 *word, u32 address)
cfi_command(bank, 0xf0, command);
target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
ERROR("couldn't write word at base 0x%x, address %x", bank->base, address);
LOG_ERROR("couldn't write word at base 0x%x, address %x", bank->base, address);
return ERROR_FLASH_OPERATION_FAILED;
}
@ -1600,7 +1600,7 @@ int cfi_write_word(struct flash_bank_s *bank, u8 *word, u32 address)
return cfi_spansion_write_word(bank, word, address);
break;
default:
ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
break;
}
@ -1619,10 +1619,10 @@ int cfi_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 addr
break;
case 2:
/* return cfi_spansion_write_words(bank, word, address); */
ERROR("cfi primary command set %i unimplemented - FIXME", cfi_info->pri_id);
LOG_ERROR("cfi primary command set %i unimplemented - FIXME", cfi_info->pri_id);
break;
default:
ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
break;
}
@ -1654,7 +1654,7 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
write_p = address & ~(bank->bus_width - 1);
if ((align = address - write_p) != 0)
{
INFO("Fixup %d unaligned head bytes", align );
LOG_INFO("Fixup %d unaligned head bytes", align );
for (i = 0; i < bank->bus_width; i++)
current_word[i] = 0;
@ -1703,7 +1703,7 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
retval = cfi_spansion_write_block(bank, buffer, write_p, blk_count);
break;
default:
ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
retval = ERROR_FLASH_OPERATION_FAILED;
break;
}
@ -1728,7 +1728,7 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
case 2 : bufferwsize = buffersize / 2; break;
case 1 : bufferwsize = buffersize; break;
default:
ERROR("Unsupported chip width %d", bank->chip_width);
LOG_ERROR("Unsupported chip width %d", bank->chip_width);
return ERROR_FLASH_OPERATION_FAILED;
}
@ -1737,7 +1737,7 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
if ((write_p & 0xff) == 0)
{
INFO("Programming at %08x, count %08x bytes remaining", write_p, count);
LOG_INFO("Programming at %08x, count %08x bytes remaining", write_p, count);
}
if ((bufferwsize > 0) && (count >= buffersize) && !(write_p & buffermask))
{
@ -1781,7 +1781,7 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
/* handle unaligned tail bytes */
if (count > 0)
{
INFO("Fixup %d unaligned tail bytes", count );
LOG_INFO("Fixup %d unaligned tail bytes", count );
copy_p = write_p;
for (i = 0; i < bank->bus_width; i++)
@ -1828,7 +1828,7 @@ void cfi_fixup_0002_erase_regions(flash_bank_t *bank, void *param)
if ((pri_ext->_reversed_geometry) || (pri_ext->TopBottom == 3))
{
DEBUG("swapping reversed erase region information on cmdset 0002 device");
LOG_DEBUG("swapping reversed erase region information on cmdset 0002 device");
for (i = 0; i < cfi_info->num_erase_regions / 2; i++)
{
@ -1929,7 +1929,7 @@ int cfi_probe(struct flash_bank_s *bank)
cfi_info->qry[1] = cfi_query_u8(bank, 0, 0x11);
cfi_info->qry[2] = cfi_query_u8(bank, 0, 0x12);
DEBUG("CFI qry returned: 0x%2.2x 0x%2.2x 0x%2.2x", cfi_info->qry[0], cfi_info->qry[1], cfi_info->qry[2]);
LOG_DEBUG("CFI qry returned: 0x%2.2x 0x%2.2x 0x%2.2x", cfi_info->qry[0], cfi_info->qry[1], cfi_info->qry[2]);
if ((cfi_info->qry[0] != 'Q') || (cfi_info->qry[1] != 'R') || (cfi_info->qry[2] != 'Y'))
{
@ -1945,7 +1945,7 @@ int cfi_probe(struct flash_bank_s *bank)
cfi_info->alt_id = cfi_query_u16(bank, 0, 0x17);
cfi_info->alt_addr = cfi_query_u16(bank, 0, 0x19);
DEBUG("qry: '%c%c%c', pri_id: 0x%4.4x, pri_addr: 0x%4.4x, alt_id: 0x%4.4x, alt_addr: 0x%4.4x", cfi_info->qry[0], cfi_info->qry[1], cfi_info->qry[2], cfi_info->pri_id, cfi_info->pri_addr, cfi_info->alt_id, cfi_info->alt_addr);
LOG_DEBUG("qry: '%c%c%c', pri_id: 0x%4.4x, pri_addr: 0x%4.4x, alt_id: 0x%4.4x, alt_addr: 0x%4.4x", cfi_info->qry[0], cfi_info->qry[1], cfi_info->qry[2], cfi_info->pri_id, cfi_info->pri_addr, cfi_info->alt_id, cfi_info->alt_addr);
cfi_info->vcc_min = cfi_query_u8(bank, 0, 0x1b);
cfi_info->vcc_max = cfi_query_u8(bank, 0, 0x1c);
@ -1960,14 +1960,14 @@ int cfi_probe(struct flash_bank_s *bank)
cfi_info->block_erase_timeout_max = cfi_query_u8(bank, 0, 0x25);
cfi_info->chip_erase_timeout_max = cfi_query_u8(bank, 0, 0x26);
DEBUG("Vcc min: %1.1x.%1.1x, Vcc max: %1.1x.%1.1x, Vpp min: %1.1x.%1.1x, Vpp max: %1.1x.%1.1x",
LOG_DEBUG("Vcc min: %1.1x.%1.1x, Vcc max: %1.1x.%1.1x, Vpp min: %1.1x.%1.1x, Vpp max: %1.1x.%1.1x",
(cfi_info->vcc_min & 0xf0) >> 4, cfi_info->vcc_min & 0x0f,
(cfi_info->vcc_max & 0xf0) >> 4, cfi_info->vcc_max & 0x0f,
(cfi_info->vpp_min & 0xf0) >> 4, cfi_info->vpp_min & 0x0f,
(cfi_info->vpp_max & 0xf0) >> 4, cfi_info->vpp_max & 0x0f);
DEBUG("typ. word write timeout: %u, typ. buf write timeout: %u, typ. block erase timeout: %u, typ. chip erase timeout: %u", 1 << cfi_info->word_write_timeout_typ, 1 << cfi_info->buf_write_timeout_typ,
LOG_DEBUG("typ. word write timeout: %u, typ. buf write timeout: %u, typ. block erase timeout: %u, typ. chip erase timeout: %u", 1 << cfi_info->word_write_timeout_typ, 1 << cfi_info->buf_write_timeout_typ,
1 << cfi_info->block_erase_timeout_typ, 1 << cfi_info->chip_erase_timeout_typ);
DEBUG("max. word write timeout: %u, max. buf write timeout: %u, max. block erase timeout: %u, max. chip erase timeout: %u", (1 << cfi_info->word_write_timeout_max) * (1 << cfi_info->word_write_timeout_typ),
LOG_DEBUG("max. word write timeout: %u, max. buf write timeout: %u, max. block erase timeout: %u, max. chip erase timeout: %u", (1 << cfi_info->word_write_timeout_max) * (1 << cfi_info->word_write_timeout_typ),
(1 << cfi_info->buf_write_timeout_max) * (1 << cfi_info->buf_write_timeout_typ),
(1 << cfi_info->block_erase_timeout_max) * (1 << cfi_info->block_erase_timeout_typ),
(1 << cfi_info->chip_erase_timeout_max) * (1 << cfi_info->chip_erase_timeout_typ));
@ -1977,11 +1977,11 @@ int cfi_probe(struct flash_bank_s *bank)
cfi_info->max_buf_write_size = cfi_query_u16(bank, 0, 0x2a);
cfi_info->num_erase_regions = cfi_query_u8(bank, 0, 0x2c);
DEBUG("size: 0x%x, interface desc: %i, max buffer write size: %x", 1 << cfi_info->dev_size, cfi_info->interface_desc, (1 << cfi_info->max_buf_write_size));
LOG_DEBUG("size: 0x%x, interface desc: %i, max buffer write size: %x", 1 << cfi_info->dev_size, cfi_info->interface_desc, (1 << cfi_info->max_buf_write_size));
if (((1 << cfi_info->dev_size) * bank->bus_width / bank->chip_width) != bank->size)
{
WARNING("configuration specifies 0x%x size, but a 0x%x size flash was found", bank->size, 1 << cfi_info->dev_size);
LOG_WARNING("configuration specifies 0x%x size, but a 0x%x size flash was found", bank->size, 1 << cfi_info->dev_size);
}
if (cfi_info->num_erase_regions)
@ -1990,7 +1990,7 @@ int cfi_probe(struct flash_bank_s *bank)
for (i = 0; i < cfi_info->num_erase_regions; i++)
{
cfi_info->erase_region_info[i] = cfi_query_u32(bank, 0, 0x2d + (4 * i));
DEBUG("erase region[%i]: %i blocks of size 0x%x", i, (cfi_info->erase_region_info[i] & 0xffff) + 1, (cfi_info->erase_region_info[i] >> 16) * 256);
LOG_DEBUG("erase region[%i]: %i blocks of size 0x%x", i, (cfi_info->erase_region_info[i] & 0xffff) + 1, (cfi_info->erase_region_info[i] >> 16) * 256);
}
}
else
@ -2013,7 +2013,7 @@ int cfi_probe(struct flash_bank_s *bank)
cfi_read_0002_pri_ext(bank);
break;
default:
ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
break;
}
@ -2039,7 +2039,7 @@ int cfi_probe(struct flash_bank_s *bank)
cfi_fixup(bank, cfi_0002_fixups);
break;
default:
ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
break;
}
@ -2118,7 +2118,7 @@ int cfi_erase_check(struct flash_bank_s *bank)
/* make sure we have a working area */
if (target_alloc_working_area(target, 20, &cfi_info->erase_check_algorithm) != ERROR_OK)
{
WARNING("no working area available, falling back to slow memory reads");
LOG_WARNING("no working area available, falling back to slow memory reads");
}
else
{
@ -2294,7 +2294,7 @@ int cfi_protect_check(struct flash_bank_s *bank)
return cfi_spansion_protect_check(bank);
break;
default:
ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
break;
}
@ -2371,7 +2371,7 @@ int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size)
cfi_spansion_info(bank, buf, buf_size);
break;
default:
ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
break;
}
}

16
src/flash/ecos.c
View File

@ -147,14 +147,14 @@ int ecosflash_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, c
if (argc < 7)
{
WARNING("incomplete flash_bank ecosflash configuration");
LOG_WARNING("incomplete flash_bank ecosflash configuration");
return ERROR_FLASH_BANK_INVALID;
}
info = malloc(sizeof(ecosflash_flash_bank_t));
if(info == NULL)
{
ERROR("no memory for flash bank info");
LOG_ERROR("no memory for flash bank info");
exit(-1);
}
bank->driver_priv = info;
@ -180,7 +180,7 @@ int ecosflash_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, c
info->target = get_target_by_num(strtoul(args[5], NULL, 0));
if (info->target == NULL)
{
ERROR("no target '%i' configured", (int)strtoul(args[5], NULL, 0));
LOG_ERROR("no target '%i' configured", (int)strtoul(args[5], NULL, 0));
exit(-1);
}
return ERROR_OK;
@ -212,14 +212,14 @@ int loadDriver(ecosflash_flash_bank_t *info)
int retval;
if ((retval = image_read_section(&image, i, 0x0, image.sections[i].size, buffer, &buf_cnt)) != ERROR_OK)
{
ERROR("image_read_section failed with error code: %i", retval);
LOG_ERROR("image_read_section failed with error code: %i", retval);
free(buffer);
image_close(&image);
return ERROR_FLASH_BANK_INVALID;
}
target_write_buffer(target, image.sections[i].base_address, buf_cnt, buffer);
image_size += buf_cnt;
DEBUG("%u byte written at address 0x%8.8x", buf_cnt, image.sections[i].base_address);
LOG_DEBUG("%u byte written at address 0x%8.8x", buf_cnt, image.sections[i].base_address);
free(buffer);
}
@ -266,7 +266,7 @@ int runCode(ecosflash_flash_bank_t *info,
codeStop, timeout,
&armv4_5_info)) != ERROR_OK)
{
ERROR("error executing eCos flash algorithm");
LOG_ERROR("error executing eCos flash algorithm");
return retval;
}
@ -303,7 +303,7 @@ int eCosBoard_erase(ecosflash_flash_bank_t *info, u32 address, u32 len)
if (flashErr != 0x0)
{
ERROR("Flash erase failed with %d (%s)\n", flashErr, flash_errmsg(flashErr));
LOG_ERROR("Flash erase failed with %d (%s)\n", flashErr, flash_errmsg(flashErr));
return ERROR_JTAG_DEVICE_ERROR;
}
@ -362,7 +362,7 @@ int eCosBoard_flash(ecosflash_flash_bank_t *info, void *data, u32 address, u32 l
if (flashErr != 0x0)
{
ERROR("Flash prog failed with %d (%s)\n", flashErr, flash_errmsg(flashErr));
LOG_ERROR("Flash prog failed with %d (%s)\n", flashErr, flash_errmsg(flashErr));
return ERROR_JTAG_DEVICE_ERROR;
}
}

30
src/flash/flash.c
View File

@ -93,7 +93,7 @@ static int flash_driver_write(struct flash_bank_s *bank, u8 *buffer, u32 offset,
retval=bank->driver->write(bank, buffer, offset, count);
if (retval!=ERROR_OK)
{
ERROR("error writing to flash at address 0x%08x at offset 0x%8.8x (%d)", bank->base, offset, retval);
LOG_ERROR("error writing to flash at address 0x%08x at offset 0x%8.8x (%d)", bank->base, offset, retval);
}
return retval;
@ -106,7 +106,7 @@ static int flash_driver_erase(struct flash_bank_s *bank, int first, int last)
retval=bank->driver->erase(bank, first, last);
if (retval!=ERROR_OK)
{
ERROR("failed erasing sectors %d to %d (%d)", first, last, retval);
LOG_ERROR("failed erasing sectors %d to %d (%d)", first, last, retval);
}
return retval;
@ -119,7 +119,7 @@ int flash_driver_protect(struct flash_bank_s *bank, int set, int first, int last
retval=bank->driver->protect(bank, set, first, last);
if (retval!=ERROR_OK)
{
ERROR("failed setting protection for areas %d to %d (%d)", first, last, retval);
LOG_ERROR("failed setting protection for areas %d to %d (%d)", first, last, retval);
}
return retval;
@ -177,7 +177,7 @@ flash_bank_t *get_flash_bank_by_num_noprobe(int num)
return p;
}
}
ERROR("flash bank %d does not exist", num);
LOG_ERROR("flash bank %d does not exist", num);
return NULL;
}
@ -204,7 +204,7 @@ flash_bank_t *get_flash_bank_by_num(int num)
if (retval != ERROR_OK)
{
ERROR("auto_probe failed %d\n", retval);
LOG_ERROR("auto_probe failed %d\n", retval);
return NULL;
}
return p;
@ -223,7 +223,7 @@ int handle_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char
if ((target = get_target_by_num(strtoul(args[5], NULL, 0))) == NULL)
{
ERROR("target %lu not defined", strtoul(args[5], NULL, 0));
LOG_ERROR("target %lu not defined", strtoul(args[5], NULL, 0));
return ERROR_OK;
}
@ -236,7 +236,7 @@ int handle_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char
/* register flash specific commands */
if (flash_drivers[i]->register_commands(cmd_ctx) != ERROR_OK)
{
ERROR("couldn't register '%s' commands", args[0]);
LOG_ERROR("couldn't register '%s' commands", args[0]);
exit(-1);
}
@ -254,7 +254,7 @@ int handle_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char
if (flash_drivers[i]->flash_bank_command(cmd_ctx, cmd, args, argc, c) != ERROR_OK)
{
ERROR("'%s' driver rejected flash bank at 0x%8.8x", args[0], c->base);
LOG_ERROR("'%s' driver rejected flash bank at 0x%8.8x", args[0], c->base);
free(c);
return ERROR_OK;
}
@ -279,7 +279,7 @@ int handle_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char
/* no matching flash driver found */
if (!found)
{
ERROR("flash driver '%s' not found", args[0]);
LOG_ERROR("flash driver '%s' not found", args[0]);
exit(-1);
}
@ -356,7 +356,7 @@ int handle_flash_info_command(struct command_context_s *cmd_ctx, char *cmd, char
retval = p->driver->info(p, buf, sizeof(buf));
command_print(cmd_ctx, "%s", buf);
if (retval != ERROR_OK)
ERROR("error retrieving flash info (%d)", retval);
LOG_ERROR("error retrieving flash info (%d)", retval);
}
}
@ -598,7 +598,7 @@ int handle_flash_write_image_command(struct command_context_s *cmd_ctx, char *cm
if (!target)
{
ERROR("no target selected");
LOG_ERROR("no target selected");
return ERROR_OK;
}
@ -731,14 +731,14 @@ flash_bank_t *get_flash_bank_by_addr(target_t *target, u32 addr)
if (retval != ERROR_OK)
{
ERROR("auto_probe failed %d\n", retval);
LOG_ERROR("auto_probe failed %d\n", retval);
return NULL;
}
/* check whether address belongs to this flash bank */
if ((addr >= c->base) && (addr < c->base + c->size) && target == c->target)
return c;
}
ERROR("No flash at address 0x%08x\n", addr);
LOG_ERROR("No flash at address 0x%08x\n", addr);
return NULL;
}
@ -823,7 +823,7 @@ int flash_write(target_t *target, image_t *image, u32 *written, int erase)
if (image->sections[section].size == 0)
{
WARNING("empty section %d", section);
LOG_WARNING("empty section %d", section);
section++;
section_offset = 0;
continue;
@ -845,7 +845,7 @@ int flash_write(target_t *target, image_t *image, u32 *written, int erase)
{
if (image->sections[section_last + 1].base_address < (run_address + run_size))
{
DEBUG("section %d out of order(very slightly surprising, but supported)", section_last + 1);
LOG_DEBUG("section %d out of order(very slightly surprising, but supported)", section_last + 1);
break;
}
if (image->sections[section_last + 1].base_address != (run_address + run_size))

34
src/flash/lpc2000.c
View File

@ -146,7 +146,7 @@ int lpc2000_build_sector_list(struct flash_bank_s *bank)
}
else
{
ERROR("BUG: unknown bank->size encountered");
LOG_ERROR("BUG: unknown bank->size encountered");
exit(-1);
}
}
@ -187,7 +187,7 @@ int lpc2000_build_sector_list(struct flash_bank_s *bank)
num_sectors = 27;
break;
default:
ERROR("BUG: unknown bank->size encountered");
LOG_ERROR("BUG: unknown bank->size encountered");
exit(-1);
break;
}
@ -225,7 +225,7 @@ int lpc2000_build_sector_list(struct flash_bank_s *bank)
}
else
{
ERROR("BUG: unknown lpc2000_info->variant encountered");
LOG_ERROR("BUG: unknown lpc2000_info->variant encountered");
exit(-1);
}
@ -256,7 +256,7 @@ int lpc2000_iap_call(flash_bank_t *bank, int code, u32 param_table[5], u32 resul
/* make sure we have a working area */
if (target_alloc_working_area(target, 172, &lpc2000_info->iap_working_area) != ERROR_OK)
{
ERROR("no working area specified, can't write LPC2000 internal flash");
LOG_ERROR("no working area specified, can't write LPC2000 internal flash");
return ERROR_FLASH_OPERATION_FAILED;
}
@ -351,7 +351,7 @@ int lpc2000_iap_blank_check(struct flash_bank_s *bank, int first, int last)
return ERROR_FLASH_BUSY;
break;
default:
ERROR("BUG: unknown LPC2000 status code");
LOG_ERROR("BUG: unknown LPC2000 status code");
exit(-1);
}
}
@ -367,7 +367,7 @@ int lpc2000_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, cha
if (argc < 8)
{
WARNING("incomplete flash_bank lpc2000 configuration");
LOG_WARNING("incomplete flash_bank lpc2000 configuration");
return ERROR_FLASH_BANK_INVALID;
}
@ -390,7 +390,7 @@ int lpc2000_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, cha
}
else
{
ERROR("unknown LPC2000 variant");
LOG_ERROR("unknown LPC2000 variant");
free(lpc2000_info);
return ERROR_FLASH_BANK_INVALID;
}
@ -437,7 +437,7 @@ int lpc2000_erase(struct flash_bank_s *bank, int first, int last)
return ERROR_FLASH_SECTOR_INVALID;
break;
default:
WARNING("lpc2000 prepare sectors returned %i", status_code);
LOG_WARNING("lpc2000 prepare sectors returned %i", status_code);
return ERROR_FLASH_OPERATION_FAILED;
}
@ -453,7 +453,7 @@ int lpc2000_erase(struct flash_bank_s *bank, int first, int last)
return ERROR_FLASH_SECTOR_INVALID;
break;
default:
WARNING("lpc2000 erase sectors returned %i", status_code);
LOG_WARNING("lpc2000 erase sectors returned %i", status_code);
return ERROR_FLASH_OPERATION_FAILED;
}
@ -489,7 +489,7 @@ int lpc2000_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
/* allocate a working area */
if (target_alloc_working_area(target, lpc2000_info->cmd51_max_buffer, &download_area) != ERROR_OK)
{
ERROR("no working area specified, can't write LPC2000 internal flash");
LOG_ERROR("no working area specified, can't write LPC2000 internal flash");
return ERROR_FLASH_OPERATION_FAILED;
}
@ -503,7 +503,7 @@ int lpc2000_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
if (offset % dst_min_alignment)
{
WARNING("offset 0x%x breaks required alignment 0x%x", offset, dst_min_alignment);
LOG_WARNING("offset 0x%x breaks required alignment 0x%x", offset, dst_min_alignment);
return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
}
@ -515,7 +515,7 @@ int lpc2000_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
last_sector = i;
}
DEBUG("first_sector: %i, last_sector: %i", first_sector, last_sector);
LOG_DEBUG("first_sector: %i, last_sector: %i", first_sector, last_sector);
/* check if exception vectors should be flashed */
if ((offset == 0) && (count >= 0x20) && lpc2000_info->calc_checksum)
@ -524,12 +524,12 @@ int lpc2000_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
int i = 0;
for (i = 0; i < 8; i++)
{
DEBUG("0x%2.2x: 0x%8.8x", i * 4, buf_get_u32(buffer + (i * 4), 0, 32));
LOG_DEBUG("0x%2.2x: 0x%8.8x", i * 4, buf_get_u32(buffer + (i * 4), 0, 32));
if (i != 5)
checksum += buf_get_u32(buffer + (i * 4), 0, 32);
}
checksum = 0 - checksum;
DEBUG("checksum: 0x%8.8x", checksum);
LOG_DEBUG("checksum: 0x%8.8x", checksum);
buf_set_u32(buffer + 0x14, 0, 32, checksum);
}
@ -559,7 +559,7 @@ int lpc2000_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
return ERROR_FLASH_SECTOR_INVALID;
break;
default:
WARNING("lpc2000 prepare sectors returned %i", status_code);
LOG_WARNING("lpc2000 prepare sectors returned %i", status_code);
return ERROR_FLASH_OPERATION_FAILED;
}
@ -582,7 +582,7 @@ int lpc2000_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
free(last_buffer);
}
DEBUG("writing 0x%x bytes to address 0x%x", thisrun_bytes, bank->base + offset + bytes_written);
LOG_DEBUG("writing 0x%x bytes to address 0x%x", thisrun_bytes, bank->base + offset + bytes_written);
/* Write data */
param_table[0] = bank->base + offset + bytes_written;
@ -600,7 +600,7 @@ int lpc2000_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
return ERROR_FLASH_SECTOR_INVALID;
break;
default:
WARNING("lpc2000 returned %i", status_code);
LOG_WARNING("lpc2000 returned %i", status_code);
return ERROR_FLASH_OPERATION_FAILED;
}

84
src/flash/lpc3180_nand_controller.c
View File

@ -72,7 +72,7 @@ int lpc3180_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, ch
if (argc < 3)
{
WARNING("incomplete 'lpc3180' nand flash configuration");
LOG_WARNING("incomplete 'lpc3180' nand flash configuration");
return ERROR_FLASH_BANK_INVALID;
}
@ -82,14 +82,14 @@ int lpc3180_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, ch
lpc3180_info->target = get_target_by_num(strtoul(args[1], NULL, 0));
if (!lpc3180_info->target)
{
ERROR("no target '%s' configured", args[1]);
LOG_ERROR("no target '%s' configured", args[1]);
return ERROR_NAND_DEVICE_INVALID;
}
lpc3180_info->osc_freq = strtoul(args[2], NULL, 0);
if ((lpc3180_info->osc_freq < 1000) || (lpc3180_info->osc_freq > 20000))
{
WARNING("LPC3180 oscillator frequency should be between 1000 and 20000 kHz, was %i", lpc3180_info->osc_freq);
LOG_WARNING("LPC3180 oscillator frequency should be between 1000 and 20000 kHz, was %i", lpc3180_info->osc_freq);
}
lpc3180_info->selected_controller = LPC3180_NO_CONTROLLER;
lpc3180_info->sw_write_protection = 0;
@ -119,7 +119,7 @@ int lpc3180_pll(int fclkin, u32 pll_ctrl)
int lock = (pll_ctrl & 0x1);
if (!lock)
WARNING("PLL is not locked");
LOG_WARNING("PLL is not locked");
if (!bypass && direct) /* direct mode */
return (m * fclkin) / n;
@ -179,7 +179,7 @@ float lpc3180_cycle_time(lpc3180_nand_controller_t *lpc3180_info)
}
}
DEBUG("LPC3180 HCLK currently clocked at %i kHz", hclk);
LOG_DEBUG("LPC3180 HCLK currently clocked at %i kHz", hclk);
cycle = (1.0 / hclk) * 1000000.0;
@ -196,14 +196,14 @@ int lpc3180_init(struct nand_device_s *device)
if (target->state != TARGET_HALTED)
{
ERROR("target must be halted to use LPC3180 NAND flash controller");
LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
return ERROR_NAND_OPERATION_FAILED;
}
/* sanitize arguments */
if ((bus_width != 8) && (bus_width != 16))
{
ERROR("LPC3180 only supports 8 or 16 bit bus width, not %i", bus_width);
LOG_ERROR("LPC3180 only supports 8 or 16 bit bus width, not %i", bus_width);
return ERROR_NAND_OPERATION_NOT_SUPPORTED;
}
@ -212,7 +212,7 @@ int lpc3180_init(struct nand_device_s *device)
*/
if (bus_width == 16)
{
WARNING("LPC3180 only supports 8 bit bus width");
LOG_WARNING("LPC3180 only supports 8 bit bus width");
}
/* inform calling code about selected bus width */
@ -220,20 +220,20 @@ int lpc3180_init(struct nand_device_s *device)
if ((address_cycles != 3) && (address_cycles != 4))
{
ERROR("LPC3180 only supports 3 or 4 address cycles, not %i", address_cycles);
LOG_ERROR("LPC3180 only supports 3 or 4 address cycles, not %i", address_cycles);
return ERROR_NAND_OPERATION_NOT_SUPPORTED;
}
if ((page_size != 512) && (page_size != 2048))
{
ERROR("LPC3180 only supports 512 or 2048 byte pages, not %i", page_size);
LOG_ERROR("LPC3180 only supports 512 or 2048 byte pages, not %i", page_size);
return ERROR_NAND_OPERATION_NOT_SUPPORTED;
}
/* select MLC controller if none is currently selected */
if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER)
{
DEBUG("no LPC3180 NAND flash controller selected, using default 'mlc'");
LOG_DEBUG("no LPC3180 NAND flash controller selected, using default 'mlc'");
lpc3180_info->selected_controller = LPC3180_MLC_CONTROLLER;
}
@ -323,13 +323,13 @@ int lpc3180_reset(struct nand_device_s *device)
if (target->state != TARGET_HALTED)
{
ERROR("target must be halted to use LPC3180 NAND flash controller");
LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
return ERROR_NAND_OPERATION_FAILED;
}
if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER)
{
ERROR("BUG: no LPC3180 NAND flash controller selected");
LOG_ERROR("BUG: no LPC3180 NAND flash controller selected");
return ERROR_NAND_OPERATION_FAILED;
}
else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER)
@ -339,7 +339,7 @@ int lpc3180_reset(struct nand_device_s *device)
if (!lpc3180_controller_ready(device, 100))
{
ERROR("LPC3180 NAND controller timed out after reset");
LOG_ERROR("LPC3180 NAND controller timed out after reset");
return ERROR_NAND_OPERATION_TIMEOUT;
}
}
@ -350,7 +350,7 @@ int lpc3180_reset(struct nand_device_s *device)
if (!lpc3180_controller_ready(device, 100))
{
ERROR("LPC3180 NAND controller timed out after reset");
LOG_ERROR("LPC3180 NAND controller timed out after reset");
return ERROR_NAND_OPERATION_TIMEOUT;
}
}
@ -365,13 +365,13 @@ int lpc3180_command(struct nand_device_s *device, u8 command)
if (target->state != TARGET_HALTED)
{
ERROR("target must be halted to use LPC3180 NAND flash controller");
LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
return ERROR_NAND_OPERATION_FAILED;
}
if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER)
{
ERROR("BUG: no LPC3180 NAND flash controller selected");
LOG_ERROR("BUG: no LPC3180 NAND flash controller selected");
return ERROR_NAND_OPERATION_FAILED;
}
else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER)
@ -395,13 +395,13 @@ int lpc3180_address(struct nand_device_s *device, u8 address)
if (target->state != TARGET_HALTED)
{
ERROR("target must be halted to use LPC3180 NAND flash controller");
LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
return ERROR_NAND_OPERATION_FAILED;
}
if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER)
{
ERROR("BUG: no LPC3180 NAND flash controller selected");
LOG_ERROR("BUG: no LPC3180 NAND flash controller selected");
return ERROR_NAND_OPERATION_FAILED;
}
else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER)
@ -425,13 +425,13 @@ int lpc3180_write_data(struct nand_device_s *device, u16 data)
if (target->state != TARGET_HALTED)
{
ERROR("target must be halted to use LPC3180 NAND flash controller");
LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
return ERROR_NAND_OPERATION_FAILED;
}
if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER)
{
ERROR("BUG: no LPC3180 NAND flash controller selected");
LOG_ERROR("BUG: no LPC3180 NAND flash controller selected");
return ERROR_NAND_OPERATION_FAILED;
}
else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER)
@ -455,13 +455,13 @@ int lpc3180_read_data(struct nand_device_s *device, void *data)
if (target->state != TARGET_HALTED)
{
ERROR("target must be halted to use LPC3180 NAND flash controller");
LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
return ERROR_NAND_OPERATION_FAILED;
}
if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER)
{
ERROR("BUG: no LPC3180 NAND flash controller selected");
LOG_ERROR("BUG: no LPC3180 NAND flash controller selected");
return ERROR_NAND_OPERATION_FAILED;
}
else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER)
@ -479,7 +479,7 @@ int lpc3180_read_data(struct nand_device_s *device, void *data)
}
else
{
ERROR("BUG: bus_width neither 8 nor 16 bit");
LOG_ERROR("BUG: bus_width neither 8 nor 16 bit");
return ERROR_NAND_OPERATION_FAILED;
}
}
@ -502,7 +502,7 @@ int lpc3180_read_data(struct nand_device_s *device, void *data)
}
else
{
ERROR("BUG: bus_width neither 8 nor 16 bit");
LOG_ERROR("BUG: bus_width neither 8 nor 16 bit");
return ERROR_NAND_OPERATION_FAILED;
}
}
@ -519,13 +519,13 @@ int lpc3180_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 dat
if (target->state != TARGET_HALTED)
{
ERROR("target must be halted to use LPC3180 NAND flash controller");
LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
return ERROR_NAND_OPERATION_FAILED;
}
if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER)
{
ERROR("BUG: no LPC3180 NAND flash controller selected");
LOG_ERROR("BUG: no LPC3180 NAND flash controller selected");
return ERROR_NAND_OPERATION_FAILED;
}
else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER)
@ -536,19 +536,19 @@ int lpc3180_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 dat
if (!data && oob)
{
ERROR("LPC3180 MLC controller can't write OOB data only");
LOG_ERROR("LPC3180 MLC controller can't write OOB data only");
return ERROR_NAND_OPERATION_NOT_SUPPORTED;
}
if (oob && (oob_size > 6))
{
ERROR("LPC3180 MLC controller can't write more than 6 bytes of OOB data");
LOG_ERROR("LPC3180 MLC controller can't write more than 6 bytes of OOB data");
return ERROR_NAND_OPERATION_NOT_SUPPORTED;
}
if (data_size > device->page_size)
{
ERROR("data size exceeds page size");
LOG_ERROR("data size exceeds page size");
return ERROR_NAND_OPERATION_NOT_SUPPORTED;
}
@ -618,7 +618,7 @@ int lpc3180_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 dat
if (!lpc3180_controller_ready(device, 1000))
{
ERROR("timeout while waiting for completion of auto encode cycle");
LOG_ERROR("timeout while waiting for completion of auto encode cycle");
return ERROR_NAND_OPERATION_FAILED;
}
}
@ -628,13 +628,13 @@ int lpc3180_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 dat
if ((retval = nand_read_status(device, &status)) != ERROR_OK)
{
ERROR("couldn't read status");
LOG_ERROR("couldn't read status");
return ERROR_NAND_OPERATION_FAILED;
}
if (status & NAND_STATUS_FAIL)
{
ERROR("write operation didn't pass, status: 0x%2.2x", status);
LOG_ERROR("write operation didn't pass, status: 0x%2.2x", status);
return ERROR_NAND_OPERATION_FAILED;
}
@ -656,13 +656,13 @@ int lpc3180_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data
if (target->state != TARGET_HALTED)
{
ERROR("target must be halted to use LPC3180 NAND flash controller");
LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
return ERROR_NAND_OPERATION_FAILED;
}
if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER)
{
ERROR("BUG: no LPC3180 NAND flash controller selected");
LOG_ERROR("BUG: no LPC3180 NAND flash controller selected");
return ERROR_NAND_OPERATION_FAILED;
}
else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER)
@ -676,14 +676,14 @@ int lpc3180_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data
#if 0
if (oob && (oob_size > 6))
{
ERROR("LPC3180 MLC controller can't read more than 6 bytes of OOB data");
LOG_ERROR("LPC3180 MLC controller can't read more than 6 bytes of OOB data");
return ERROR_NAND_OPERATION_NOT_SUPPORTED;
}
#endif
if (data_size > device->page_size)
{
ERROR("data size exceeds page size");
LOG_ERROR("data size exceeds page size");
return ERROR_NAND_OPERATION_NOT_SUPPORTED;
}
@ -748,7 +748,7 @@ int lpc3180_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data
if (!lpc3180_controller_ready(device, 1000))
{
ERROR("timeout while waiting for completion of auto decode cycle");
LOG_ERROR("timeout while waiting for completion of auto decode cycle");
return ERROR_NAND_OPERATION_FAILED;
}
@ -758,11 +758,11 @@ int lpc3180_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data
{
if (mlc_isr & 0x40)
{
ERROR("uncorrectable error detected: 0x%2.2x", mlc_isr);
LOG_ERROR("uncorrectable error detected: 0x%2.2x", mlc_isr);
return ERROR_NAND_OPERATION_FAILED;
}
WARNING("%i symbol error detected and corrected", ((mlc_isr & 0x30) >> 4) + 1);
LOG_WARNING("%i symbol error detected and corrected", ((mlc_isr & 0x30) >> 4) + 1);
}
if (data)
@ -804,7 +804,7 @@ int lpc3180_controller_ready(struct nand_device_s *device, int timeout)
if (target->state != TARGET_HALTED)
{
ERROR("target must be halted to use LPC3180 NAND flash controller");
LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
return ERROR_NAND_OPERATION_FAILED;
}
@ -837,7 +837,7 @@ int lpc3180_nand_ready(struct nand_device_s *device, int timeout)
if (target->state != TARGET_HALTED)
{
ERROR("target must be halted to use LPC3180 NAND flash controller");
LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
return ERROR_NAND_OPERATION_FAILED;
}

50
src/flash/nand.c
View File

@ -193,7 +193,7 @@ int handle_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, cha
if (argc < 1)
{
WARNING("incomplete flash device nand configuration");
LOG_WARNING("incomplete flash device nand configuration");
return ERROR_FLASH_BANK_INVALID;
}
@ -206,7 +206,7 @@ int handle_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, cha
/* register flash specific commands */
if (nand_flash_controllers[i]->register_commands(cmd_ctx) != ERROR_OK)
{
ERROR("couldn't register '%s' commands", args[0]);
LOG_ERROR("couldn't register '%s' commands", args[0]);
exit(-1);
}
@ -224,7 +224,7 @@ int handle_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, cha
if ((retval = nand_flash_controllers[i]->nand_device_command(cmd_ctx, cmd, args, argc, c)) != ERROR_OK)
{
ERROR("'%s' driver rejected nand flash", c->controller->name);
LOG_ERROR("'%s' driver rejected nand flash", c->controller->name);
free(c);
return ERROR_OK;
}
@ -249,11 +249,11 @@ int handle_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, cha
/* no valid NAND controller was found (i.e. the configuration option,
* didn't match one of the compiled-in controllers)
*/
ERROR("No valid NAND flash controller found (%s)", args[0]);
ERROR("compiled-in NAND flash controllers:");
LOG_ERROR("No valid NAND flash controller found (%s)", args[0]);
LOG_ERROR("compiled-in NAND flash controllers:");
for (i = 0; nand_flash_controllers[i]; i++)
{
ERROR("%i: %s", i, nand_flash_controllers[i]->name);
LOG_ERROR("%i: %s", i, nand_flash_controllers[i]->name);
}
return ERROR_OK;
@ -333,7 +333,7 @@ int nand_build_bbt(struct nand_device_s *device, int first, int last)
|| (((device->page_size == 512) && (oob[5] != 0xff)) ||
((device->page_size == 2048) && (oob[0] != 0xff))))
{
WARNING("invalid block: %i", i);
LOG_WARNING("invalid block: %i", i);
device->blocks[i].is_bad = 1;
}
else
@ -395,13 +395,13 @@ int nand_probe(struct nand_device_s *device)
switch (retval)
{
case ERROR_NAND_OPERATION_FAILED:
DEBUG("controller initialization failed");
LOG_DEBUG("controller initialization failed");
return ERROR_NAND_OPERATION_FAILED;
case ERROR_NAND_OPERATION_NOT_SUPPORTED:
ERROR("BUG: controller reported that it doesn't support default parameters");
LOG_ERROR("BUG: controller reported that it doesn't support default parameters");
return ERROR_NAND_OPERATION_FAILED;
default:
ERROR("BUG: unknown controller initialization failure");
LOG_ERROR("BUG: unknown controller initialization failure");
return ERROR_NAND_OPERATION_FAILED;
}
}
@ -452,12 +452,12 @@ int nand_probe(struct nand_device_s *device)
if (!device->device)
{
ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
manufacturer_id, device_id);
return ERROR_NAND_OPERATION_FAILED;
}
DEBUG("found %s (%s)", device->device->name, device->manufacturer->name);
LOG_DEBUG("found %s (%s)", device->device->name, device->manufacturer->name);
/* initialize device parameters */
@ -499,7 +499,7 @@ int nand_probe(struct nand_device_s *device)
}
else if (device->device->page_size == 256)
{
ERROR("NAND flashes with 256 byte pagesize are not supported");
LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
return ERROR_NAND_OPERATION_FAILED;
}
else
@ -517,7 +517,7 @@ int nand_probe(struct nand_device_s *device)
device->address_cycles = 4;
else
{
ERROR("BUG: small page NAND device with more than 8 GiB encountered");
LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
device->address_cycles = 5;
}
}
@ -530,7 +530,7 @@ int nand_probe(struct nand_device_s *device)
device->address_cycles = 5;
else
{
ERROR("BUG: small page NAND device with more than 32 GiB encountered");
LOG_ERROR("BUG: small page NAND device with more than 32 GiB encountered");
device->address_cycles = 6;
}
}
@ -564,14 +564,14 @@ int nand_probe(struct nand_device_s *device)
switch (retval)
{
case ERROR_NAND_OPERATION_FAILED:
DEBUG("controller initialization failed");
LOG_DEBUG("controller initialization failed");
return ERROR_NAND_OPERATION_FAILED;
case ERROR_NAND_OPERATION_NOT_SUPPORTED:
ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
device->bus_width, device->address_cycles, device->page_size);
return ERROR_NAND_OPERATION_FAILED;
default:
ERROR("BUG: unknown controller initialization failure");
LOG_ERROR("BUG: unknown controller initialization failure");
return ERROR_NAND_OPERATION_FAILED;
}
}
@ -651,19 +651,19 @@ int nand_erase(struct nand_device_s *device, int first_block, int last_block)
if (!device->controller->nand_ready(device, 1000))
{
ERROR("timeout waiting for NAND flash block erase to complete");
LOG_ERROR("timeout waiting for NAND flash block erase to complete");
return ERROR_NAND_OPERATION_TIMEOUT;
}
if ((retval = nand_read_status(device, &status)) != ERROR_OK)
{
ERROR("couldn't read status");
LOG_ERROR("couldn't read status");
return ERROR_NAND_OPERATION_FAILED;
}
if (status & 0x1)
{
ERROR("erase operation didn't pass, status: 0x%2.2x", status);
LOG_ERROR("erase operation didn't pass, status: 0x%2.2x", status);
return ERROR_NAND_OPERATION_FAILED;
}
}
@ -680,7 +680,7 @@ int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 dat
if (address % device->page_size)
{
ERROR("reads need to be page aligned");
LOG_ERROR("reads need to be page aligned");
return ERROR_NAND_OPERATION_FAILED;
}
@ -717,7 +717,7 @@ int nand_write_plain(struct nand_device_s *device, u32 address, u8 *data, u32 da
if (address % device->page_size)
{
ERROR("writes need to be page aligned");
LOG_ERROR("writes need to be page aligned");
return ERROR_NAND_OPERATION_FAILED;
}
@ -976,13 +976,13 @@ int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 da
if ((retval = nand_read_status(device, &status)) != ERROR_OK)
{
ERROR("couldn't read status");
LOG_ERROR("couldn't read status");
return ERROR_NAND_OPERATION_FAILED;
}
if (status & NAND_STATUS_FAIL)
{
ERROR("write operation didn't pass, status: 0x%2.2x", status);
LOG_ERROR("write operation didn't pass, status: 0x%2.2x", status);
return ERROR_NAND_OPERATION_FAILED;
}

2
src/flash/non_cfi.c
View File

@ -250,7 +250,7 @@ void cfi_fixup_non_cfi(flash_bank_t *bank, void *param)
cfi_info->pri_ext = pri_ext;
} else if ((cfi_info->pri_id == 0x1) || (cfi_info->pri_id == 0x3))
{
ERROR("BUG: non-CFI flashes using the Intel commandset are not yet supported");
LOG_ERROR("BUG: non-CFI flashes using the Intel commandset are not yet supported");
exit(-1);
}
}

6
src/flash/s3c2410_nand.c
View File

@ -99,7 +99,7 @@ int s3c2410_write_data(struct nand_device_s *device, u16 data)
target_t *target = s3c24xx_info->target;
if (target->state != TARGET_HALTED) {
ERROR("target must be halted to use S3C24XX NAND flash controller");
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
return ERROR_NAND_OPERATION_FAILED;
}
@ -113,7 +113,7 @@ int s3c2410_read_data(struct nand_device_s *device, void *data)
target_t *target = s3c24xx_info->target;
if (target->state != TARGET_HALTED) {
ERROR("target must be halted to use S3C24XX NAND flash controller");
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
return ERROR_NAND_OPERATION_FAILED;
}
@ -128,7 +128,7 @@ int s3c2410_nand_ready(struct nand_device_s *device, int timeout)
u8 status;
if (target->state != TARGET_HALTED) {
ERROR("target must be halted to use S3C24XX NAND flash controller");
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
return ERROR_NAND_OPERATION_FAILED;
}

8
src/flash/s3c2440_nand.c
View File

@ -104,7 +104,7 @@ int s3c2440_nand_ready(struct nand_device_s *device, int timeout)
u8 status;
if (target->state != TARGET_HALTED) {
ERROR("target must be halted to use S3C24XX NAND flash controller");
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
return ERROR_NAND_OPERATION_FAILED;
}
@ -130,10 +130,10 @@ int s3c2440_read_block_data(struct nand_device_s *device, u8 *data, int data_siz
u32 nfdata = s3c24xx_info->data;
u32 tmp;
INFO("%s: reading data: %p, %p, %d\n", __func__, device, data, data_size);
LOG_INFO("%s: reading data: %p, %p, %d\n", __func__, device, data, data_size);
if (target->state != TARGET_HALTED) {
ERROR("target must be halted to use S3C24XX NAND flash controller");
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
return ERROR_NAND_OPERATION_FAILED;
}
@ -167,7 +167,7 @@ int s3c2440_write_block_data(struct nand_device_s *device, u8 *data, int data_si
u32 tmp;
if (target->state != TARGET_HALTED) {
ERROR("target must be halted to use S3C24XX NAND flash controller");
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
return ERROR_NAND_OPERATION_FAILED;
}

14
src/flash/s3c24xx_nand.c
View File

@ -47,7 +47,7 @@ s3c24xx_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
s3c24xx_info = malloc(sizeof(s3c24xx_nand_controller_t));
if (s3c24xx_info == NULL) {
ERROR("no memory for nand controller\n");
LOG_ERROR("no memory for nand controller\n");
return NULL;
}
@ -55,7 +55,7 @@ s3c24xx_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
s3c24xx_info->target = get_target_by_num(strtoul(args[1], NULL, 0));
if (s3c24xx_info->target == NULL) {
ERROR("no target '%s' configured", args[1]);
LOG_ERROR("no target '%s' configured", args[1]);
return NULL;
}
@ -73,7 +73,7 @@ int s3c24xx_reset(struct nand_device_s *device)
target_t *target = s3c24xx_info->target;
if (target->state != TARGET_HALTED) {
ERROR("target must be halted to use S3C24XX NAND flash controller");
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
return ERROR_NAND_OPERATION_FAILED;
}
@ -88,7 +88,7 @@ int s3c24xx_command(struct nand_device_s *device, u8 command)
target_t *target = s3c24xx_info->target;
if (target->state != TARGET_HALTED) {
ERROR("target must be halted to use S3C24XX NAND flash controller");
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
return ERROR_NAND_OPERATION_FAILED;
}
@ -103,7 +103,7 @@ int s3c24xx_address(struct nand_device_s *device, u8 address)
target_t *target = s3c24xx_info->target;
if (target->state != TARGET_HALTED) {
ERROR("target must be halted to use S3C24XX NAND flash controller");
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
return ERROR_NAND_OPERATION_FAILED;
}
@ -117,7 +117,7 @@ int s3c24xx_write_data(struct nand_device_s *device, u16 data)
target_t *target = s3c24xx_info->target;
if (target->state != TARGET_HALTED) {
ERROR("target must be halted to use S3C24XX NAND flash controller");
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
return ERROR_NAND_OPERATION_FAILED;
}
@ -131,7 +131,7 @@ int s3c24xx_read_data(struct nand_device_s *device, void *data)
target_t *target = s3c24xx_info->target;
if (target->state != TARGET_HALTED) {
ERROR("target must be halted to use S3C24XX NAND flash controller");
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
return ERROR_NAND_OPERATION_FAILED;
}

66
src/flash/stellaris.c
View File

@ -219,7 +219,7 @@ int stellaris_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, c
if (argc < 6)
{
WARNING("incomplete flash_bank stellaris configuration");
LOG_WARNING("incomplete flash_bank stellaris configuration");
return ERROR_FLASH_BANK_INVALID;
}
@ -316,9 +316,9 @@ void stellaris_read_clock_info(flash_bank_t *bank)
unsigned long mainfreq;
target_read_u32(target, SCB_BASE|RCC, &rcc);
DEBUG("Stellaris RCC %x",rcc);
LOG_DEBUG("Stellaris RCC %x",rcc);
target_read_u32(target, SCB_BASE|PLLCFG, &pllcfg);
DEBUG("Stellaris PLLCFG %x",pllcfg);
LOG_DEBUG("Stellaris PLLCFG %x",pllcfg);
stellaris_info->rcc = rcc;
sysdiv = (rcc>>23)&0xF;
@ -338,7 +338,7 @@ void stellaris_read_clock_info(flash_bank_t *bank)
mainfreq = 5625000; /* Internal osc. / 4 */
break;
case 3:
WARNING("Invalid oscsrc (3) in rcc register");
LOG_WARNING("Invalid oscsrc (3) in rcc register");
mainfreq = 6000000;
break;
@ -366,7 +366,7 @@ void stellaris_set_flash_mode(flash_bank_t *bank,int mode)
target_t *target = bank->target;
u32 usecrl = (stellaris_info->mck_freq/1000000ul-1);
DEBUG("usecrl = %i",usecrl);
LOG_DEBUG("usecrl = %i",usecrl);
target_write_u32(target, SCB_BASE|USECRL , usecrl);
}
@ -378,7 +378,7 @@ u32 stellaris_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout)
/* Stellaris waits for cmdbit to clear */
while (((status = stellaris_get_flash_status(bank)) & waitbits) && (timeout-- > 0))
{
DEBUG("status: 0x%x", status);
LOG_DEBUG("status: 0x%x", status);
usleep(1000);
}
@ -396,7 +396,7 @@ int stellaris_flash_command(struct flash_bank_s *bank,u8 cmd,u16 pagen)
fmc = FMC_WRKEY | cmd;
target_write_u32(target, FLASH_CONTROL_BASE|FLASH_FMC, fmc);
DEBUG("Flash command: 0x%x", fmc);
LOG_DEBUG("Flash command: 0x%x", fmc);
if (stellaris_wait_status_busy(bank, cmd, 100))
{
@ -419,18 +419,18 @@ int stellaris_read_part_info(struct flash_bank_s *bank)
target_read_u32(target, SCB_BASE|DID1, &did1);
target_read_u32(target, SCB_BASE|DC0, &stellaris_info->dc0);
target_read_u32(target, SCB_BASE|DC1, &stellaris_info->dc1);
DEBUG("did0 0x%x, did1 0x%x, dc0 0x%x, dc1 0x%x",did0, did1, stellaris_info->dc0,stellaris_info->dc1);
LOG_DEBUG("did0 0x%x, did1 0x%x, dc0 0x%x, dc1 0x%x",did0, did1, stellaris_info->dc0,stellaris_info->dc1);
ver = did0 >> 28;
if((ver != 0) && (ver != 1))
{
WARNING("Unknown did0 version, cannot identify target");
LOG_WARNING("Unknown did0 version, cannot identify target");
return ERROR_FLASH_OPERATION_FAILED;
}
if (did1 == 0)
{
WARNING("Cannot identify target as a Stellaris");
LOG_WARNING("Cannot identify target as a Stellaris");
return ERROR_FLASH_OPERATION_FAILED;
}
@ -438,7 +438,7 @@ int stellaris_read_part_info(struct flash_bank_s *bank)
fam = (did1 >> 24) & 0xF;
if(((ver != 0) && (ver != 1)) || (fam != 0))
{
WARNING("Unknown did1 version/family, cannot positively identify target as a Stellaris");
LOG_WARNING("Unknown did1 version/family, cannot positively identify target as a Stellaris");
}
for (i=0;StellarisParts[i].partno;i++)
@ -502,7 +502,7 @@ int stellaris_protect_check(struct flash_bank_s *bank)
if (stellaris_info->did1 == 0)
{
WARNING("Cannot identify target as an AT91SAM");
LOG_WARNING("Cannot identify target as an AT91SAM");
return ERROR_FLASH_OPERATION_FAILED;
}
@ -531,7 +531,7 @@ int stellaris_erase(struct flash_bank_s *bank, int first, int last)
if (stellaris_info->did1 == 0)
{
WARNING("Cannot identify target as Stellaris");
LOG_WARNING("Cannot identify target as Stellaris");
return ERROR_FLASH_OPERATION_FAILED;
}
@ -592,7 +592,7 @@ int stellaris_erase(struct flash_bank_s *bank, int first, int last)
target_read_u32(target, FLASH_CRIS, &flash_cris);
if(flash_cris & (AMASK))
{
WARNING("Error erasing flash page %i, flash_cris 0x%x", banknr, flash_cris);
LOG_WARNING("Error erasing flash page %i, flash_cris 0x%x", banknr, flash_cris);
target_write_u32(target, FLASH_CRIS, 0);
return ERROR_FLASH_OPERATION_FAILED;
}
@ -626,7 +626,7 @@ int stellaris_protect(struct flash_bank_s *bank, int set, int first, int last)
if (stellaris_info->did1 == 0)
{
WARNING("Cannot identify target as an Stellaris MCU");
LOG_WARNING("Cannot identify target as an Stellaris MCU");
return ERROR_FLASH_OPERATION_FAILED;
}
@ -647,13 +647,13 @@ int stellaris_protect(struct flash_bank_s *bank, int set, int first, int last)
target_write_u32(target, FLASH_CIM, 0);
target_write_u32(target, FLASH_MISC, PMISC|AMISC);
DEBUG("fmppe 0x%x",fmppe);
LOG_DEBUG("fmppe 0x%x",fmppe);
target_write_u32(target, SCB_BASE|FMPPE, fmppe);
/* Commit FMPPE */
target_write_u32(target, FLASH_FMA, 1);
/* Write commit command */
/* TODO safety check, sice this cannot be undone */
WARNING("Flash protection cannot be removed once commited, commit is NOT executed !");
LOG_WARNING("Flash protection cannot be removed once commited, commit is NOT executed !");
/* target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_COMT); */
/* Wait until erase complete */
do
@ -666,7 +666,7 @@ int stellaris_protect(struct flash_bank_s *bank, int set, int first, int last)
target_read_u32(target, FLASH_CRIS, &flash_cris);
if(flash_cris & (AMASK))
{
WARNING("Error setting flash page protection, flash_cris 0x%x", flash_cris);
LOG_WARNING("Error setting flash page protection, flash_cris 0x%x", flash_cris);
target_write_u32(target, FLASH_CRIS, 0);
return ERROR_FLASH_OPERATION_FAILED;
}
@ -726,13 +726,13 @@ int stellaris_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32
armv7m_algorithm_t armv7m_info;
int retval;
DEBUG("(bank=%p buffer=%p offset=%08X wcount=%08X)",
LOG_DEBUG("(bank=%p buffer=%p offset=%08X wcount=%08X)",
bank, buffer, offset, wcount);
/* flash write code */
if (target_alloc_working_area(target, sizeof(stellaris_write_code), &write_algorithm) != ERROR_OK)
{
WARNING("no working area available, can't do block memory writes");
LOG_WARNING("no working area available, can't do block memory writes");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
};
@ -741,7 +741,7 @@ int stellaris_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32
/* memory buffer */
while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK)
{
DEBUG("called target_alloc_working_area(target=%p buffer_size=%08X source=%p)",
LOG_DEBUG("called target_alloc_working_area(target=%p buffer_size=%08X source=%p)",
target, buffer_size, source);
buffer_size /= 2;
if (buffer_size <= 256)
@ -750,7 +750,7 @@ int stellaris_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32
if (write_algorithm)
target_free_working_area(target, write_algorithm);
WARNING("no large enough working area available, can't do block memory writes");
LOG_WARNING("no large enough working area available, can't do block memory writes");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
};
@ -777,11 +777,11 @@ int stellaris_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32
buf_set_u32(reg_params[0].value, 0, 32, source->address);
buf_set_u32(reg_params[1].value, 0, 32, address);
buf_set_u32(reg_params[2].value, 0, 32, 4*thisrun_count);
WARNING("Algorithm flash write %i words to 0x%x, %i remaining",thisrun_count,address, wcount);
DEBUG("Algorithm flash write %i words to 0x%x, %i remaining",thisrun_count,address, wcount);
LOG_WARNING("Algorithm flash write %i words to 0x%x, %i remaining",thisrun_count,address, wcount);
LOG_DEBUG("Algorithm flash write %i words to 0x%x, %i remaining",thisrun_count,address, wcount);
if ((retval = target->type->run_algorithm(target, 0, NULL, 3, reg_params, write_algorithm->address, write_algorithm->address + sizeof(stellaris_write_code)-10, 10000, &armv7m_info)) != ERROR_OK)
{
ERROR("error executing stellaris flash write algorithm");
LOG_ERROR("error executing stellaris flash write algorithm");
target_free_working_area(target, source);
destroy_reg_param(&reg_params[0]);
destroy_reg_param(&reg_params[1]);
@ -823,7 +823,7 @@ int stellaris_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count
return ERROR_TARGET_NOT_HALTED;
}
DEBUG("(bank=%p buffer=%p offset=%08X count=%08X)",
LOG_DEBUG("(bank=%p buffer=%p offset=%08X count=%08X)",
bank, buffer, offset, count);
if (stellaris_info->did1 == 0)
@ -833,13 +833,13 @@ int stellaris_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count
if (stellaris_info->did1 == 0)
{
WARNING("Cannot identify target as a Stellaris processor");
LOG_WARNING("Cannot identify target as a Stellaris processor");
return ERROR_FLASH_OPERATION_FAILED;
}
if((offset & 3) || (count & 3))
{
WARNING("offset size must be word aligned");
LOG_WARNING("offset size must be word aligned");
return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
}
@ -865,14 +865,14 @@ int stellaris_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count
{
/* if block write failed (no sufficient working area),
* we use normal (slow) single dword accesses */
WARNING("couldn't use block writes, falling back to single memory accesses");
LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
}
else if (retval == ERROR_FLASH_OPERATION_FAILED)
{
/* if an error occured, we examine the reason, and quit */
target_read_u32(target, FLASH_CRIS, &flash_cris);
ERROR("flash writing failed with CRIS: 0x%x", flash_cris);
LOG_ERROR("flash writing failed with CRIS: 0x%x", flash_cris);
return ERROR_FLASH_OPERATION_FAILED;
}
}
@ -888,12 +888,12 @@ int stellaris_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count
while(count>0)
{
if (!(address&0xff)) DEBUG("0x%x",address);
if (!(address&0xff)) LOG_DEBUG("0x%x",address);
/* Program one word */
target_write_u32(target, FLASH_FMA, address);
target_write_buffer(target, FLASH_FMD, 4, buffer);
target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_WRITE);
/* DEBUG("0x%x 0x%x 0x%x",address,buf_get_u32(buffer, 0, 32),FMC_WRKEY | FMC_WRITE); */
/* LOG_DEBUG("0x%x 0x%x 0x%x",address,buf_get_u32(buffer, 0, 32),FMC_WRKEY | FMC_WRITE); */
/* Wait until write complete */
do
{
@ -908,7 +908,7 @@ int stellaris_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count
target_read_u32(target, FLASH_CRIS, &flash_cris);
if(flash_cris & (AMASK))
{
DEBUG("flash_cris 0x%x", flash_cris);
LOG_DEBUG("flash_cris 0x%x", flash_cris);
return ERROR_FLASH_OPERATION_FAILED;
}
return ERROR_OK;

28
src/flash/stm32x.c
View File

@ -92,7 +92,7 @@ int stm32x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char
if (argc < 6)
{
WARNING("incomplete flash_bank stm32x configuration");
LOG_WARNING("incomplete flash_bank stm32x configuration");
return ERROR_FLASH_BANK_INVALID;
}
@ -122,7 +122,7 @@ u32 stm32x_wait_status_busy(flash_bank_t *bank, int timeout)
/* wait for busy to clear */
while (((status = stm32x_get_flash_status(bank)) & FLASH_BSY) && (timeout-- > 0))
{
DEBUG("status: 0x%x", status);
LOG_DEBUG("status: 0x%x", status);
usleep(1000);
}
@ -144,7 +144,7 @@ int stm32x_read_options(struct flash_bank_s *bank)
stm32x_info->option_bytes.RDP = (optiondata & (1 << OPT_READOUT)) ? 0xFFFF : 0x5AA5;
if (optiondata & (1 << OPT_READOUT))
INFO("Device Security Bit Set");
LOG_INFO("Device Security Bit Set");
/* each bit refers to a 4bank protection */
target_read_u32(target, STM32_FLASH_WRPR, &optiondata);
@ -403,7 +403,7 @@ int stm32x_protect(struct flash_bank_s *bank, int set, int first, int last)
if ((first && (first % 4)) || ((last + 1) && (last + 1) % 4))
{
WARNING("sector start/end incorrect - stm32 has 4K sector protection");
LOG_WARNING("sector start/end incorrect - stm32 has 4K sector protection");
return ERROR_FLASH_SECTOR_INVALID;
}
@ -473,7 +473,7 @@ int stm32x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 co
/* flash write code */
if (target_alloc_working_area(target, sizeof(stm32x_flash_write_code), &stm32x_info->write_algorithm) != ERROR_OK)
{
WARNING("no working area available, can't do block memory writes");
LOG_WARNING("no working area available, can't do block memory writes");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
};
@ -489,7 +489,7 @@ int stm32x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 co
if (stm32x_info->write_algorithm)
target_free_working_area(target, stm32x_info->write_algorithm);
WARNING("no large enough working area available, can't do block memory writes");
LOG_WARNING("no large enough working area available, can't do block memory writes");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
};
@ -516,7 +516,7 @@ int stm32x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 co
if ((retval = target->type->run_algorithm(target, 0, NULL, 4, reg_params, stm32x_info->write_algorithm->address, \
stm32x_info->write_algorithm->address + (sizeof(stm32x_flash_write_code) - 10), 10000, &armv7m_info)) != ERROR_OK)
{
ERROR("error executing stm32x flash write algorithm");
LOG_ERROR("error executing stm32x flash write algorithm");
break;
}
@ -559,7 +559,7 @@ int stm32x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
if (offset & 0x1)
{
WARNING("offset 0x%x breaks required 2-byte alignment", offset);
LOG_WARNING("offset 0x%x breaks required 2-byte alignment", offset);
return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
}
@ -577,11 +577,11 @@ int stm32x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
/* if block write failed (no sufficient working area),
* we use normal (slow) single dword accesses */
WARNING("couldn't use block writes, falling back to single memory accesses");
LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
}
else if (retval == ERROR_FLASH_OPERATION_FAILED)
{
ERROR("flash writing failed with error code: 0x%x", retval);
LOG_ERROR("flash writing failed with error code: 0x%x", retval);
return ERROR_FLASH_OPERATION_FAILED;
}
}
@ -655,11 +655,11 @@ int stm32x_probe(struct flash_bank_s *bank)
/* read stm32 device id register */
target_read_u32(target, 0xE0042000, &device_id);
INFO( "device id = 0x%08x", device_id );
LOG_INFO( "device id = 0x%08x", device_id );
if (!(device_id & 0x410))
{
WARNING( "Cannot identify target as a STM32 family." );
LOG_WARNING( "Cannot identify target as a STM32 family." );
return ERROR_FLASH_OPERATION_FAILED;
}
@ -670,11 +670,11 @@ int stm32x_probe(struct flash_bank_s *bank)
if ((device_id >> 16) == 0 )
{
/* number of sectors incorrect on revA */
WARNING( "STM32 Rev A Silicon detected, probe inaccurate - assuming 128k flash" );
LOG_WARNING( "STM32 Rev A Silicon detected, probe inaccurate - assuming 128k flash" );
num_sectors = 128;
}
INFO( "flash size = %dkbytes", num_sectors );
LOG_INFO( "flash size = %dkbytes", num_sectors );
bank->base = 0x08000000;
bank->size = num_sectors * 1024;

36
src/flash/str7x.c
View File

@ -113,7 +113,7 @@ int str7x_build_block_list(struct flash_bank_s *bank)
b0_sectors = 8;
break;
default:
ERROR("BUG: unknown bank->size encountered");
LOG_ERROR("BUG: unknown bank->size encountered");
exit(-1);
}
@ -165,7 +165,7 @@ int str7x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char
if (argc < 7)
{
WARNING("incomplete flash_bank str7x configuration");
LOG_WARNING("incomplete flash_bank str7x configuration");
return ERROR_FLASH_BANK_INVALID;
}
@ -181,7 +181,7 @@ int str7x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char
{
if (bank->base != 0x40000000)
{
WARNING("overriding flash base address for STR71x device with 0x40000000");
LOG_WARNING("overriding flash base address for STR71x device with 0x40000000");
bank->base = 0x40000000;
}
}
@ -192,7 +192,7 @@ int str7x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char
if (bank->base != 0x80000000)
{
WARNING("overriding flash base address for STR73x device with 0x80000000");
LOG_WARNING("overriding flash base address for STR73x device with 0x80000000");
bank->base = 0x80000000;
}
}
@ -202,13 +202,13 @@ int str7x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char
if (bank->base != 0x20000000)
{
WARNING("overriding flash base address for STR75x device with 0x20000000");
LOG_WARNING("overriding flash base address for STR75x device with 0x20000000");
bank->base = 0x20000000;
}
}
else
{
ERROR("unknown STR7x variant: '%s'", args[6]);
LOG_ERROR("unknown STR7x variant: '%s'", args[6]);
free(str7x_info);
return ERROR_FLASH_BANK_INVALID;
}
@ -326,12 +326,12 @@ int str7x_erase(struct flash_bank_s *bank, int first, int last)
else if (str7x_info->sector_bank[i] == 1)
b1_sectors |= str7x_info->sector_bits[i];
else
ERROR("BUG: str7x_info->sector_bank[i] neither 0 nor 1 (%i)", str7x_info->sector_bank[i]);
LOG_ERROR("BUG: str7x_info->sector_bank[i] neither 0 nor 1 (%i)", str7x_info->sector_bank[i]);
}
if (b0_sectors)
{
DEBUG("b0_sectors: 0x%x", b0_sectors);
LOG_DEBUG("b0_sectors: 0x%x", b0_sectors);
/* clear FLASH_ER register */
target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0);
@ -353,14 +353,14 @@ int str7x_erase(struct flash_bank_s *bank, int first, int last)
if (retval)
{
ERROR("error erasing flash bank, FLASH_ER: 0x%x", retval);
LOG_ERROR("error erasing flash bank, FLASH_ER: 0x%x", retval);
return ERROR_FLASH_OPERATION_FAILED;
}
}
if (b1_sectors)
{
DEBUG("b1_sectors: 0x%x", b1_sectors);
LOG_DEBUG("b1_sectors: 0x%x", b1_sectors);
/* clear FLASH_ER register */
target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0);
@ -382,7 +382,7 @@ int str7x_erase(struct flash_bank_s *bank, int first, int last)
if (retval)
{
ERROR("error erasing flash bank, FLASH_ER: 0x%x", retval);
LOG_ERROR("error erasing flash bank, FLASH_ER: 0x%x", retval);
return ERROR_FLASH_OPERATION_FAILED;
}
}
@ -436,7 +436,7 @@ int str7x_protect(struct flash_bank_s *bank, int set, int first, int last)
retval = str7x_result(bank);
DEBUG("retval: 0x%8.8x", retval);
LOG_DEBUG("retval: 0x%8.8x", retval);
if (retval & FLASH_ERER)
return ERROR_FLASH_SECTOR_NOT_ERASED;
@ -486,7 +486,7 @@ int str7x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 cou
/* flash write code */
if (target_alloc_working_area(target, 4 * 20, &str7x_info->write_algorithm) != ERROR_OK)
{
WARNING("no working area available, can't do block memory writes");
LOG_WARNING("no working area available, can't do block memory writes");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
};
@ -502,7 +502,7 @@ int str7x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 cou
if (str7x_info->write_algorithm)
target_free_working_area(target, str7x_info->write_algorithm);
WARNING("no large enough working area available, can't do block memory writes");
LOG_WARNING("no large enough working area available, can't do block memory writes");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
}
@ -532,7 +532,7 @@ int str7x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 cou
if ((retval = target->type->run_algorithm(target, 0, NULL, 6, reg_params, str7x_info->write_algorithm->address, str7x_info->write_algorithm->address + (19 * 4), 10000, &armv4_5_info)) != ERROR_OK)
{
ERROR("error executing str7x flash write algorithm");
LOG_ERROR("error executing str7x flash write algorithm");
break;
}
@ -580,7 +580,7 @@ int str7x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
if (offset & 0x7)
{
WARNING("offset 0x%x breaks required 8-byte alignment", offset);
LOG_WARNING("offset 0x%x breaks required 8-byte alignment", offset);
return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
}
@ -616,14 +616,14 @@ int str7x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
/* if block write failed (no sufficient working area),
* we use normal (slow) single dword accesses */
WARNING("couldn't use block writes, falling back to single memory accesses");
LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
}
else if (retval == ERROR_FLASH_OPERATION_FAILED)
{
/* if an error occured, we examine the reason, and quit */
retval = str7x_result(bank);
ERROR("flash writing failed with error code: 0x%x", retval);
LOG_ERROR("flash writing failed with error code: 0x%x", retval);
return ERROR_FLASH_OPERATION_FAILED;
}
}

18
src/flash/str9x.c
View File

@ -115,7 +115,7 @@ int str9x_build_block_list(struct flash_bank_s *bank)
bank1start = bank->base;
break;
default:
ERROR("BUG: unknown bank->size encountered");
LOG_ERROR("BUG: unknown bank->size encountered");
exit(-1);
}
@ -156,7 +156,7 @@ int str9x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char
if (argc < 6)
{
WARNING("incomplete flash_bank str9x configuration");
LOG_WARNING("incomplete flash_bank str9x configuration");
return ERROR_FLASH_BANK_INVALID;
}
@ -279,7 +279,7 @@ int str9x_erase(struct flash_bank_s *bank, int first, int last)
if( status & 0x22 )
{
ERROR("error erasing flash bank, status: 0x%x", status);
LOG_ERROR("error erasing flash bank, status: 0x%x", status);
return ERROR_FLASH_OPERATION_FAILED;
}
}
@ -360,7 +360,7 @@ int str9x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 cou
/* flash write code */
if (target_alloc_working_area(target, 4 * 19, &str9x_info->write_algorithm) != ERROR_OK)
{
WARNING("no working area available, can't do block memory writes");
LOG_WARNING("no working area available, can't do block memory writes");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
};
@ -376,7 +376,7 @@ int str9x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 cou
if (str9x_info->write_algorithm)
target_free_working_area(target, str9x_info->write_algorithm);
WARNING("no large enough working area available, can't do block memory writes");
LOG_WARNING("no large enough working area available, can't do block memory writes");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
}
@ -404,7 +404,7 @@ int str9x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 cou
{
target_free_working_area(target, source);
target_free_working_area(target, str9x_info->write_algorithm);
ERROR("error executing str9x flash write algorithm");
LOG_ERROR("error executing str9x flash write algorithm");
return ERROR_FLASH_OPERATION_FAILED;
}
@ -449,7 +449,7 @@ int str9x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
if (offset & 0x1)
{
WARNING("offset 0x%x breaks required 2-byte alignment", offset);
LOG_WARNING("offset 0x%x breaks required 2-byte alignment", offset);
return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
}
@ -482,11 +482,11 @@ int str9x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
/* if block write failed (no sufficient working area),
* we use normal (slow) single dword accesses */
WARNING("couldn't use block writes, falling back to single memory accesses");
LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
}
else if (retval == ERROR_FLASH_OPERATION_FAILED)
{
ERROR("flash writing failed with error code: 0x%x", retval);
LOG_ERROR("flash writing failed with error code: 0x%x", retval);
return ERROR_FLASH_OPERATION_FAILED;
}
}

32
src/flash/str9xpec.c
View File

@ -129,7 +129,7 @@ int str9xpec_set_instr(int chain_pos, u32 new_instr, enum tap_state end_state)
if (device == NULL)
{
DEBUG("Invalid Target");
LOG_DEBUG("Invalid Target");
return ERROR_TARGET_INVALID;
}
@ -177,10 +177,10 @@ u8 str9xpec_isc_status(int chain_pos)
jtag_add_dr_scan(1, &field, TAP_RTI);
jtag_execute_queue();
DEBUG("status: 0x%2.2x", status);
LOG_DEBUG("status: 0x%2.2x", status);
if (status & ISC_STATUS_SECURITY)
INFO("Device Security Bit Set");
LOG_INFO("Device Security Bit Set");
return status;
}
@ -206,7 +206,7 @@ int str9xpec_isc_enable(struct flash_bank_s *bank)
{
/* we have entered isc mode */
str9xpec_info->isc_enable = 1;
DEBUG("ISC_MODE Enabled");
LOG_DEBUG("ISC_MODE Enabled");
}
return ERROR_OK;
@ -235,7 +235,7 @@ int str9xpec_isc_disable(struct flash_bank_s *bank)
{
/* we have left isc mode */
str9xpec_info->isc_enable = 0;
DEBUG("ISC_MODE Disabled");
LOG_DEBUG("ISC_MODE Disabled");
}
return ERROR_OK;
@ -251,7 +251,7 @@ int str9xpec_read_config(struct flash_bank_s *bank)
chain_pos = str9xpec_info->chain_pos;
DEBUG("ISC_CONFIGURATION");
LOG_DEBUG("ISC_CONFIGURATION");
/* execute ISC_CONFIGURATION command */
str9xpec_set_instr(chain_pos, ISC_CONFIGURATION, TAP_PI);
@ -290,7 +290,7 @@ int str9xpec_build_block_list(struct flash_bank_s *bank)
b0_sectors = 8;
break;
default:
ERROR("BUG: unknown bank->size encountered");
LOG_ERROR("BUG: unknown bank->size encountered");
exit(-1);
}
@ -336,7 +336,7 @@ int str9xpec_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, ch
if (argc < 6)
{
WARNING("incomplete flash_bank str9x configuration");
LOG_WARNING("incomplete flash_bank str9x configuration");
return ERROR_FLASH_BANK_INVALID;
}
@ -345,7 +345,7 @@ int str9xpec_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, ch
if (bank->base != 0x00000000)
{
WARNING("overriding flash base address for STR91x device with 0x00000000");
LOG_WARNING("overriding flash base address for STR91x device with 0x00000000");
bank->base = 0x00000000;
}
@ -390,7 +390,7 @@ int str9xpec_blank_check(struct flash_bank_s *bank, int first, int last)
buffer = calloc(CEIL(64, 8), 1);
DEBUG("blank check: first_bank: %i, last_bank: %i", first, last);
LOG_DEBUG("blank check: first_bank: %i, last_bank: %i", first, last);
for (i = first; i <= last; i++) {
buf_set_u32(buffer, str9xpec_info->sector_bits[i], 1, 1);
@ -489,7 +489,7 @@ int str9xpec_erase_area(struct flash_bank_s *bank, int first, int last)
buffer = calloc(CEIL(64, 8), 1);
DEBUG("erase: first_bank: %i, last_bank: %i", first, last);
LOG_DEBUG("erase: first_bank: %i, last_bank: %i", first, last);
/* last bank: 0xFF signals a full erase (unlock complete device) */
/* last bank: 0xFE signals a option byte erase */
@ -510,7 +510,7 @@ int str9xpec_erase_area(struct flash_bank_s *bank, int first, int last)
}
}
DEBUG("ISC_ERASE");
LOG_DEBUG("ISC_ERASE");
/* execute ISC_ERASE command */
str9xpec_set_instr(chain_pos, ISC_ERASE, TAP_PI);
@ -622,7 +622,7 @@ int str9xpec_protect(struct flash_bank_s *bank, int set, int first, int last)
if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
return ERROR_FLASH_OPERATION_FAILED;
DEBUG("protect: first_bank: %i, last_bank: %i", first, last);
LOG_DEBUG("protect: first_bank: %i, last_bank: %i", first, last);
/* last bank: 0xFF signals a full device protect */
if (last == 0xFF)
@ -709,7 +709,7 @@ int str9xpec_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
if (offset & 0x7)
{
WARNING("offset 0x%x breaks required 8-byte alignment", offset);
LOG_WARNING("offset 0x%x breaks required 8-byte alignment", offset);
return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
}
@ -740,11 +740,11 @@ int str9xpec_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
if (check_address != offset + count)
return ERROR_FLASH_DST_OUT_OF_BANK;
DEBUG("first_sector: %i, last_sector: %i", first_sector, last_sector);
LOG_DEBUG("first_sector: %i, last_sector: %i", first_sector, last_sector);
scanbuf = calloc(CEIL(64, 8), 1);
DEBUG("ISC_PROGRAM");
LOG_DEBUG("ISC_PROGRAM");
for (i = first_sector; i <= last_sector; i++)
{

134
src/flash/tms470.c
View File

@ -116,11 +116,11 @@ int tms470_read_part_info(struct flash_bank_s *bank)
/* read and parse the device identification register */
target_read_u32(target, 0xFFFFFFF0, &device_ident_reg);
INFO("device_ident_reg=0x%08x", device_ident_reg);
LOG_INFO("device_ident_reg=0x%08x", device_ident_reg);
if ((device_ident_reg & 7) == 0)
{
WARNING("Cannot identify target as a TMS470 family.");
LOG_WARNING("Cannot identify target as a TMS470 family.");
return ERROR_FLASH_OPERATION_FAILED;
}
@ -142,7 +142,7 @@ int tms470_read_part_info(struct flash_bank_s *bank)
if (bank->base >= 0x00040000)
{
ERROR("No %s flash bank contains base address 0x%08x.", part_name, bank->base);
LOG_ERROR("No %s flash bank contains base address 0x%08x.", part_name, bank->base);
return ERROR_FLASH_OPERATION_FAILED;
}
tms470_info->ordinal = 0;
@ -188,13 +188,13 @@ int tms470_read_part_info(struct flash_bank_s *bank)
}
else
{
ERROR("No %s flash bank contains base address 0x%08x.", part_name, bank->base);
LOG_ERROR("No %s flash bank contains base address 0x%08x.", part_name, bank->base);
return ERROR_FLASH_OPERATION_FAILED;
}
break;
default:
WARNING("Could not identify part 0x%02x as a member of the TMS470 family.", part_number);
LOG_WARNING("Could not identify part 0x%02x as a member of the TMS470 family.", part_number);
return ERROR_FLASH_OPERATION_FAILED;
}
@ -205,7 +205,7 @@ int tms470_read_part_info(struct flash_bank_s *bank)
bank->chip_width = 32;
bank->bus_width = 32;
INFO("Identified %s, ver=%d, core=%s, nvmem=%s.", part_name, silicon_version, (technology_family ? "1.8v" : "3.3v"), (rom_flash ? "rom" : "flash"));
LOG_INFO("Identified %s, ver=%d, core=%s, nvmem=%s.", part_name, silicon_version, (technology_family ? "1.8v" : "3.3v"), (rom_flash ? "rom" : "flash"));
tms470_info->device_ident_reg = device_ident_reg;
tms470_info->silicon_version = silicon_version;
@ -245,7 +245,7 @@ int tms470_handle_flash_keyset_command(struct command_context_s *cmd_ctx, char *
if (1 != sscanf(&args[i][start], "%x", &flashKeys[i]))
{
command_print(cmd_ctx, "could not process flash key %s", args[i]);
ERROR("could not process flash key %s", args[i]);
LOG_ERROR("could not process flash key %s", args[i]);
return ERROR_INVALID_ARGUMENTS;
}
}
@ -304,7 +304,7 @@ int tms470_handle_osc_megahertz_command(struct command_context_s *cmd_ctx, char
if (oscMHz <= 0)
{
ERROR("osc_megahertz must be positive and non-zero!");
LOG_ERROR("osc_megahertz must be positive and non-zero!");
command_print(cmd_ctx, "osc_megahertz must be positive and non-zero!");
oscMHz = 12;
return ERROR_INVALID_ARGUMENTS;
@ -344,7 +344,7 @@ int tms470_check_flash_unlocked(target_t * target)
u32 fmbbusy;
target_read_u32(target, 0xFFE89C08, &fmbbusy);
INFO("tms470 fmbbusy=0x%08x -> %s", fmbbusy, fmbbusy & 0x8000 ? "unlocked" : "LOCKED");
LOG_INFO("tms470 fmbbusy=0x%08x -> %s", fmbbusy, fmbbusy & 0x8000 ? "unlocked" : "LOCKED");
return fmbbusy & 0x8000 ? ERROR_OK : ERROR_FLASH_OPERATION_FAILED;
}
@ -394,7 +394,7 @@ int tms470_try_flash_keys(target_t * target, const u32 * key_set)
*/
target_read_u32(target, 0x00001FF0 + 4 * i, &tmp);
INFO("tms470 writing fmpkey=0x%08x", key_set[i]);
LOG_INFO("tms470 writing fmpkey=0x%08x", key_set[i]);
target_write_u32(target, 0xFFE89C0C, key_set[i]);
}
@ -456,12 +456,12 @@ int tms470_unlock_flash(struct flash_bank_s *bank)
{
if (tms470_try_flash_keys(target, p_key_sets[i]) == ERROR_OK)
{
INFO("tms470 flash is unlocked");
LOG_INFO("tms470 flash is unlocked");
return ERROR_OK;
}
}
WARNING("tms470 could not unlock flash memory protection level 2");
LOG_WARNING("tms470 could not unlock flash memory protection level 2");
return ERROR_FLASH_OPERATION_FAILED;
}
@ -482,7 +482,7 @@ int tms470_flash_initialize_internal_state_machine(struct flash_bank_s *bank)
fmmac2 &= ~0x0007;
fmmac2 |= (tms470_info->ordinal & 7);
target_write_u32(target, 0xFFE8BC04, fmmac2);
DEBUG("set fmmac2=0x%04x", fmmac2);
LOG_DEBUG("set fmmac2=0x%04x", fmmac2);
/*
* Disable level 1 sector protection by setting bit 15 of FMMAC1.
@ -490,25 +490,25 @@ int tms470_flash_initialize_internal_state_machine(struct flash_bank_s *bank)
target_read_u32(target, 0xFFE8BC00, &fmmac1);
fmmac1 |= 0x8000;
target_write_u32(target, 0xFFE8BC00, fmmac1);
DEBUG("set fmmac1=0x%04x", fmmac1);
LOG_DEBUG("set fmmac1=0x%04x", fmmac1);
/*
* FMTCREG=0x2fc0;
*/
target_write_u32(target, 0xFFE8BC10, 0x2fc0);
DEBUG("set fmtcreg=0x2fc0");
LOG_DEBUG("set fmtcreg=0x2fc0");
/*
* MAXPP=50
*/
target_write_u32(target, 0xFFE8A07C, 50);
DEBUG("set fmmaxpp=50");
LOG_DEBUG("set fmmaxpp=50");
/*
* MAXCP=0xf000+2000
*/
target_write_u32(target, 0xFFE8A084, 0xf000 + 2000);
DEBUG("set fmmaxcp=0x%04x", 0xf000 + 2000);
LOG_DEBUG("set fmmaxcp=0x%04x", 0xf000 + 2000);
/*
* configure VHV
@ -518,22 +518,22 @@ int tms470_flash_initialize_internal_state_machine(struct flash_bank_s *bank)
{
fmmaxep = 0xf000 + 4095;
target_write_u32(target, 0xFFE8A80C, 0x9964);
DEBUG("set fmptr3=0x9964");
LOG_DEBUG("set fmptr3=0x9964");
}
else
{
fmmaxep = 0xa000 + 4095;
target_write_u32(target, 0xFFE8A80C, 0x9b64);
DEBUG("set fmptr3=0x9b64");
LOG_DEBUG("set fmptr3=0x9b64");
}
target_write_u32(target, 0xFFE8A080, fmmaxep);
DEBUG("set fmmaxep=0x%04x", fmmaxep);
LOG_DEBUG("set fmmaxep=0x%04x", fmmaxep);
/*
* FMPTR4=0xa000
*/
target_write_u32(target, 0xFFE8A810, 0xa000);
DEBUG("set fmptr4=0xa000");
LOG_DEBUG("set fmptr4=0xa000");
/*
* FMPESETUP, delay parameter selected based on clock frequency.
@ -547,56 +547,56 @@ int tms470_flash_initialize_internal_state_machine(struct flash_bank_s *bank)
sysclk = (plldis ? 1 : (glbctrl & 0x08) ? 4 : 8) * oscMHz / (1 + (glbctrl & 7));
delay = (sysclk > 10) ? (sysclk + 1) / 2 : 5;
target_write_u32(target, 0xFFE8A018, (delay << 4) | (delay << 8));
DEBUG("set fmpsetup=0x%04x", (delay << 4) | (delay << 8));
LOG_DEBUG("set fmpsetup=0x%04x", (delay << 4) | (delay << 8));
/*
* FMPVEVACCESS, based on delay.
*/
k = delay | (delay << 8);
target_write_u32(target, 0xFFE8A05C, k);
DEBUG("set fmpvevaccess=0x%04x", k);
LOG_DEBUG("set fmpvevaccess=0x%04x", k);
/*
* FMPCHOLD, FMPVEVHOLD, FMPVEVSETUP, based on delay.
*/
k <<= 1;
target_write_u32(target, 0xFFE8A034, k);
DEBUG("set fmpchold=0x%04x", k);
LOG_DEBUG("set fmpchold=0x%04x", k);
target_write_u32(target, 0xFFE8A040, k);
DEBUG("set fmpvevhold=0x%04x", k);
LOG_DEBUG("set fmpvevhold=0x%04x", k);
target_write_u32(target, 0xFFE8A024, k);
DEBUG("set fmpvevsetup=0x%04x", k);
LOG_DEBUG("set fmpvevsetup=0x%04x", k);
/*
* FMCVACCESS, based on delay.
*/
k = delay * 16;
target_write_u32(target, 0xFFE8A060, k);
DEBUG("set fmcvaccess=0x%04x", k);
LOG_DEBUG("set fmcvaccess=0x%04x", k);
/*
* FMCSETUP, based on delay.
*/
k = 0x3000 | delay * 20;
target_write_u32(target, 0xFFE8A020, k);
DEBUG("set fmcsetup=0x%04x", k);
LOG_DEBUG("set fmcsetup=0x%04x", k);
/*
* FMEHOLD, based on delay.
*/
k = (delay * 20) << 2;
target_write_u32(target, 0xFFE8A038, k);
DEBUG("set fmehold=0x%04x", k);
LOG_DEBUG("set fmehold=0x%04x", k);
/*
* PWIDTH, CWIDTH, EWIDTH, based on delay.
*/
target_write_u32(target, 0xFFE8A050, delay * 8);
DEBUG("set fmpwidth=0x%04x", delay * 8);
LOG_DEBUG("set fmpwidth=0x%04x", delay * 8);
target_write_u32(target, 0xFFE8A058, delay * 1000);
DEBUG("set fmcwidth=0x%04x", delay * 1000);
LOG_DEBUG("set fmcwidth=0x%04x", delay * 1000);
target_write_u32(target, 0xFFE8A054, delay * 5400);
DEBUG("set fmewidth=0x%04x", delay * 5400);
LOG_DEBUG("set fmewidth=0x%04x", delay * 5400);
return result;
}
@ -610,47 +610,47 @@ int tms470_flash_status(struct flash_bank_s *bank)
u32 fmmstat;
target_read_u32(target, 0xFFE8BC0C, &fmmstat);
DEBUG("set fmmstat=0x%04x", fmmstat);
LOG_DEBUG("set fmmstat=0x%04x", fmmstat);
if (fmmstat & 0x0080)
{
WARNING("tms470 flash command: erase still active after busy clear.");
LOG_WARNING("tms470 flash command: erase still active after busy clear.");
result = ERROR_FLASH_OPERATION_FAILED;
}
if (fmmstat & 0x0040)
{
WARNING("tms470 flash command: program still active after busy clear.");
LOG_WARNING("tms470 flash command: program still active after busy clear.");
result = ERROR_FLASH_OPERATION_FAILED;
}
if (fmmstat & 0x0020)
{
WARNING("tms470 flash command: invalid data command.");
LOG_WARNING("tms470 flash command: invalid data command.");
result = ERROR_FLASH_OPERATION_FAILED;
}
if (fmmstat & 0x0010)
{
WARNING("tms470 flash command: program, erase or validate sector failed.");
LOG_WARNING("tms470 flash command: program, erase or validate sector failed.");
result = ERROR_FLASH_OPERATION_FAILED;
}
if (fmmstat & 0x0008)
{
WARNING("tms470 flash command: voltage instability detected.");
LOG_WARNING("tms470 flash command: voltage instability detected.");
result = ERROR_FLASH_OPERATION_FAILED;
}
if (fmmstat & 0x0006)
{
WARNING("tms470 flash command: command suspend detected.");
LOG_WARNING("tms470 flash command: command suspend detected.");
result = ERROR_FLASH_OPERATION_FAILED;
}
if (fmmstat & 0x0001)
{
WARNING("tms470 flash command: sector was locked.");
LOG_WARNING("tms470 flash command: sector was locked.");
result = ERROR_FLASH_OPERATION_FAILED;
}
@ -672,12 +672,12 @@ int tms470_erase_sector(struct flash_bank_s *bank, int sector)
*/
target_read_u32(target, 0xFFFFFFDC, &glbctrl);
target_write_u32(target, 0xFFFFFFDC, glbctrl | 0x10);
DEBUG("set glbctrl=0x%08x", glbctrl | 0x10);
LOG_DEBUG("set glbctrl=0x%08x", glbctrl | 0x10);
/* Force normal read mode. */
target_read_u32(target, 0xFFE89C00, &orig_fmregopt);
target_write_u32(target, 0xFFE89C00, 0);
DEBUG("set fmregopt=0x%08x", 0);
LOG_DEBUG("set fmregopt=0x%08x", 0);
(void)tms470_flash_initialize_internal_state_machine(bank);
@ -689,13 +689,13 @@ int tms470_erase_sector(struct flash_bank_s *bank, int sector)
{
target_read_u32(target, 0xFFE88008, &fmbsea);
target_write_u32(target, 0xFFE88008, fmbsea | (1 << sector));
DEBUG("set fmbsea=0x%04x", fmbsea | (1 << sector));
LOG_DEBUG("set fmbsea=0x%04x", fmbsea | (1 << sector));
}
else
{
target_read_u32(target, 0xFFE8800C, &fmbseb);
target_write_u32(target, 0xFFE8800C, fmbseb | (1 << (sector - 16)));
DEBUG("set fmbseb=0x%04x", fmbseb | (1 << (sector - 16)));
LOG_DEBUG("set fmbseb=0x%04x", fmbseb | (1 << (sector - 16)));
}
bank->sectors[sector].is_protected = 0;
@ -703,11 +703,11 @@ int tms470_erase_sector(struct flash_bank_s *bank, int sector)
* clear status regiser, sent erase command, kickoff erase
*/
target_write_u16(target, flashAddr, 0x0040);
DEBUG("write *(u16 *)0x%08x=0x0040", flashAddr);
LOG_DEBUG("write *(u16 *)0x%08x=0x0040", flashAddr);
target_write_u16(target, flashAddr, 0x0020);
DEBUG("write *(u16 *)0x%08x=0x0020", flashAddr);
LOG_DEBUG("write *(u16 *)0x%08x=0x0020", flashAddr);
target_write_u16(target, flashAddr, 0xffff);
DEBUG("write *(u16 *)0x%08x=0xffff", flashAddr);
LOG_DEBUG("write *(u16 *)0x%08x=0xffff", flashAddr);
/*
* Monitor FMMSTAT, busy until clear, then check and other flags for
@ -728,19 +728,19 @@ int tms470_erase_sector(struct flash_bank_s *bank, int sector)
if (sector < 16)
{
target_write_u32(target, 0xFFE88008, fmbsea);
DEBUG("set fmbsea=0x%04x", fmbsea);
LOG_DEBUG("set fmbsea=0x%04x", fmbsea);
bank->sectors[sector].is_protected = fmbsea & (1 << sector) ? 0 : 1;
}
else
{
target_write_u32(target, 0xFFE8800C, fmbseb);
DEBUG("set fmbseb=0x%04x", fmbseb);
LOG_DEBUG("set fmbseb=0x%04x", fmbseb);
bank->sectors[sector].is_protected = fmbseb & (1 << (sector - 16)) ? 0 : 1;
}
target_write_u32(target, 0xFFE89C00, orig_fmregopt);
DEBUG("set fmregopt=0x%08x", orig_fmregopt);
LOG_DEBUG("set fmregopt=0x%08x", orig_fmregopt);
target_write_u32(target, 0xFFFFFFDC, glbctrl);
DEBUG("set glbctrl=0x%08x", glbctrl);
LOG_DEBUG("set glbctrl=0x%08x", glbctrl);
if (result == ERROR_OK)
{
@ -781,7 +781,7 @@ int tms470_erase(struct flash_bank_s *bank, int first, int last)
if ((first < 0) || (first >= bank->num_sectors) || (last < 0) || (last >= bank->num_sectors) || (first > last))
{
ERROR("Sector range %d to %d invalid.", first, last);
LOG_ERROR("Sector range %d to %d invalid.", first, last);
return ERROR_FLASH_SECTOR_INVALID;
}
@ -793,18 +793,18 @@ int tms470_erase(struct flash_bank_s *bank, int first, int last)
for (sector = first; sector <= last; sector++)
{
INFO("Erasing tms470 bank %d sector %d...", tms470_info->ordinal, sector);
LOG_INFO("Erasing tms470 bank %d sector %d...", tms470_info->ordinal, sector);
result = tms470_erase_sector(bank, sector);
if (result != ERROR_OK)
{
ERROR("tms470 could not erase flash sector.");
LOG_ERROR("tms470 could not erase flash sector.");
break;
}
else
{
INFO("sector erased successfully.");
LOG_INFO("sector erased successfully.");
}
}
@ -829,7 +829,7 @@ int tms470_protect(struct flash_bank_s *bank, int set, int first, int last)
if ((first < 0) || (first >= bank->num_sectors) || (last < 0) || (last >= bank->num_sectors) || (first > last))
{
ERROR("Sector range %d to %d invalid.", first, last);
LOG_ERROR("Sector range %d to %d invalid.", first, last);
return ERROR_FLASH_SECTOR_INVALID;
}
@ -877,7 +877,7 @@ int tms470_write(struct flash_bank_s *bank, u8 * buffer, u32 offset, u32 count)
tms470_read_part_info(bank);
INFO("Writing %d bytes starting at 0x%08x", count, bank->base + offset);
LOG_INFO("Writing %d bytes starting at 0x%08x", count, bank->base + offset);
/* set GLBCTRL.4 */
target_read_u32(target, 0xFFFFFFDC, &glbctrl);
@ -911,7 +911,7 @@ int tms470_write(struct flash_bank_s *bank, u8 * buffer, u32 offset, u32 count)
if (word != 0xffff)
{
INFO("writing 0x%04x at 0x%08x", word, addr);
LOG_INFO("writing 0x%04x at 0x%08x", word, addr);
/* clear status register */
target_write_u16(target, addr, 0x0040);
@ -936,15 +936,15 @@ int tms470_write(struct flash_bank_s *bank, u8 * buffer, u32 offset, u32 count)
if (fmmstat & 0x3ff)
{
ERROR("fmstat=0x%04x", fmmstat);
ERROR("Could not program word 0x%04x at address 0x%08x.", word, addr);
LOG_ERROR("fmstat=0x%04x", fmmstat);
LOG_ERROR("Could not program word 0x%04x at address 0x%08x.", word, addr);
result = ERROR_FLASH_OPERATION_FAILED;
break;
}
}
else
{
INFO("skipping 0xffff at 0x%08x", addr);
LOG_INFO("skipping 0xffff at 0x%08x", addr);
}
}
@ -964,7 +964,7 @@ int tms470_probe(struct flash_bank_s *bank)
{
if (bank->target->state != TARGET_HALTED)
{
WARNING("Cannot communicate... target not halted.");
LOG_WARNING("Cannot communicate... target not halted.");
return ERROR_TARGET_NOT_HALTED;
}
@ -1033,7 +1033,7 @@ int tms470_erase_check(struct flash_bank_s *bank)
{
u32 i, addr = bank->base + bank->sectors[sector].offset;
INFO("checking flash bank %d sector %d", tms470_info->ordinal, sector);
LOG_INFO("checking flash bank %d sector %d", tms470_info->ordinal, sector);
target_read_buffer(target, addr, bank->sectors[sector].size, buffer);
@ -1042,8 +1042,8 @@ int tms470_erase_check(struct flash_bank_s *bank)
{
if (buffer[i] != 0xff)
{
WARNING("tms470 bank %d, sector %d, not erased.", tms470_info->ordinal, sector);
WARNING("at location 0x%08x: flash data is 0x%02x.", addr + i, buffer[i]);
LOG_WARNING("tms470 bank %d, sector %d, not erased.", tms470_info->ordinal, sector);
LOG_WARNING("at location 0x%08x: flash data is 0x%02x.", addr + i, buffer[i]);
bank->sectors[sector].is_erased = 0;
break;
@ -1057,7 +1057,7 @@ int tms470_erase_check(struct flash_bank_s *bank)
}
else
{
INFO("sector erased");
LOG_INFO("sector erased");
}
}
@ -1111,7 +1111,7 @@ int tms470_protect_check(struct flash_bank_s *bank)
bank->sectors[sector].is_protected = protected;
}
DEBUG("bank %d sector %d is %s", tms470_info->ordinal, sector, protected ? "protected" : "not protected");
LOG_DEBUG("bank %d sector %d is %s", tms470_info->ordinal, sector, protected ? "protected" : "not protected");
}
return result;

2
src/helper/binarybuffer.c
View File

@ -78,7 +78,7 @@ u32 buf_get_u32(u8* buffer, unsigned int first, unsigned int num)
if (!buffer)
{
ERROR("buffer not initialized");
LOG_ERROR("buffer not initialized");
return 0;
}

2
src/helper/command.c
View File

@ -372,7 +372,7 @@ int command_run_line(command_context_t *context, char *line)
if (*line && (line[0] == '#'))
return ERROR_OK;
DEBUG("%s", line);
LOG_DEBUG("%s", line);
nwords = parse_line(line, words, sizeof(words) / sizeof(words[0]));

2
src/helper/configuration.c
View File

@ -84,7 +84,7 @@ FILE *open_file_from_path (char *file, char *mode)
}
if (fp)
DEBUG("opened %s", full_path);
LOG_DEBUG("opened %s", full_path);
return fp;
}

10
src/helper/fileio.c
View File

@ -62,7 +62,7 @@ int fileio_open_local(fileio_t *fileio)
strcpy(access, "a+");
break;
default:
ERROR("BUG: access neither read, write nor readwrite");
LOG_ERROR("BUG: access neither read, write nor readwrite");
return ERROR_INVALID_ARGUMENTS;
}
@ -76,7 +76,7 @@ int fileio_open_local(fileio_t *fileio)
if (!(fileio->file = open_file_from_path (fileio->url, access)))
{
ERROR("couldn't open %s", fileio->url);
LOG_ERROR("couldn't open %s", fileio->url);
return ERROR_FILEIO_OPERATION_FAILED;
}
@ -127,11 +127,11 @@ int fileio_close_local(fileio_t *fileio)
{
if (retval == EBADF)
{
ERROR("BUG: fileio_local->file not a valid file descriptor");
LOG_ERROR("BUG: fileio_local->file not a valid file descriptor");
}
else
{
ERROR("couldn't close %s: %s", fileio->url, strerror(errno));
LOG_ERROR("couldn't close %s: %s", fileio->url, strerror(errno));
}
return ERROR_FILEIO_OPERATION_FAILED;
@ -157,7 +157,7 @@ int fileio_seek(fileio_t *fileio, u32 position)
int retval;
if ((retval = fseek(fileio->file, position, SEEK_SET)) != 0)
{
ERROR("couldn't seek file %s: %s", fileio->url, strerror(errno));
LOG_ERROR("couldn't seek file %s: %s", fileio->url, strerror(errno));
return ERROR_FILEIO_OPERATION_FAILED;
}

10
src/helper/log.c
View File

@ -61,7 +61,7 @@ static int count = 0;
*/
static void log_puts(enum log_levels level, const char *file, int line, const char *function, const char *string)
{
if (level == LOG_OUTPUT)
if (level == LOG_LVL_OUTPUT)
{
/* do not prepend any headers, just print out what we were given and return */
fputs(string, log_output);
@ -75,7 +75,7 @@ static void log_puts(enum log_levels level, const char *file, int line, const ch
if (strchr(string, '\n')!=NULL)
{
if (debug_level >= LOG_DEBUG)
if (debug_level >= LOG_LVL_DEBUG)
{
/* print with count and time information */
int t=(int)(timeval_ms()-start);
@ -94,8 +94,8 @@ static void log_puts(enum log_levels level, const char *file, int line, const ch
fflush(log_output);
/* Never forward LOG_DEBUG, too verbose and they can be found in the log if need be */
if (level <= LOG_INFO)
/* Never forward LOG_LVL_DEBUG, too verbose and they can be found in the log if need be */
if (level <= LOG_LVL_INFO)
{
log_callback_t *cb, *next;
cb = log_callbacks;
@ -205,7 +205,7 @@ int log_init(struct command_context_s *cmd_ctx)
{
/* set defaults for daemon configuration, if not set by cmdline or cfgfile */
if (debug_level == -1)
debug_level = LOG_INFO;
debug_level = LOG_LVL_INFO;
if (log_output == NULL)
{

59
src/helper/log.h
View File

@ -26,25 +26,25 @@
#include <stdarg.h>
/* logging priorities
* LOG_SILENT - turn off all output. In lieu of try+catch this can be used as a
* LOG_LVL_SILENT - turn off all output. In lieu of try+catch this can be used as a
* feeble ersatz.
* LOG_USER - user messages. Could be anything from information
* LOG_LVL_USER - user messages. Could be anything from information
* to progress messags. These messages do not represent
* incorrect or unexpected behaviour, just normal execution.
* LOG_ERROR - fatal errors, that are likely to cause program abort
* LOG_WARNING - non-fatal errors, that may be resolved later
* LOG_INFO - state information, etc.
* LOG_DEBUG - debug statements, execution trace
* LOG_LVL_ERROR - fatal errors, that are likely to cause program abort
* LOG_LVL_WARNING - non-fatal errors, that may be resolved later
* LOG_LVL_INFO - state information, etc.
* LOG_LVL_DEBUG - debug statements, execution trace
*/
enum log_levels
{
LOG_SILENT = -3,
LOG_OUTPUT = -2,
LOG_USER = -1,
LOG_ERROR = 0,
LOG_WARNING = 1,
LOG_INFO = 2,
LOG_DEBUG = 3
LOG_LVL_SILENT = -3,
LOG_LVL_OUTPUT = -2,
LOG_LVL_USER = -1,
LOG_LVL_ERROR = 0,
LOG_LVL_WARNING = 1,
LOG_LVL_INFO = 2,
LOG_LVL_DEBUG = 3
};
extern void log_printf(enum log_levels level, const char *file, int line,
@ -79,30 +79,29 @@ extern int debug_level;
* Matters on feeble CPUs for DEBUG/INFO statements that are involved frequently */
#define DEBUG(expr ...) \
log_printf_lf (LOG_DEBUG, __FILE__, __LINE__, __FUNCTION__, expr)
#define LOG_DEBUG(expr ...) \
log_printf_lf (LOG_LVL_DEBUG, __FILE__, __LINE__, __FUNCTION__, expr)
#define INFO(expr ...) \
log_printf_lf (LOG_INFO, __FILE__, __LINE__, __FUNCTION__, expr)
#define LOG_INFO(expr ...) \
log_printf_lf (LOG_LVL_INFO, __FILE__, __LINE__, __FUNCTION__, expr)
#define INFO_N(expr ...) \
log_printf (LOG_INFO, __FILE__, __LINE__, __FUNCTION__, expr)
#define LOG_INFO_N(expr ...) \
log_printf (LOG_LVL_INFO, __FILE__, __LINE__, __FUNCTION__, expr)
#define WARNING(expr ...) \
log_printf_lf (LOG_WARNING, __FILE__, __LINE__, __FUNCTION__, expr)
#define LOG_WARNING(expr ...) \
log_printf_lf (LOG_LVL_WARNING, __FILE__, __LINE__, __FUNCTION__, expr)
#define ERROR(expr ...) \
log_printf_lf (LOG_ERROR, __FILE__, __LINE__, __FUNCTION__, expr)
#define LOG_ERROR(expr ...) \
log_printf_lf (LOG_LVL_ERROR, __FILE__, __LINE__, __FUNCTION__, expr)
#define USER(expr ...) \
log_printf_lf (LOG_USER, __FILE__, __LINE__, __FUNCTION__, expr)
#define LOG_USER(expr ...) \
log_printf_lf (LOG_LVL_USER, __FILE__, __LINE__, __FUNCTION__, expr)
#define USER_N(expr ...) \
log_printf (LOG_USER, __FILE__, __LINE__, __FUNCTION__, expr)
#define OUTPUT(expr ...) \
log_printf (LOG_OUTPUT, __FILE__, __LINE__, __FUNCTION__, expr)
#define LOG_USER_N(expr ...) \
log_printf (LOG_LVL_USER, __FILE__, __LINE__, __FUNCTION__, expr)
#define LOG_OUTPUT(expr ...) \
log_printf (LOG_LVL_OUTPUT, __FILE__, __LINE__, __FUNCTION__, expr)
/* general failures
* error codes < 100

18
src/helper/options.c
View File

@ -47,7 +47,7 @@ static struct option long_options[] =
int configuration_output_handler(struct command_context_s *context, char* line)
{
INFO_N(line);
LOG_INFO_N(line);
return ERROR_OK;
}
@ -111,14 +111,14 @@ int parse_cmdline_args(struct command_context_s *cmd_ctx, int argc, char *argv[]
if (help_flag)
{
OUTPUT("Open On-Chip Debugger\n(c) 2005-2008 by Dominic Rath\n\n");
OUTPUT("--help | -h\tdisplay this help\n");
OUTPUT("--version | -v\tdisplay OpenOCD version\n");
OUTPUT("--file | -f\tuse configuration file <name>\n");
OUTPUT("--search | -s\tdir to search for config files and scripts\n");
OUTPUT("--debug | -d\tset debug level <0-3>\n");
OUTPUT("--log_output | -l\tredirect log output to file <name>\n");
OUTPUT("--command | -c\trun <command>\n");
LOG_OUTPUT("Open On-Chip Debugger\n(c) 2005-2008 by Dominic Rath\n\n");
LOG_OUTPUT("--help | -h\tdisplay this help\n");
LOG_OUTPUT("--version | -v\tdisplay OpenOCD version\n");
LOG_OUTPUT("--file | -f\tuse configuration file <name>\n");
LOG_OUTPUT("--search | -s\tdir to search for config files and scripts\n");
LOG_OUTPUT("--debug | -d\tset debug level <0-3>\n");
LOG_OUTPUT("--log_output | -l\tredirect log output to file <name>\n");
LOG_OUTPUT("--command | -c\trun <command>\n");
exit(-1);
}

2
src/helper/replacements.h
View File

@ -140,8 +140,6 @@ void usleep(int us);
#include <windows.h>
#include <time.h>
#undef ERROR
#if IS_MINGW == 1
static __inline unsigned char inb(unsigned short int port)
{

33
src/jtag/amt_jtagaccel.c
View File

@ -53,7 +53,6 @@
#if IS_CYGWIN == 1
#include <windows.h>
#include <errno.h>
#undef ERROR
#endif
#endif
@ -165,7 +164,7 @@ void amt_jtagaccel_end_state(state)
end_state = state;
else
{
ERROR("BUG: %i is not a valid end state", state);
LOG_ERROR("BUG: %i is not a valid end state", state);
exit(-1);
}
}
@ -181,7 +180,7 @@ void amt_wait_scan_busy()
if (ar_status & 0x80)
{
ERROR("amt_jtagaccel timed out while waiting for end of scan, rtck was %s, last AR_STATUS: 0x%2.2x", (rtck_enabled) ? "enabled" : "disabled", ar_status);
LOG_ERROR("amt_jtagaccel timed out while waiting for end of scan, rtck was %s, last AR_STATUS: 0x%2.2x", (rtck_enabled) ? "enabled" : "disabled", ar_status);
exit(-1);
}
}
@ -344,14 +343,14 @@ int amt_jtagaccel_execute_queue(void)
{
case JTAG_END_STATE:
#ifdef _DEBUG_JTAG_IO_
DEBUG("end_state: %i", cmd->cmd.end_state->end_state);
LOG_DEBUG("end_state: %i", cmd->cmd.end_state->end_state);
#endif
if (cmd->cmd.end_state->end_state != -1)
amt_jtagaccel_end_state(cmd->cmd.end_state->end_state);
break;
case JTAG_RESET:
#ifdef _DEBUG_JTAG_IO_
DEBUG("reset trst: %i srst %i", cmd->cmd.reset->trst, cmd->cmd.reset->srst);
LOG_DEBUG("reset trst: %i srst %i", cmd->cmd.reset->trst, cmd->cmd.reset->srst);
#endif
if (cmd->cmd.reset->trst == 1)
{
@ -361,7 +360,7 @@ int amt_jtagaccel_execute_queue(void)
break;
case JTAG_RUNTEST:
#ifdef _DEBUG_JTAG_IO_
DEBUG("runtest %i cycles, end in %i", cmd->cmd.runtest->num_cycles, cmd->cmd.runtest->end_state);
LOG_DEBUG("runtest %i cycles, end in %i", cmd->cmd.runtest->num_cycles, cmd->cmd.runtest->end_state);
#endif
if (cmd->cmd.runtest->end_state != -1)
amt_jtagaccel_end_state(cmd->cmd.runtest->end_state);
@ -369,7 +368,7 @@ int amt_jtagaccel_execute_queue(void)
break;
case JTAG_STATEMOVE:
#ifdef _DEBUG_JTAG_IO_
DEBUG("statemove end in %i", cmd->cmd.statemove->end_state);
LOG_DEBUG("statemove end in %i", cmd->cmd.statemove->end_state);
#endif
if (cmd->cmd.statemove->end_state != -1)
amt_jtagaccel_end_state(cmd->cmd.statemove->end_state);
@ -377,7 +376,7 @@ int amt_jtagaccel_execute_queue(void)
break;
case JTAG_SCAN:
#ifdef _DEBUG_JTAG_IO_
DEBUG("scan end in %i", cmd->cmd.scan->end_state);
LOG_DEBUG("scan end in %i", cmd->cmd.scan->end_state);
#endif
if (cmd->cmd.scan->end_state != -1)
amt_jtagaccel_end_state(cmd->cmd.scan->end_state);
@ -391,12 +390,12 @@ int amt_jtagaccel_execute_queue(void)
break;
case JTAG_SLEEP:
#ifdef _DEBUG_JTAG_IO_
DEBUG("sleep %i", cmd->cmd.sleep->us);
LOG_DEBUG("sleep %i", cmd->cmd.sleep->us);
#endif
jtag_sleep(cmd->cmd.sleep->us);
break;
default:
ERROR("BUG: unknown JTAG command type encountered");
LOG_ERROR("BUG: unknown JTAG command type encountered");
exit(-1);
}
cmd = cmd->next;
@ -445,7 +444,7 @@ int amt_jtagaccel_init(void)
#if PARPORT_USE_PPDEV == 1
if (device_handle > 0)
{
ERROR("device is already opened");
LOG_ERROR("device is already opened");
return ERROR_JTAG_INIT_FAILED;
}
@ -454,14 +453,14 @@ int amt_jtagaccel_init(void)
if (device_handle < 0)
{
ERROR("cannot open device. check it exists and that user read and write rights are set");
LOG_ERROR("cannot open device. check it exists and that user read and write rights are set");
return ERROR_JTAG_INIT_FAILED;
}
i = ioctl(device_handle, PPCLAIM);
if (i < 0)
{
ERROR("cannot claim device");
LOG_ERROR("cannot claim device");
return ERROR_JTAG_INIT_FAILED;
}
@ -469,7 +468,7 @@ int amt_jtagaccel_init(void)
i = ioctl(device_handle, PPSETMODE, & i);
if (i < 0)
{
ERROR(" cannot set compatible mode to device");
LOG_ERROR(" cannot set compatible mode to device");
return ERROR_JTAG_INIT_FAILED;
}
@ -483,7 +482,7 @@ int amt_jtagaccel_init(void)
if (amt_jtagaccel_port == 0)
{
amt_jtagaccel_port = 0x378;
WARNING("No parport port specified, using default '0x378' (LPT1)");
LOG_WARNING("No parport port specified, using default '0x378' (LPT1)");
}
#if PARPORT_USE_GIVEIO == 1
@ -491,7 +490,7 @@ int amt_jtagaccel_init(void)
#else /* PARPORT_USE_GIVEIO */
if (ioperm(amt_jtagaccel_port, 5, 1) != 0) {
#endif /* PARPORT_USE_GIVEIO */
ERROR("missing privileges for direct i/o");
LOG_ERROR("missing privileges for direct i/o");
return ERROR_JTAG_INIT_FAILED;
}
@ -531,7 +530,7 @@ int amt_jtagaccel_init(void)
/* read status register */
AMT_AR(ar_status);
DEBUG("AR_STATUS: 0x%2.2x", ar_status);
LOG_DEBUG("AR_STATUS: 0x%2.2x", ar_status);
return ERROR_OK;
}

4
src/jtag/at91rm9200.c
View File

@ -222,7 +222,7 @@ int at91rm9200_init(void)
if (at91rm9200_device == NULL || at91rm9200_device[0] == 0)
{
at91rm9200_device = "rea_ecr";
WARNING("No at91rm9200 device specified, using default 'rea_ecr'");
LOG_WARNING("No at91rm9200 device specified, using default 'rea_ecr'");
}
while (cur_device->name)
@ -237,7 +237,7 @@ int at91rm9200_init(void)
if (!device)
{
ERROR("No matching device found for %s", at91rm9200_device);
LOG_ERROR("No matching device found for %s", at91rm9200_device);
return ERROR_JTAG_INIT_FAILED;
}

22
src/jtag/bitbang.c
View File

@ -50,7 +50,7 @@ void bitbang_end_state(enum tap_state state)
end_state = state;
else
{
ERROR("BUG: %i is not a valid end state", state);
LOG_ERROR("BUG: %i is not a valid end state", state);
exit(-1);
}
}
@ -90,7 +90,7 @@ void bitbang_path_move(pathmove_command_t *cmd)
}
else
{
ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_strings[cur_state], tap_state_strings[cmd->path[state_count]]);
LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_strings[cur_state], tap_state_strings[cmd->path[state_count]]);
exit(-1);
}
@ -234,7 +234,7 @@ int bitbang_execute_queue(void)
if (!bitbang_interface)
{
ERROR("BUG: Bitbang interface called, but not yet initialized");
LOG_ERROR("BUG: Bitbang interface called, but not yet initialized");
exit(-1);
}
@ -252,14 +252,14 @@ int bitbang_execute_queue(void)
{
case JTAG_END_STATE:
#ifdef _DEBUG_JTAG_IO_
DEBUG("end_state: %i", cmd->cmd.end_state->end_state);
LOG_DEBUG("end_state: %i", cmd->cmd.end_state->end_state);
#endif
if (cmd->cmd.end_state->end_state != -1)
bitbang_end_state(cmd->cmd.end_state->end_state);
break;
case JTAG_RESET:
#ifdef _DEBUG_JTAG_IO_
DEBUG("reset trst: %i srst %i", cmd->cmd.reset->trst, cmd->cmd.reset->srst);
LOG_DEBUG("reset trst: %i srst %i", cmd->cmd.reset->trst, cmd->cmd.reset->srst);
#endif
if (cmd->cmd.reset->trst == 1)
{
@ -269,7 +269,7 @@ int bitbang_execute_queue(void)
break;
case JTAG_RUNTEST:
#ifdef _DEBUG_JTAG_IO_
DEBUG("runtest %i cycles, end in %i", cmd->cmd.runtest->num_cycles, cmd->cmd.runtest->end_state);
LOG_DEBUG("runtest %i cycles, end in %i", cmd->cmd.runtest->num_cycles, cmd->cmd.runtest->end_state);
#endif
if (cmd->cmd.runtest->end_state != -1)
bitbang_end_state(cmd->cmd.runtest->end_state);
@ -277,7 +277,7 @@ int bitbang_execute_queue(void)
break;
case JTAG_STATEMOVE:
#ifdef _DEBUG_JTAG_IO_
DEBUG("statemove end in %i", cmd->cmd.statemove->end_state);
LOG_DEBUG("statemove end in %i", cmd->cmd.statemove->end_state);
#endif
if (cmd->cmd.statemove->end_state != -1)
bitbang_end_state(cmd->cmd.statemove->end_state);
@ -285,13 +285,13 @@ int bitbang_execute_queue(void)
break;
case JTAG_PATHMOVE:
#ifdef _DEBUG_JTAG_IO_
DEBUG("pathmove: %i states, end in %i", cmd->cmd.pathmove->num_states, cmd->cmd.pathmove->path[cmd->cmd.pathmove->num_states - 1]);
LOG_DEBUG("pathmove: %i states, end in %i", cmd->cmd.pathmove->num_states, cmd->cmd.pathmove->path[cmd->cmd.pathmove->num_states - 1]);
#endif
bitbang_path_move(cmd->cmd.pathmove);
break;
case JTAG_SCAN:
#ifdef _DEBUG_JTAG_IO_
DEBUG("%s scan end in %i", (cmd->cmd.scan->ir_scan) ? "IR" : "DR", cmd->cmd.scan->end_state);
LOG_DEBUG("%s scan end in %i", (cmd->cmd.scan->ir_scan) ? "IR" : "DR", cmd->cmd.scan->end_state);
#endif
if (cmd->cmd.scan->end_state != -1)
bitbang_end_state(cmd->cmd.scan->end_state);
@ -305,12 +305,12 @@ int bitbang_execute_queue(void)
break;
case JTAG_SLEEP:
#ifdef _DEBUG_JTAG_IO_
DEBUG("sleep %i", cmd->cmd.sleep->us);
LOG_DEBUG("sleep %i", cmd->cmd.sleep->us);
#endif
jtag_sleep(cmd->cmd.sleep->us);
break;
default:
ERROR("BUG: unknown JTAG command type encountered");
LOG_ERROR("BUG: unknown JTAG command type encountered");
exit(-1);
}
cmd = cmd->next;

34
src/jtag/bitq.c
View File

@ -90,7 +90,7 @@ void bitq_in_proc(void)
}
/* if necessary, allocate buffer and check for malloc error */
if (bitq_in_buffer==NULL && (bitq_in_buffer=malloc(bitq_in_bufsize))==NULL) {
ERROR("malloc error");
LOG_ERROR("malloc error");
exit(-1);
}
in_buff=(void *)bitq_in_buffer;
@ -101,7 +101,7 @@ void bitq_in_proc(void)
while (bitq_in_state.bit_pos<field->num_bits) {
if ((tdo=bitq_interface->in())<0) {
#ifdef _DEBUG_JTAG_IO_
DEBUG("bitq in EOF");
LOG_DEBUG("bitq in EOF");
#endif
return;
}
@ -146,7 +146,7 @@ void bitq_end_state(enum tap_state state)
{
if (state==-1) return;
if (tap_move_map[state]==-1) {
ERROR("BUG: %i is not a valid end state", state);
LOG_ERROR("BUG: %i is not a valid end state", state);
exit(-1);
}
end_state = state;
@ -159,7 +159,7 @@ void bitq_state_move(enum tap_state new_state)
u8 tms_scan;
if (tap_move_map[cur_state]==-1 || tap_move_map[new_state]==-1) {
ERROR("TAP move from or to unstable state");
LOG_ERROR("TAP move from or to unstable state");
exit(-1);
}
@ -182,7 +182,7 @@ void bitq_path_move(pathmove_command_t *cmd)
if (tap_transitions[cur_state].low == cmd->path[i]) bitq_io(0, 0, 0);
else if (tap_transitions[cur_state].high == cmd->path[i]) bitq_io(1, 0, 0);
else {
ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_strings[cur_state], tap_state_strings[cmd->path[i]]);
LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_strings[cur_state], tap_state_strings[cmd->path[i]]);
exit(-1);
}
@ -277,14 +277,14 @@ int bitq_execute_queue(void)
case JTAG_END_STATE:
#ifdef _DEBUG_JTAG_IO_
DEBUG("end_state: %i", cmd->cmd.end_state->end_state);
LOG_DEBUG("end_state: %i", cmd->cmd.end_state->end_state);
#endif
bitq_end_state(cmd->cmd.end_state->end_state);
break;
case JTAG_RESET:
#ifdef _DEBUG_JTAG_IO_
DEBUG("reset trst: %i srst %i", cmd->cmd.reset->trst, cmd->cmd.reset->srst);
LOG_DEBUG("reset trst: %i srst %i", cmd->cmd.reset->trst, cmd->cmd.reset->srst);
#endif
bitq_interface->reset(cmd->cmd.reset->trst, cmd->cmd.reset->srst);
if (bitq_interface->in_rdy()) bitq_in_proc();
@ -292,7 +292,7 @@ int bitq_execute_queue(void)
case JTAG_RUNTEST:
#ifdef _DEBUG_JTAG_IO_
DEBUG("runtest %i cycles, end in %i", cmd->cmd.runtest->num_cycles, cmd->cmd.runtest->end_state);
LOG_DEBUG("runtest %i cycles, end in %i", cmd->cmd.runtest->num_cycles, cmd->cmd.runtest->end_state);
#endif
bitq_end_state(cmd->cmd.runtest->end_state);
bitq_runtest(cmd->cmd.runtest->num_cycles);
@ -300,7 +300,7 @@ int bitq_execute_queue(void)
case JTAG_STATEMOVE:
#ifdef _DEBUG_JTAG_IO_
DEBUG("statemove end in %i", cmd->cmd.statemove->end_state);
LOG_DEBUG("statemove end in %i", cmd->cmd.statemove->end_state);
#endif
bitq_end_state(cmd->cmd.statemove->end_state);
bitq_state_move(end_state); /* uncoditional TAP move */
@ -308,16 +308,16 @@ int bitq_execute_queue(void)
case JTAG_PATHMOVE:
#ifdef _DEBUG_JTAG_IO_
DEBUG("pathmove: %i states, end in %i", cmd->cmd.pathmove->num_states, cmd->cmd.pathmove->path[cmd->cmd.pathmove->num_states - 1]);
LOG_DEBUG("pathmove: %i states, end in %i", cmd->cmd.pathmove->num_states, cmd->cmd.pathmove->path[cmd->cmd.pathmove->num_states - 1]);
#endif
bitq_path_move(cmd->cmd.pathmove);
break;
case JTAG_SCAN:
#ifdef _DEBUG_JTAG_IO_
DEBUG("scan end in %i", cmd->cmd.scan->end_state);
if (cmd->cmd.scan->ir_scan) DEBUG("scan ir");
else DEBUG("scan dr");
LOG_DEBUG("scan end in %i", cmd->cmd.scan->end_state);
if (cmd->cmd.scan->ir_scan) LOG_DEBUG("scan ir");
else LOG_DEBUG("scan dr");
#endif
bitq_end_state(cmd->cmd.scan->end_state);
bitq_scan(cmd->cmd.scan);
@ -326,14 +326,14 @@ int bitq_execute_queue(void)
case JTAG_SLEEP:
#ifdef _DEBUG_JTAG_IO_
DEBUG("sleep %i", cmd->cmd.sleep->us);
LOG_DEBUG("sleep %i", cmd->cmd.sleep->us);
#endif
bitq_interface->sleep(cmd->cmd.sleep->us);
if (bitq_interface->in_rdy()) bitq_in_proc();
break;
default:
ERROR("BUG: unknown JTAG command type encountered");
LOG_ERROR("BUG: unknown JTAG command type encountered");
exit(-1);
}
@ -344,11 +344,11 @@ int bitq_execute_queue(void)
bitq_in_proc();
if (bitq_in_state.cmd) {
ERROR("missing data from bitq interface");
LOG_ERROR("missing data from bitq interface");
return ERROR_JTAG_QUEUE_FAILED;
}
if (bitq_interface->in()>=0) {
ERROR("extra data from bitq interface");
LOG_ERROR("extra data from bitq interface");
return ERROR_JTAG_QUEUE_FAILED;
}

4
src/jtag/ep93xx.c
View File

@ -209,8 +209,8 @@ int ep93xx_init(void)
gpio_data_register = gpio_controller + 0x08;
gpio_data_direction_register = gpio_controller + 0x18;
INFO("gpio_data_register = %p\n", gpio_data_register);
INFO("gpio_data_direction_reg = %p\n", gpio_data_direction_register);
LOG_INFO("gpio_data_register = %p\n", gpio_data_register);
LOG_INFO("gpio_data_direction_reg = %p\n", gpio_data_direction_register);
/*
* Configure bit 0 (TDO) as an input, and bits 1-5 (TDI, TCK
* TMS, TRST, SRST) as outputs. Drive TDI and TCK low, and

267
src/jtag/ft2232.c
View File

@ -23,7 +23,6 @@
#if IS_CYGWIN == 1
#include "windows.h"
#undef ERROR
#endif
#include "replacements.h"
@ -174,7 +173,7 @@ int ft2232_write(u8 *buf, int size, u32* bytes_written)
if ((status = FT_Write(ftdih, buf, size, &dw_bytes_written)) != FT_OK)
{
*bytes_written = dw_bytes_written;
ERROR("FT_Write returned: %lu", status);
LOG_ERROR("FT_Write returned: %lu", status);
return ERROR_JTAG_DEVICE_ERROR;
}
else
@ -187,7 +186,7 @@ int ft2232_write(u8 *buf, int size, u32* bytes_written)
if ((retval = ftdi_write_data(&ftdic, buf, size)) < 0)
{
*bytes_written = 0;
ERROR("ftdi_write_data: %s", ftdi_get_error_string(&ftdic));
LOG_ERROR("ftdi_write_data: %s", ftdi_get_error_string(&ftdic));
return ERROR_JTAG_DEVICE_ERROR;
}
else
@ -212,7 +211,7 @@ int ft2232_read(u8* buf, int size, u32* bytes_read)
*bytes_read, &dw_bytes_read)) != FT_OK)
{
*bytes_read = 0;
ERROR("FT_Read returned: %lu", status);
LOG_ERROR("FT_Read returned: %lu", status);
return ERROR_JTAG_DEVICE_ERROR;
}
*bytes_read += dw_bytes_read;
@ -227,7 +226,7 @@ int ft2232_read(u8* buf, int size, u32* bytes_read)
if ((retval = ftdi_read_data(&ftdic, buf + *bytes_read, size - *bytes_read)) < 0)
{
*bytes_read = 0;
ERROR("ftdi_read_data: %s", ftdi_get_error_string(&ftdic));
LOG_ERROR("ftdi_read_data: %s", ftdi_get_error_string(&ftdic));
return ERROR_JTAG_DEVICE_ERROR;
}
*bytes_read += retval;
@ -236,7 +235,7 @@ int ft2232_read(u8* buf, int size, u32* bytes_read)
if (*bytes_read < size)
{
ERROR("couldn't read the requested number of bytes from FT2232 device (%i < %i)", *bytes_read, size);
LOG_ERROR("couldn't read the requested number of bytes from FT2232 device (%i < %i)", *bytes_read, size);
return ERROR_JTAG_DEVICE_ERROR;
}
@ -253,10 +252,10 @@ int ft2232_speed(int speed)
buf[1] = speed & 0xff; /* valueL (0=6MHz, 1=3MHz, 2=2.0MHz, ...*/
buf[2] = (speed >> 8) & 0xff; /* valueH */
DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]);
LOG_DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]);
if (((retval = ft2232_write(buf, 3, &bytes_written)) != ERROR_OK) || (bytes_written != 3))
{
ERROR("couldn't set FT2232 TCK speed");
LOG_ERROR("couldn't set FT2232 TCK speed");
return retval;
}
@ -286,7 +285,7 @@ void ft2232_end_state(enum tap_state state)
end_state = state;
else
{
ERROR("BUG: %i is not a valid end state", state);
LOG_ERROR("BUG: %i is not a valid end state", state);
exit(-1);
}
}
@ -326,13 +325,13 @@ void ft2232_debug_dump_buffer(void)
line_p += snprintf(line_p, 256 - (line_p - line), "%2.2x ", ft2232_buffer[i]);
if (i % 16 == 15)
{
DEBUG("%s", line);
LOG_DEBUG("%s", line);
line_p = line;
}
}
if (line_p != line)
DEBUG("%s", line);
LOG_DEBUG("%s", line);
}
int ft2232_send_and_recv(jtag_command_t *first, jtag_command_t *last)
@ -351,7 +350,7 @@ int ft2232_send_and_recv(jtag_command_t *first, jtag_command_t *last)
#endif
#ifdef _DEBUG_USB_COMMS_
DEBUG("write buffer (size %i):", ft2232_buffer_size);
LOG_DEBUG("write buffer (size %i):", ft2232_buffer_size);
ft2232_debug_dump_buffer();
#endif
@ -361,7 +360,7 @@ int ft2232_send_and_recv(jtag_command_t *first, jtag_command_t *last)
if ((retval = ft2232_write(ft2232_buffer, ft2232_buffer_size, &bytes_written)) != ERROR_OK)
{
ERROR("couldn't write MPSSE commands to FT2232");
LOG_ERROR("couldn't write MPSSE commands to FT2232");
exit(-1);
}
@ -380,7 +379,7 @@ int ft2232_send_and_recv(jtag_command_t *first, jtag_command_t *last)
if ((retval = ft2232_read(ft2232_buffer, ft2232_expect_read, &bytes_read)) != ERROR_OK)
{
ERROR("couldn't read from FT2232");
LOG_ERROR("couldn't read from FT2232");
exit(-1);
}
@ -391,7 +390,7 @@ int ft2232_send_and_recv(jtag_command_t *first, jtag_command_t *last)
timeval_subtract(&d_inter2, &inter2, &start);
timeval_subtract(&d_end, &end, &start);
INFO("inter: %i.%i, inter2: %i.%i end: %i.%i", d_inter.tv_sec, d_inter.tv_usec, d_inter2.tv_sec, d_inter2.tv_usec, d_end.tv_sec, d_end.tv_usec);
LOG_INFO("inter: %i.%i, inter2: %i.%i end: %i.%i", d_inter.tv_sec, d_inter.tv_usec, d_inter2.tv_sec, d_inter2.tv_usec, d_end.tv_sec, d_end.tv_usec);
#endif
@ -399,14 +398,14 @@ int ft2232_send_and_recv(jtag_command_t *first, jtag_command_t *last)
if (ft2232_expect_read != ft2232_buffer_size)
{
ERROR("ft2232_expect_read (%i) != ft2232_buffer_size (%i) (%i retries)", ft2232_expect_read, ft2232_buffer_size, 100 - timeout);
LOG_ERROR("ft2232_expect_read (%i) != ft2232_buffer_size (%i) (%i retries)", ft2232_expect_read, ft2232_buffer_size, 100 - timeout);
ft2232_debug_dump_buffer();
exit(-1);
}
#ifdef _DEBUG_USB_COMMS_
DEBUG("read buffer (%i retries): %i bytes", 100 - timeout, ft2232_buffer_size);
LOG_DEBUG("read buffer (%i retries): %i bytes", 100 - timeout, ft2232_buffer_size);
ft2232_debug_dump_buffer();
#endif
}
@ -474,7 +473,7 @@ void ft2232_add_pathmove(pathmove_command_t *cmd)
buf_set_u32(&tms_byte, bit_count++, 1, 0x1);
else
{
ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_strings[cur_state], tap_state_strings[cmd->path[state_count]]);
LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_strings[cur_state], tap_state_strings[cmd->path[state_count]]);
exit(-1);
}
@ -513,7 +512,7 @@ void ft2232_add_scan(int ir_scan, enum scan_type type, u8 *buffer, int scan_size
BUFFER_ADD = TAP_MOVE(cur_state, TAP_SD);
cur_state = TAP_SD;
}
/* DEBUG("added TMS scan (no read)"); */
/* LOG_DEBUG("added TMS scan (no read)"); */
}
/* add command for complete bytes */
@ -524,19 +523,19 @@ void ft2232_add_scan(int ir_scan, enum scan_type type, u8 *buffer, int scan_size
{
/* Clock Data Bytes In and Out LSB First */
BUFFER_ADD = 0x39;
/* DEBUG("added TDI bytes (io %i)", num_bytes); */
/* LOG_DEBUG("added TDI bytes (io %i)", num_bytes); */
}
else if (type == SCAN_OUT)
{
/* Clock Data Bytes Out on -ve Clock Edge LSB First (no Read) */
BUFFER_ADD = 0x19;
/* DEBUG("added TDI bytes (o)"); */
/* LOG_DEBUG("added TDI bytes (o)"); */
}
else if (type == SCAN_IN)
{
/* Clock Data Bytes In on +ve Clock Edge LSB First (no Write) */
BUFFER_ADD = 0x28;
/* DEBUG("added TDI bytes (i %i)", num_bytes); */
/* LOG_DEBUG("added TDI bytes (i %i)", num_bytes); */
}
thisrun_bytes = (num_bytes > 65537) ? 65536 : (num_bytes - 1);
num_bytes -= thisrun_bytes;
@ -571,19 +570,19 @@ void ft2232_add_scan(int ir_scan, enum scan_type type, u8 *buffer, int scan_size
{
/* Clock Data Bits In and Out LSB First */
BUFFER_ADD = 0x3b;
/* DEBUG("added TDI bits (io) %i", bits_left - 1); */
/* LOG_DEBUG("added TDI bits (io) %i", bits_left - 1); */
}
else if (type == SCAN_OUT)
{
/* Clock Data Bits Out on -ve Clock Edge LSB First (no Read) */
BUFFER_ADD = 0x1b;
/* DEBUG("added TDI bits (o)"); */
/* LOG_DEBUG("added TDI bits (o)"); */
}
else if (type == SCAN_IN)
{
/* Clock Data Bits In on +ve Clock Edge LSB First (no Write) */
BUFFER_ADD = 0x2a;
/* DEBUG("added TDI bits (i %i)", bits_left - 1); */
/* LOG_DEBUG("added TDI bits (i %i)", bits_left - 1); */
}
BUFFER_ADD = bits_left - 2;
if (type != SCAN_IN)
@ -597,19 +596,19 @@ void ft2232_add_scan(int ir_scan, enum scan_type type, u8 *buffer, int scan_size
{
/* Clock Data Bits In and Out LSB First */
BUFFER_ADD = 0x3b;
/* DEBUG("added TDI bits (io) %i", bits_left - 1); */
/* LOG_DEBUG("added TDI bits (io) %i", bits_left - 1); */
}
else if (type == SCAN_OUT)
{
/* Clock Data Bits Out on -ve Clock Edge LSB First (no Read) */
BUFFER_ADD = 0x1b;
/* DEBUG("added TDI bits (o)"); */
/* LOG_DEBUG("added TDI bits (o)"); */
}
else if (type == SCAN_IN)
{
/* Clock Data Bits In on +ve Clock Edge LSB First (no Write) */
BUFFER_ADD = 0x2a;
/* DEBUG("added TDI bits (i %i)", bits_left - 1); */
/* LOG_DEBUG("added TDI bits (i %i)", bits_left - 1); */
}
BUFFER_ADD = 0x0;
BUFFER_ADD = last_bit;
@ -621,13 +620,13 @@ void ft2232_add_scan(int ir_scan, enum scan_type type, u8 *buffer, int scan_size
{
/* Clock Data to TMS/CS Pin with Read */
BUFFER_ADD = 0x6b;
/* DEBUG("added TMS scan (read)"); */
/* LOG_DEBUG("added TMS scan (read)"); */
}
else
{
/* Clock Data to TMS/CS Pin (no Read) */
BUFFER_ADD = 0x4b;
/* DEBUG("added TMS scan (no read)"); */
/* LOG_DEBUG("added TMS scan (no read)"); */
}
BUFFER_ADD = 0x6;
BUFFER_ADD = TAP_MOVE(cur_state, end_state) | (last_bit << 7);
@ -650,7 +649,7 @@ int ft2232_large_scan(scan_command_t *cmd, enum scan_type type, u8 *buffer, int
if (cmd->ir_scan)
{
ERROR("BUG: large IR scans are not supported");
LOG_ERROR("BUG: large IR scans are not supported");
exit(-1);
}
@ -667,10 +666,10 @@ int ft2232_large_scan(scan_command_t *cmd, enum scan_type type, u8 *buffer, int
if ((retval = ft2232_write(ft2232_buffer, ft2232_buffer_size, &bytes_written)) != ERROR_OK)
{
ERROR("couldn't write MPSSE commands to FT2232");
LOG_ERROR("couldn't write MPSSE commands to FT2232");
exit(-1);
}
DEBUG("ft2232_buffer_size: %i, bytes_written: %i", ft2232_buffer_size, bytes_written);
LOG_DEBUG("ft2232_buffer_size: %i, bytes_written: %i", ft2232_buffer_size, bytes_written);
ft2232_buffer_size = 0;
/* add command for complete bytes */
@ -682,19 +681,19 @@ int ft2232_large_scan(scan_command_t *cmd, enum scan_type type, u8 *buffer, int
{
/* Clock Data Bytes In and Out LSB First */
BUFFER_ADD = 0x39;
/* DEBUG("added TDI bytes (io %i)", num_bytes); */
/* LOG_DEBUG("added TDI bytes (io %i)", num_bytes); */
}
else if (type == SCAN_OUT)
{
/* Clock Data Bytes Out on -ve Clock Edge LSB First (no Read) */
BUFFER_ADD = 0x19;
/* DEBUG("added TDI bytes (o)"); */
/* LOG_DEBUG("added TDI bytes (o)"); */
}
else if (type == SCAN_IN)
{
/* Clock Data Bytes In on +ve Clock Edge LSB First (no Write) */
BUFFER_ADD = 0x28;
/* DEBUG("added TDI bytes (i %i)", num_bytes); */
/* LOG_DEBUG("added TDI bytes (i %i)", num_bytes); */
}
thisrun_bytes = (num_bytes > 65537) ? 65536 : (num_bytes - 1);
thisrun_read = thisrun_bytes;
@ -718,20 +717,20 @@ int ft2232_large_scan(scan_command_t *cmd, enum scan_type type, u8 *buffer, int
if ((retval = ft2232_write(ft2232_buffer, ft2232_buffer_size, &bytes_written)) != ERROR_OK)
{
ERROR("couldn't write MPSSE commands to FT2232");
LOG_ERROR("couldn't write MPSSE commands to FT2232");
exit(-1);
}
DEBUG("ft2232_buffer_size: %i, bytes_written: %i", ft2232_buffer_size, bytes_written);
LOG_DEBUG("ft2232_buffer_size: %i, bytes_written: %i", ft2232_buffer_size, bytes_written);
ft2232_buffer_size = 0;
if (type != SCAN_OUT)
{
if ((retval = ft2232_read(receive_pointer, thisrun_read, &bytes_read)) != ERROR_OK)
{
ERROR("couldn't read from FT2232");
LOG_ERROR("couldn't read from FT2232");
exit(-1);
}
DEBUG("thisrun_read: %i, bytes_read: %i", thisrun_read, bytes_read);
LOG_DEBUG("thisrun_read: %i, bytes_read: %i", thisrun_read, bytes_read);
receive_pointer += bytes_read;
}
}
@ -751,19 +750,19 @@ int ft2232_large_scan(scan_command_t *cmd, enum scan_type type, u8 *buffer, int
{
/* Clock Data Bits In and Out LSB First */
BUFFER_ADD = 0x3b;
/* DEBUG("added TDI bits (io) %i", bits_left - 1); */
/* LOG_DEBUG("added TDI bits (io) %i", bits_left - 1); */
}
else if (type == SCAN_OUT)
{
/* Clock Data Bits Out on -ve Clock Edge LSB First (no Read) */
BUFFER_ADD = 0x1b;
/* DEBUG("added TDI bits (o)"); */
/* LOG_DEBUG("added TDI bits (o)"); */
}
else if (type == SCAN_IN)
{
/* Clock Data Bits In on +ve Clock Edge LSB First (no Write) */
BUFFER_ADD = 0x2a;
/* DEBUG("added TDI bits (i %i)", bits_left - 1); */
/* LOG_DEBUG("added TDI bits (i %i)", bits_left - 1); */
}
BUFFER_ADD = bits_left - 2;
if (type != SCAN_IN)
@ -779,19 +778,19 @@ int ft2232_large_scan(scan_command_t *cmd, enum scan_type type, u8 *buffer, int
{
/* Clock Data Bits In and Out LSB First */
BUFFER_ADD = 0x3b;
/* DEBUG("added TDI bits (io) %i", bits_left - 1); */
/* LOG_DEBUG("added TDI bits (io) %i", bits_left - 1); */
}
else if (type == SCAN_OUT)
{
/* Clock Data Bits Out on -ve Clock Edge LSB First (no Read) */
BUFFER_ADD = 0x1b;
/* DEBUG("added TDI bits (o)"); */
/* LOG_DEBUG("added TDI bits (o)"); */
}
else if (type == SCAN_IN)
{
/* Clock Data Bits In on +ve Clock Edge LSB First (no Write) */
BUFFER_ADD = 0x2a;
/* DEBUG("added TDI bits (i %i)", bits_left - 1); */
/* LOG_DEBUG("added TDI bits (i %i)", bits_left - 1); */
}
BUFFER_ADD = 0x0;
BUFFER_ADD = last_bit;
@ -803,13 +802,13 @@ int ft2232_large_scan(scan_command_t *cmd, enum scan_type type, u8 *buffer, int
{
/* Clock Data to TMS/CS Pin with Read */
BUFFER_ADD = 0x6b;
/* DEBUG("added TMS scan (read)"); */
/* LOG_DEBUG("added TMS scan (read)"); */
}
else
{
/* Clock Data to TMS/CS Pin (no Read) */
BUFFER_ADD = 0x4b;
/* DEBUG("added TMS scan (no read)"); */
/* LOG_DEBUG("added TMS scan (no read)"); */
}
BUFFER_ADD = 0x6;
BUFFER_ADD = TAP_MOVE(cur_state, end_state) | (last_bit << 7);
@ -821,20 +820,20 @@ int ft2232_large_scan(scan_command_t *cmd, enum scan_type type, u8 *buffer, int
if ((retval = ft2232_write(ft2232_buffer, ft2232_buffer_size, &bytes_written)) != ERROR_OK)
{
ERROR("couldn't write MPSSE commands to FT2232");
LOG_ERROR("couldn't write MPSSE commands to FT2232");
exit(-1);
}
DEBUG("ft2232_buffer_size: %i, bytes_written: %i", ft2232_buffer_size, bytes_written);
LOG_DEBUG("ft2232_buffer_size: %i, bytes_written: %i", ft2232_buffer_size, bytes_written);
ft2232_buffer_size = 0;
if (type != SCAN_OUT)
{
if ((retval = ft2232_read(receive_pointer, thisrun_read, &bytes_read)) != ERROR_OK)
{
ERROR("couldn't read from FT2232");
LOG_ERROR("couldn't read from FT2232");
exit(-1);
}
DEBUG("thisrun_read: %i, bytes_read: %i", thisrun_read, bytes_read);
LOG_DEBUG("thisrun_read: %i, bytes_read: %i", thisrun_read, bytes_read);
receive_pointer += bytes_read;
}
@ -881,7 +880,7 @@ int ft2232_predict_scan_in(int scan_size, enum scan_type type)
predicted_size += 1;
}
/* DEBUG("scan_size: %i, predicted_size: %i", scan_size, predicted_size); */
/* LOG_DEBUG("scan_size: %i, predicted_size: %i", scan_size, predicted_size); */
return predicted_size;
}
@ -963,7 +962,7 @@ void jtagkey_reset(int trst, int srst)
BUFFER_ADD = 0x82;
BUFFER_ADD = high_output;
BUFFER_ADD = high_direction;
DEBUG("trst: %i, srst: %i, high_output: 0x%2.2x, high_direction: 0x%2.2x", trst, srst, high_output, high_direction);
LOG_DEBUG("trst: %i, srst: %i, high_output: 0x%2.2x, high_direction: 0x%2.2x", trst, srst, high_output, high_direction);
}
void olimex_jtag_reset(int trst, int srst)
@ -997,7 +996,7 @@ void olimex_jtag_reset(int trst, int srst)
BUFFER_ADD = 0x82;
BUFFER_ADD = high_output;
BUFFER_ADD = high_direction;
DEBUG("trst: %i, srst: %i, high_output: 0x%2.2x, high_direction: 0x%2.2x", trst, srst, high_output, high_direction);
LOG_DEBUG("trst: %i, srst: %i, high_output: 0x%2.2x, high_direction: 0x%2.2x", trst, srst, high_output, high_direction);
}
void flyswatter_reset(int trst, int srst)
@ -1025,7 +1024,7 @@ void flyswatter_reset(int trst, int srst)
BUFFER_ADD = 0x80;
BUFFER_ADD = low_output;
BUFFER_ADD = low_direction;
DEBUG("trst: %i, srst: %i, low_output: 0x%2.2x, low_direction: 0x%2.2x", trst, srst, low_output, low_direction);
LOG_DEBUG("trst: %i, srst: %i, low_output: 0x%2.2x, low_direction: 0x%2.2x", trst, srst, low_output, low_direction);
}
void turtle_reset(int trst, int srst)
@ -1045,7 +1044,7 @@ void turtle_reset(int trst, int srst)
BUFFER_ADD = 0x80;
BUFFER_ADD = low_output;
BUFFER_ADD = low_direction;
DEBUG("srst: %i, low_output: 0x%2.2x, low_direction: 0x%2.2x", srst, low_output, low_direction);
LOG_DEBUG("srst: %i, low_output: 0x%2.2x, low_direction: 0x%2.2x", srst, low_output, low_direction);
}
void comstick_reset(int trst, int srst)
@ -1073,7 +1072,7 @@ void comstick_reset(int trst, int srst)
BUFFER_ADD = 0x82;
BUFFER_ADD = high_output;
BUFFER_ADD = high_direction;
DEBUG("trst: %i, srst: %i, high_output: 0x%2.2x, high_direction: 0x%2.2x", trst, srst, high_output, high_direction);
LOG_DEBUG("trst: %i, srst: %i, high_output: 0x%2.2x, high_direction: 0x%2.2x", trst, srst, high_output, high_direction);
}
void stm32stick_reset(int trst, int srst)
@ -1106,7 +1105,7 @@ void stm32stick_reset(int trst, int srst)
BUFFER_ADD = 0x82;
BUFFER_ADD = high_output;
BUFFER_ADD = high_direction;
DEBUG("trst: %i, srst: %i, high_output: 0x%2.2x, high_direction: 0x%2.2x", trst, srst, high_output, high_direction);
LOG_DEBUG("trst: %i, srst: %i, high_output: 0x%2.2x, high_direction: 0x%2.2x", trst, srst, high_output, high_direction);
}
int ft2232_execute_queue()
@ -1156,7 +1155,7 @@ int ft2232_execute_queue()
require_send = 1;
#ifdef _DEBUG_JTAG_IO_
DEBUG("trst: %i, srst: %i", cmd->cmd.reset->trst, cmd->cmd.reset->srst);
LOG_DEBUG("trst: %i, srst: %i", cmd->cmd.reset->trst, cmd->cmd.reset->srst);
#endif
break;
case JTAG_RUNTEST:
@ -1198,7 +1197,7 @@ int ft2232_execute_queue()
BUFFER_ADD = 0x0;
cur_state = TAP_RTI;
i -= (i > 7) ? 7 : i;
/* DEBUG("added TMS scan (no read)"); */
/* LOG_DEBUG("added TMS scan (no read)"); */
}
if (cmd->cmd.runtest->end_state != -1)
ft2232_end_state(cmd->cmd.runtest->end_state);
@ -1211,11 +1210,11 @@ int ft2232_execute_queue()
/* TMS data bits */
BUFFER_ADD = TAP_MOVE(cur_state, end_state);
cur_state = end_state;
/* DEBUG("added TMS scan (no read)"); */
/* LOG_DEBUG("added TMS scan (no read)"); */
}
require_send = 1;
#ifdef _DEBUG_JTAG_IO_
DEBUG("runtest: %i, end in %i", cmd->cmd.runtest->num_cycles, end_state);
LOG_DEBUG("runtest: %i, end in %i", cmd->cmd.runtest->num_cycles, end_state);
#endif
break;
case JTAG_STATEMOVE:
@ -1236,11 +1235,11 @@ int ft2232_execute_queue()
BUFFER_ADD = 0x6;
/* TMS data bits */
BUFFER_ADD = TAP_MOVE(cur_state, end_state);
/* DEBUG("added TMS scan (no read)"); */
/* LOG_DEBUG("added TMS scan (no read)"); */
cur_state = end_state;
require_send = 1;
#ifdef _DEBUG_JTAG_IO_
DEBUG("statemove: %i", end_state);
LOG_DEBUG("statemove: %i", end_state);
#endif
break;
case JTAG_PATHMOVE:
@ -1256,7 +1255,7 @@ int ft2232_execute_queue()
ft2232_add_pathmove(cmd->cmd.pathmove);
require_send = 1;
#ifdef _DEBUG_JTAG_IO_
DEBUG("pathmove: %i states, end in %i", cmd->cmd.pathmove->num_states, cmd->cmd.pathmove->path[cmd->cmd.pathmove->num_states - 1]);
LOG_DEBUG("pathmove: %i states, end in %i", cmd->cmd.pathmove->num_states, cmd->cmd.pathmove->path[cmd->cmd.pathmove->num_states - 1]);
#endif
break;
case JTAG_SCAN:
@ -1265,7 +1264,7 @@ int ft2232_execute_queue()
predicted_size = ft2232_predict_scan_out(scan_size, type);
if ((predicted_size + 1) > FT2232_BUFFER_SIZE)
{
DEBUG("oversized ft2232 scan (predicted_size > FT2232_BUFFER_SIZE)");
LOG_DEBUG("oversized ft2232 scan (predicted_size > FT2232_BUFFER_SIZE)");
/* unsent commands before this */
if (first_unsent != cmd)
if (ft2232_send_and_recv(first_unsent, cmd) != ERROR_OK)
@ -1283,14 +1282,14 @@ int ft2232_execute_queue()
}
else if (ft2232_buffer_size + predicted_size + 1 > FT2232_BUFFER_SIZE)
{
DEBUG("ft2232 buffer size reached, sending queued commands (first_unsent: %p, cmd: %p)", first_unsent, cmd);
LOG_DEBUG("ft2232 buffer size reached, sending queued commands (first_unsent: %p, cmd: %p)", first_unsent, cmd);
if (ft2232_send_and_recv(first_unsent, cmd) != ERROR_OK)
retval = ERROR_JTAG_QUEUE_FAILED;
require_send = 0;
first_unsent = cmd;
}
ft2232_expect_read += ft2232_predict_scan_in(scan_size, type);
/* DEBUG("new read size: %i", ft2232_expect_read); */
/* LOG_DEBUG("new read size: %i", ft2232_expect_read); */
if (cmd->cmd.scan->end_state != -1)
ft2232_end_state(cmd->cmd.scan->end_state);
ft2232_add_scan(cmd->cmd.scan->ir_scan, type, buffer, scan_size);
@ -1298,7 +1297,7 @@ int ft2232_execute_queue()
if (buffer)
free(buffer);
#ifdef _DEBUG_JTAG_IO_
DEBUG("%s scan, %i bit, end in %i", (cmd->cmd.scan->ir_scan) ? "IR" : "DR", scan_size, end_state);
LOG_DEBUG("%s scan, %i bit, end in %i", (cmd->cmd.scan->ir_scan) ? "IR" : "DR", scan_size, end_state);
#endif
break;
case JTAG_SLEEP:
@ -1307,11 +1306,11 @@ int ft2232_execute_queue()
first_unsent = cmd->next;
jtag_sleep(cmd->cmd.sleep->us);
#ifdef _DEBUG_JTAG_IO_
DEBUG("sleep %i usec", cmd->cmd.sleep->us);
LOG_DEBUG("sleep %i usec", cmd->cmd.sleep->us);
#endif
break;
default:
ERROR("BUG: unknown JTAG command type encountered");
LOG_ERROR("BUG: unknown JTAG command type encountered");
exit(-1);
}
cmd = cmd->next;
@ -1332,21 +1331,21 @@ static int ft2232_init_ftd2xx(u16 vid, u16 pid, int more, int *try_more)
char *openex_string = NULL;
u8 latency_timer;
DEBUG("'ft2232' interface using FTD2XX with '%s' layout (%4.4x:%4.4x)",
LOG_DEBUG("'ft2232' interface using FTD2XX with '%s' layout (%4.4x:%4.4x)",
ft2232_layout, vid, pid);
#if IS_WIN32 == 0
/* Add non-standard Vid/Pid to the linux driver */
if ((status = FT_SetVIDPID(vid, pid)) != FT_OK)
{
WARNING("couldn't add %4.4x:%4.4x",
LOG_WARNING("couldn't add %4.4x:%4.4x",
vid, pid);
}
#endif
if (ft2232_device_desc && ft2232_serial)
{
WARNING("can't open by device description and serial number, giving precedence to serial");
LOG_WARNING("can't open by device description and serial number, giving precedence to serial");
ft2232_device_desc = NULL;
}
@ -1362,8 +1361,8 @@ static int ft2232_init_ftd2xx(u16 vid, u16 pid, int more, int *try_more)
}
else
{
ERROR("neither device description nor serial number specified");
ERROR("please add \"ft2232_device_desc <string>\" or \"ft2232_serial <string>\" to your .cfg file");
LOG_ERROR("neither device description nor serial number specified");
LOG_ERROR("please add \"ft2232_device_desc <string>\" or \"ft2232_serial <string>\" to your .cfg file");
return ERROR_JTAG_INIT_FAILED;
}
@ -1373,12 +1372,12 @@ static int ft2232_init_ftd2xx(u16 vid, u16 pid, int more, int *try_more)
DWORD num_devices;
if (more) {
WARNING("unable to open ftdi device (trying more): %lu",
LOG_WARNING("unable to open ftdi device (trying more): %lu",
status);
*try_more = 1;
return ERROR_JTAG_INIT_FAILED;
}
ERROR("unable to open ftdi device: %lu", status);
LOG_ERROR("unable to open ftdi device: %lu", status);
status = FT_ListDevices(&num_devices, NULL, FT_LIST_NUMBER_ONLY);
if (status == FT_OK)
{
@ -1393,9 +1392,9 @@ static int ft2232_init_ftd2xx(u16 vid, u16 pid, int more, int *try_more)
if (status == FT_OK)
{
ERROR("ListDevices: %lu\n", num_devices);
LOG_ERROR("ListDevices: %lu\n", num_devices);
for (i = 0; i < num_devices; i++)
ERROR("%i: %s", i, desc_array[i]);
LOG_ERROR("%i: %s", i, desc_array[i]);
}
for (i = 0; i < num_devices; i++)
@ -1404,36 +1403,36 @@ static int ft2232_init_ftd2xx(u16 vid, u16 pid, int more, int *try_more)
}
else
{
ERROR("ListDevices: NONE\n");
LOG_ERROR("ListDevices: NONE\n");
}
return ERROR_JTAG_INIT_FAILED;
}
if ((status = FT_SetLatencyTimer(ftdih, ft2232_latency)) != FT_OK)
{
ERROR("unable to set latency timer: %lu", status);
LOG_ERROR("unable to set latency timer: %lu", status);
return ERROR_JTAG_INIT_FAILED;
}
if ((status = FT_GetLatencyTimer(ftdih, &latency_timer)) != FT_OK)
{
ERROR("unable to get latency timer: %lu", status);
LOG_ERROR("unable to get latency timer: %lu", status);
return ERROR_JTAG_INIT_FAILED;
}
else
{
DEBUG("current latency timer: %i", latency_timer);
LOG_DEBUG("current latency timer: %i", latency_timer);
}
if ((status = FT_SetTimeouts(ftdih, 5000, 5000)) != FT_OK)
{
ERROR("unable to set timeouts: %lu", status);
LOG_ERROR("unable to set timeouts: %lu", status);
return ERROR_JTAG_INIT_FAILED;
}
if ((status = FT_SetBitMode(ftdih, 0x0b, 2)) != FT_OK)
{
ERROR("unable to enable bit i/o mode: %lu", status);
LOG_ERROR("unable to enable bit i/o mode: %lu", status);
return ERROR_JTAG_INIT_FAILED;
}
@ -1446,7 +1445,7 @@ static int ft2232_purge_ftd2xx(void)
if ((status = FT_Purge(ftdih, FT_PURGE_RX | FT_PURGE_TX)) != FT_OK)
{
ERROR("error purging ftd2xx device: %lu", status);
LOG_ERROR("error purging ftd2xx device: %lu", status);
return ERROR_JTAG_INIT_FAILED;
}
@ -1459,7 +1458,7 @@ static int ft2232_init_libftdi(u16 vid, u16 pid, int more, int *try_more)
{
u8 latency_timer;
DEBUG("'ft2232' interface using libftdi with '%s' layout (%4.4x:%4.4x)",
LOG_DEBUG("'ft2232' interface using libftdi with '%s' layout (%4.4x:%4.4x)",
ft2232_layout, vid, pid);
if (ftdi_init(&ftdic) < 0)
@ -1469,40 +1468,40 @@ static int ft2232_init_libftdi(u16 vid, u16 pid, int more, int *try_more)
if (ftdi_usb_open_desc(&ftdic, vid, pid, ft2232_device_desc,
ft2232_serial) < 0) {
if (more)
WARNING("unable to open ftdi device (trying more): %s",
LOG_WARNING("unable to open ftdi device (trying more): %s",
ftdic.error_str);
else
ERROR("unable to open ftdi device: %s", ftdic.error_str);
LOG_ERROR("unable to open ftdi device: %s", ftdic.error_str);
*try_more = 1;
return ERROR_JTAG_INIT_FAILED;
}
if (ftdi_set_interface(&ftdic, INTERFACE_A) < 0)
{
ERROR("unable to select FT2232 channel A: %s", ftdic.error_str);
LOG_ERROR("unable to select FT2232 channel A: %s", ftdic.error_str);
return ERROR_JTAG_INIT_FAILED;
}
if (ftdi_usb_reset(&ftdic) < 0)
{
ERROR("unable to reset ftdi device");
LOG_ERROR("unable to reset ftdi device");
return ERROR_JTAG_INIT_FAILED;
}
if (ftdi_set_latency_timer(&ftdic, ft2232_latency) < 0)
{
ERROR("unable to set latency timer");
LOG_ERROR("unable to set latency timer");
return ERROR_JTAG_INIT_FAILED;
}
if (ftdi_get_latency_timer(&ftdic, &latency_timer) < 0)
{
ERROR("unable to get latency timer");
LOG_ERROR("unable to get latency timer");
return ERROR_JTAG_INIT_FAILED;
}
else
{
DEBUG("current latency timer: %i", latency_timer);
LOG_DEBUG("current latency timer: %i", latency_timer);
}
ftdi_set_bitmode(&ftdic, 0x0b, 2); /* ctx, JTAG I/O mask */
@ -1514,7 +1513,7 @@ static int ft2232_purge_libftdi(void)
{
if (ftdi_usb_purge_buffers(&ftdic) < 0)
{
ERROR("ftdi_purge_buffers: %s", ftdic.error_str);
LOG_ERROR("ftdi_purge_buffers: %s", ftdic.error_str);
return ERROR_JTAG_INIT_FAILED;
}
@ -1533,7 +1532,7 @@ int ft2232_init(void)
if ((ft2232_layout == NULL) || (ft2232_layout[0] == 0))
{
ft2232_layout = "usbjtag";
WARNING("No ft2232 layout specified, using default 'usbjtag'");
LOG_WARNING("No ft2232 layout specified, using default 'usbjtag'");
}
while (cur_layout->name)
@ -1548,7 +1547,7 @@ int ft2232_init(void)
if (!layout)
{
ERROR("No matching layout found for %s", ft2232_layout);
LOG_ERROR("No matching layout found for %s", ft2232_layout);
return ERROR_JTAG_INIT_FAILED;
}
@ -1589,7 +1588,7 @@ int ft2232_init(void)
buf[0] = 0x85; /* Disconnect TDI/DO to TDO/DI for Loopback */
if (((retval = ft2232_write(buf, 1, &bytes_written)) != ERROR_OK) || (bytes_written != 1))
{
ERROR("couldn't write to FT2232 to disable loopback");
LOG_ERROR("couldn't write to FT2232 to disable loopback");
return ERROR_JTAG_INIT_FAILED;
}
@ -1635,7 +1634,7 @@ int usbjtag_init(void)
}
else
{
ERROR("BUG: usbjtag_init called for unknown layout '%s'", ft2232_layout);
LOG_ERROR("BUG: usbjtag_init called for unknown layout '%s'", ft2232_layout);
return ERROR_JTAG_INIT_FAILED;
}
@ -1665,11 +1664,11 @@ int usbjtag_init(void)
buf[0] = 0x80; /* command "set data bits low byte" */
buf[1] = low_output; /* value (TMS=1,TCK=0, TDI=0, xRST high) */
buf[2] = low_direction; /* dir (output=1), TCK/TDI/TMS=out, TDO=in */
DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]);
LOG_DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]);
if (((ft2232_write(buf, 3, &bytes_written)) != ERROR_OK) || (bytes_written != 3))
{
ERROR("couldn't initialize FT2232 with 'USBJTAG' layout");
LOG_ERROR("couldn't initialize FT2232 with 'USBJTAG' layout");
return ERROR_JTAG_INIT_FAILED;
}
@ -1688,11 +1687,11 @@ int jtagkey_init(void)
buf[0] = 0x80; /* command "set data bits low byte" */
buf[1] = low_output; /* value (TMS=1,TCK=0, TDI=0, nOE=0) */
buf[2] = low_direction; /* dir (output=1), TCK/TDI/TMS=out, TDO=in, nOE=out */
DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]);
LOG_DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]);
if (((ft2232_write(buf, 3, &bytes_written)) != ERROR_OK) || (bytes_written != 3))
{
ERROR("couldn't initialize FT2232 with 'JTAGkey' layout");
LOG_ERROR("couldn't initialize FT2232 with 'JTAGkey' layout");
return ERROR_JTAG_INIT_FAILED;
}
@ -1713,7 +1712,7 @@ int jtagkey_init(void)
}
else
{
ERROR("BUG: jtagkey_init called for non jtagkey layout");
LOG_ERROR("BUG: jtagkey_init called for non jtagkey layout");
exit(-1);
}
@ -1746,11 +1745,11 @@ int jtagkey_init(void)
buf[0] = 0x82; /* command "set data bits high byte" */
buf[1] = high_output; /* value */
buf[2] = high_direction; /* all outputs (xRST and xRSTnOE) */
DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]);
LOG_DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]);
if (((ft2232_write(buf, 3, &bytes_written)) != ERROR_OK) || (bytes_written != 3))
{
ERROR("couldn't initialize FT2232 with 'JTAGkey' layout");
LOG_ERROR("couldn't initialize FT2232 with 'JTAGkey' layout");
return ERROR_JTAG_INIT_FAILED;
}
@ -1769,11 +1768,11 @@ int olimex_jtag_init(void)
buf[0] = 0x80; /* command "set data bits low byte" */
buf[1] = low_output; /* value (TMS=1,TCK=0, TDI=0, nOE=0) */
buf[2] = low_direction; /* dir (output=1), TCK/TDI/TMS=out, TDO=in, nOE=out */
DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]);
LOG_DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]);
if (((ft2232_write(buf, 3, &bytes_written)) != ERROR_OK) || (bytes_written != 3))
{
ERROR("couldn't initialize FT2232 with 'JTAGkey' layout");
LOG_ERROR("couldn't initialize FT2232 with 'JTAGkey' layout");
return ERROR_JTAG_INIT_FAILED;
}
@ -1798,7 +1797,7 @@ int olimex_jtag_init(void)
if (jtag_reset_config & RESET_SRST_PUSH_PULL)
{
ERROR("can't set nSRST to push-pull on the Olimex ARM-USB-OCD");
LOG_ERROR("can't set nSRST to push-pull on the Olimex ARM-USB-OCD");
}
else
{
@ -1812,11 +1811,11 @@ int olimex_jtag_init(void)
buf[0] = 0x82; /* command "set data bits high byte" */
buf[1] = high_output; /* value */
buf[2] = high_direction; /* all outputs (xRST and xRSTnOE) */
DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]);
LOG_DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]);
if (((ft2232_write(buf, 3, &bytes_written)) != ERROR_OK) || (bytes_written != 3))
{
ERROR("couldn't initialize FT2232 with 'JTAGkey' layout");
LOG_ERROR("couldn't initialize FT2232 with 'JTAGkey' layout");
return ERROR_JTAG_INIT_FAILED;
}
@ -1835,11 +1834,11 @@ int flyswatter_init(void)
buf[0] = 0x80; /* command "set data bits low byte" */
buf[1] = low_output; /* value (TMS=1,TCK=0, TDI=0, nOE=0) */
buf[2] = low_direction; /* dir (output=1), TCK/TDI/TMS=out, TDO=in, nOE[12]=out, n[ST]srst=out */
DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]);
LOG_DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]);
if (((ft2232_write(buf, 3, &bytes_written)) != ERROR_OK) || (bytes_written != 3))
{
ERROR("couldn't initialize FT2232 with 'flyswatter' layout");
LOG_ERROR("couldn't initialize FT2232 with 'flyswatter' layout");
return ERROR_JTAG_INIT_FAILED;
}
@ -1858,11 +1857,11 @@ int flyswatter_init(void)
buf[0] = 0x82; /* command "set data bits high byte" */
buf[1] = high_output; /* value */
buf[2] = high_direction; /* all outputs (xRST and xRSTnOE) */
DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]);
LOG_DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]);
if (((ft2232_write(buf, 3, &bytes_written)) != ERROR_OK) || (bytes_written != 3))
{
ERROR("couldn't initialize FT2232 with 'flyswatter' layout");
LOG_ERROR("couldn't initialize FT2232 with 'flyswatter' layout");
return ERROR_JTAG_INIT_FAILED;
}
@ -1881,11 +1880,11 @@ int turtle_init(void)
buf[0] = 0x80; /* command "set data bits low byte" */
buf[1] = low_output; /* value (TMS=1,TCK=0, TDI=0, nOE=0) */
buf[2] = low_direction; /* dir (output=1), TCK/TDI/TMS=out, TDO=in, nOE=out */
DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]);
LOG_DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]);
if (((ft2232_write(buf, 3, &bytes_written)) != ERROR_OK) || (bytes_written != 3))
{
ERROR("couldn't initialize FT2232 with 'turtelizer2' layout");
LOG_ERROR("couldn't initialize FT2232 with 'turtelizer2' layout");
return ERROR_JTAG_INIT_FAILED;
}
@ -1898,11 +1897,11 @@ int turtle_init(void)
buf[0] = 0x82; /* command "set data bits high byte" */
buf[1] = high_output;
buf[2] = high_direction;
DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]);
LOG_DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]);
if (((ft2232_write(buf, 3, &bytes_written)) != ERROR_OK) || (bytes_written != 3))
{
ERROR("couldn't initialize FT2232 with 'turtelizer2' layout");
LOG_ERROR("couldn't initialize FT2232 with 'turtelizer2' layout");
return ERROR_JTAG_INIT_FAILED;
}
@ -1921,11 +1920,11 @@ int comstick_init(void)
buf[0] = 0x80; /* command "set data bits low byte" */
buf[1] = low_output; /* value (TMS=1,TCK=0, TDI=0, nOE=0) */
buf[2] = low_direction; /* dir (output=1), TCK/TDI/TMS=out, TDO=in, nOE=out */
DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]);
LOG_DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]);
if (((ft2232_write(buf, 3, &bytes_written)) != ERROR_OK) || (bytes_written != 3))
{
ERROR("couldn't initialize FT2232 with 'comstick' layout");
LOG_ERROR("couldn't initialize FT2232 with 'comstick' layout");
return ERROR_JTAG_INIT_FAILED;
}
@ -1941,11 +1940,11 @@ int comstick_init(void)
buf[0] = 0x82; /* command "set data bits high byte" */
buf[1] = high_output;
buf[2] = high_direction;
DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]);
LOG_DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]);
if (((ft2232_write(buf, 3, &bytes_written)) != ERROR_OK) || (bytes_written != 3))
{
ERROR("couldn't initialize FT2232 with 'comstick' layout");
LOG_ERROR("couldn't initialize FT2232 with 'comstick' layout");
return ERROR_JTAG_INIT_FAILED;
}
@ -1964,11 +1963,11 @@ int stm32stick_init(void)
buf[0] = 0x80; /* command "set data bits low byte" */
buf[1] = low_output; /* value (TMS=1,TCK=0, TDI=0, nOE=0) */
buf[2] = low_direction; /* dir (output=1), TCK/TDI/TMS=out, TDO=in, nOE=out */
DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]);
LOG_DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]);
if (((ft2232_write(buf, 3, &bytes_written)) != ERROR_OK) || (bytes_written != 3))
{
ERROR("couldn't initialize FT2232 with 'stm32stick' layout");
LOG_ERROR("couldn't initialize FT2232 with 'stm32stick' layout");
return ERROR_JTAG_INIT_FAILED;
}
@ -1984,11 +1983,11 @@ int stm32stick_init(void)
buf[0] = 0x82; /* command "set data bits high byte" */
buf[1] = high_output;
buf[2] = high_direction;
DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]);
LOG_DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]);
if (((ft2232_write(buf, 3, &bytes_written)) != ERROR_OK) || (bytes_written != 3))
{
ERROR("couldn't initialize FT2232 with 'stm32stick' layout");
LOG_ERROR("couldn't initialize FT2232 with 'stm32stick' layout");
return ERROR_JTAG_INIT_FAILED;
}
@ -2064,7 +2063,7 @@ int ft2232_handle_device_desc_command(struct command_context_s *cmd_ctx, char *c
}
else
{
ERROR("expected exactly one argument to ft2232_device_desc <description>");
LOG_ERROR("expected exactly one argument to ft2232_device_desc <description>");
}
return ERROR_OK;
@ -2078,7 +2077,7 @@ int ft2232_handle_serial_command(struct command_context_s *cmd_ctx, char *cmd, c
}
else
{
ERROR("expected exactly one argument to ft2232_serial <serial-number>");
LOG_ERROR("expected exactly one argument to ft2232_serial <serial-number>");
}
return ERROR_OK;
@ -2100,13 +2099,13 @@ int ft2232_handle_vid_pid_command(struct command_context_s *cmd_ctx, char *cmd,
int i;
if (argc > MAX_USB_IDS*2) {
WARNING("ignoring extra IDs in ft2232_vid_pid "
LOG_WARNING("ignoring extra IDs in ft2232_vid_pid "
"(maximum is %d pairs)", MAX_USB_IDS);
argc = MAX_USB_IDS*2;
}
if (argc < 2 || (argc & 1))
{
WARNING("incomplete ft2232_vid_pid configuration directive");
LOG_WARNING("incomplete ft2232_vid_pid configuration directive");
if (argc < 2)
return ERROR_OK;
}
@ -2132,7 +2131,7 @@ int ft2232_handle_latency_command(struct command_context_s *cmd_ctx, char *cmd,
}
else
{
ERROR("expected exactly one argument to ft2232_latency <ms>");
LOG_ERROR("expected exactly one argument to ft2232_latency <ms>");
}
return ERROR_OK;

53
src/jtag/gw16012.c
View File

@ -75,7 +75,6 @@
#if IS_CYGWIN == 1
#include <windows.h>
#include <errno.h>
#undef ERROR
#endif
#endif
@ -127,7 +126,7 @@ void gw16012_data(u8 value)
gw16012_msb ^= 0x80; /* toggle MSB */
#ifdef _DEBUG_GW16012_IO_
DEBUG("%2.2x", value);
LOG_DEBUG("%2.2x", value);
#endif
#if PARPORT_USE_PPDEV == 1
@ -148,7 +147,7 @@ void gw16012_control(u8 value)
gw16012_control_value = value;
#ifdef _DEBUG_GW16012_IO_
DEBUG("%2.2x", gw16012_control_value);
LOG_DEBUG("%2.2x", gw16012_control_value);
#endif
#if PARPORT_USE_PPDEV == 1
@ -172,14 +171,14 @@ void gw16012_input(u8 *value)
#endif
#ifdef _DEBUG_GW16012_IO_
DEBUG("%2.2x", *value);
LOG_DEBUG("%2.2x", *value);
#endif
}
/* (1) assert or (0) deassert reset lines */
void gw16012_reset(int trst, int srst)
{
DEBUG("trst: %i, srst: %i", trst, srst);
LOG_DEBUG("trst: %i, srst: %i", trst, srst);
if (trst == 0)
gw16012_control(0x0d);
@ -204,7 +203,7 @@ void gw16012_end_state(state)
end_state = state;
else
{
ERROR("BUG: %i is not a valid end state", state);
LOG_ERROR("BUG: %i is not a valid end state", state);
exit(-1);
}
}
@ -244,7 +243,7 @@ void gw16012_path_move(pathmove_command_t *cmd)
}
else
{
ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_strings[cur_state], tap_state_strings[cmd->path[state_count]]);
LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_strings[cur_state], tap_state_strings[cmd->path[state_count]]);
exit(-1);
}
@ -371,14 +370,14 @@ int gw16012_execute_queue(void)
{
case JTAG_END_STATE:
#ifdef _DEBUG_JTAG_IO_
DEBUG("end_state: %i", cmd->cmd.end_state->end_state);
LOG_DEBUG("end_state: %i", cmd->cmd.end_state->end_state);
#endif
if (cmd->cmd.end_state->end_state != -1)
gw16012_end_state(cmd->cmd.end_state->end_state);
break;
case JTAG_RESET:
#ifdef _DEBUG_JTAG_IO_
DEBUG("reset trst: %i srst %i", cmd->cmd.reset->trst, cmd->cmd.reset->srst);
LOG_DEBUG("reset trst: %i srst %i", cmd->cmd.reset->trst, cmd->cmd.reset->srst);
#endif
if (cmd->cmd.reset->trst == 1)
{
@ -388,7 +387,7 @@ int gw16012_execute_queue(void)
break;
case JTAG_RUNTEST:
#ifdef _DEBUG_JTAG_IO_
DEBUG("runtest %i cycles, end in %i", cmd->cmd.runtest->num_cycles, cmd->cmd.runtest->end_state);
LOG_DEBUG("runtest %i cycles, end in %i", cmd->cmd.runtest->num_cycles, cmd->cmd.runtest->end_state);
#endif
if (cmd->cmd.runtest->end_state != -1)
gw16012_end_state(cmd->cmd.runtest->end_state);
@ -396,7 +395,7 @@ int gw16012_execute_queue(void)
break;
case JTAG_STATEMOVE:
#ifdef _DEBUG_JTAG_IO_
DEBUG("statemove end in %i", cmd->cmd.statemove->end_state);
LOG_DEBUG("statemove end in %i", cmd->cmd.statemove->end_state);
#endif
if (cmd->cmd.statemove->end_state != -1)
gw16012_end_state(cmd->cmd.statemove->end_state);
@ -404,7 +403,7 @@ int gw16012_execute_queue(void)
break;
case JTAG_PATHMOVE:
#ifdef _DEBUG_JTAG_IO_
DEBUG("pathmove: %i states, end in %i", cmd->cmd.pathmove->num_states, cmd->cmd.pathmove->path[cmd->cmd.pathmove->num_states - 1]);
LOG_DEBUG("pathmove: %i states, end in %i", cmd->cmd.pathmove->num_states, cmd->cmd.pathmove->path[cmd->cmd.pathmove->num_states - 1]);
#endif
gw16012_path_move(cmd->cmd.pathmove);
break;
@ -414,7 +413,7 @@ int gw16012_execute_queue(void)
scan_size = jtag_build_buffer(cmd->cmd.scan, &buffer);
type = jtag_scan_type(cmd->cmd.scan);
#ifdef _DEBUG_JTAG_IO_
DEBUG("%s scan (%i) %i bit end in %i", (cmd->cmd.scan->ir_scan) ? "ir" : "dr",
LOG_DEBUG("%s scan (%i) %i bit end in %i", (cmd->cmd.scan->ir_scan) ? "ir" : "dr",
type, scan_size, cmd->cmd.scan->end_state);
#endif
gw16012_scan(cmd->cmd.scan->ir_scan, type, buffer, scan_size);
@ -425,12 +424,12 @@ int gw16012_execute_queue(void)
break;
case JTAG_SLEEP:
#ifdef _DEBUG_JTAG_IO_
DEBUG("sleep %i", cmd->cmd.sleep->us);
LOG_DEBUG("sleep %i", cmd->cmd.sleep->us);
#endif
jtag_sleep(cmd->cmd.sleep->us);
break;
default:
ERROR("BUG: unknown JTAG command type encountered");
LOG_ERROR("BUG: unknown JTAG command type encountered");
exit(-1);
}
cmd = cmd->next;
@ -476,34 +475,34 @@ int gw16012_init(void)
#if PARPORT_USE_PPDEV == 1
if (device_handle>0)
{
ERROR("device is already opened");
LOG_ERROR("device is already opened");
return ERROR_JTAG_INIT_FAILED;
}
#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
DEBUG("opening /dev/ppi%d...", gw16012_port);
LOG_DEBUG("opening /dev/ppi%d...", gw16012_port);
snprintf(buffer, 256, "/dev/ppi%d", gw16012_port);
device_handle = open(buffer, O_WRONLY);
#else
DEBUG("opening /dev/parport%d...", gw16012_port);
LOG_DEBUG("opening /dev/parport%d...", gw16012_port);
snprintf(buffer, 256, "/dev/parport%d", gw16012_port);
device_handle = open(buffer, O_WRONLY);
#endif
if (device_handle<0)
{
ERROR("cannot open device. check it exists and that user read and write rights are set");
LOG_ERROR("cannot open device. check it exists and that user read and write rights are set");
return ERROR_JTAG_INIT_FAILED;
}
DEBUG("...open");
LOG_DEBUG("...open");
#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
i=ioctl(device_handle, PPCLAIM);
if (i<0)
{
ERROR("cannot claim device");
LOG_ERROR("cannot claim device");
return ERROR_JTAG_INIT_FAILED;
}
@ -511,7 +510,7 @@ int gw16012_init(void)
i= ioctl(device_handle, PPSETMODE, & i);
if (i<0)
{
ERROR(" cannot set compatible mode to device");
LOG_ERROR(" cannot set compatible mode to device");
return ERROR_JTAG_INIT_FAILED;
}
@ -519,7 +518,7 @@ int gw16012_init(void)
i = ioctl(device_handle, PPNEGOT, & i);
if (i<0)
{
ERROR("cannot set compatible 1284 mode to device");
LOG_ERROR("cannot set compatible 1284 mode to device");
return ERROR_JTAG_INIT_FAILED;
}
#endif
@ -527,20 +526,20 @@ int gw16012_init(void)
if (gw16012_port == 0)
{
gw16012_port = 0x378;
WARNING("No gw16012 port specified, using default '0x378' (LPT1)");
LOG_WARNING("No gw16012 port specified, using default '0x378' (LPT1)");
}
DEBUG("requesting privileges for parallel port 0x%lx...", gw16012_port);
LOG_DEBUG("requesting privileges for parallel port 0x%lx...", gw16012_port);
#if PARPORT_USE_GIVEIO == 1
if (gw16012_get_giveio_access() != 0)
#else /* PARPORT_USE_GIVEIO */
if (ioperm(gw16012_port, 3, 1) != 0)
#endif /* PARPORT_USE_GIVEIO */
{
ERROR("missing privileges for direct i/o");
LOG_ERROR("missing privileges for direct i/o");
return ERROR_JTAG_INIT_FAILED;
}
DEBUG("...privileges granted");
LOG_DEBUG("...privileges granted");
/* make sure parallel port is in right mode (clear tristate and interrupt */
#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)

90
src/jtag/jtag.c
View File

@ -302,7 +302,7 @@ int jtag_call_event_callbacks(enum jtag_event event)
{
jtag_event_callback_t *callback = jtag_event_callbacks;
DEBUG("jtag event: %s", jtag_event_strings[event]);
LOG_DEBUG("jtag event: %s", jtag_event_strings[event]);
while (callback)
{
@ -346,7 +346,7 @@ jtag_device_t* jtag_get_device(int num)
i++;
}
ERROR("jtag device number %d not defined", num);
LOG_ERROR("jtag device number %d not defined", num);
exit(-1);
}
@ -397,7 +397,7 @@ static void jtag_prelude1()
{
if (jtag_trst == 1)
{
WARNING("JTAG command queued, while TRST is low (TAP in reset)");
LOG_WARNING("JTAG command queued, while TRST is low (TAP in reset)");
jtag_error=ERROR_JTAG_TRST_ASSERTED;
return;
}
@ -615,7 +615,7 @@ int MINIDRIVER(interface_jtag_add_dr_scan)(int num_fields, scan_field_t *fields,
/* if a device isn't listed, the BYPASS register should be selected */
if (!jtag_get_device(i)->bypass)
{
ERROR("BUG: no scan data for a device not in BYPASS");
LOG_ERROR("BUG: no scan data for a device not in BYPASS");
exit(-1);
}
#endif
@ -635,7 +635,7 @@ int MINIDRIVER(interface_jtag_add_dr_scan)(int num_fields, scan_field_t *fields,
/* if a device is listed, the BYPASS register must not be selected */
if (jtag_get_device(i)->bypass)
{
ERROR("BUG: scan data for a device in BYPASS");
LOG_ERROR("BUG: scan data for a device in BYPASS");
exit(-1);
}
#endif
@ -689,7 +689,7 @@ void MINIDRIVER(interface_jtag_add_dr_out)(int device_num,
/* if a device is listed, the BYPASS register must not be selected */
if (jtag_get_device(i)->bypass)
{
ERROR("BUG: scan data for a device in BYPASS");
LOG_ERROR("BUG: scan data for a device in BYPASS");
exit(-1);
}
#endif
@ -713,7 +713,7 @@ void MINIDRIVER(interface_jtag_add_dr_out)(int device_num,
/* if a device isn't listed, the BYPASS register should be selected */
if (!jtag_get_device(i)->bypass)
{
ERROR("BUG: no scan data for a device not in BYPASS");
LOG_ERROR("BUG: no scan data for a device not in BYPASS");
exit(-1);
}
#endif
@ -809,7 +809,7 @@ void jtag_add_pathmove(int num_states, enum tap_state *path)
/* the last state has to be a stable state */
if (tap_move_map[path[num_states - 1]] == -1)
{
ERROR("BUG: TAP path doesn't finish in a stable state");
LOG_ERROR("BUG: TAP path doesn't finish in a stable state");
exit(-1);
}
@ -820,7 +820,7 @@ void jtag_add_pathmove(int num_states, enum tap_state *path)
if ((tap_transitions[cur_state].low != path[i])&&
(tap_transitions[cur_state].high != path[i]))
{
ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_strings[cur_state], tap_state_strings[path[i]]);
LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_strings[cur_state], tap_state_strings[path[i]]);
exit(-1);
}
cur_state = path[i];
@ -899,7 +899,7 @@ int jtag_add_reset(int req_trst, int req_srst)
/* if SRST pulls TRST, we can't fulfill srst == 1 with trst == 0 */
if (((jtag_reset_config & RESET_SRST_PULLS_TRST) && (req_srst == 1)) && (req_trst == 0))
{
WARNING("requested reset would assert trst");
LOG_WARNING("requested reset would assert trst");
return ERROR_JTAG_RESET_WOULD_ASSERT_TRST;
}
@ -912,7 +912,7 @@ int jtag_add_reset(int req_trst, int req_srst)
if (req_srst && !(jtag_reset_config & RESET_HAS_SRST))
{
WARNING("requested nSRST assertion, but the current configuration doesn't support this");
LOG_WARNING("requested nSRST assertion, but the current configuration doesn't support this");
return ERROR_JTAG_RESET_CANT_SRST;
}
@ -934,18 +934,18 @@ int jtag_add_reset(int req_trst, int req_srst)
if (jtag_srst)
{
DEBUG("SRST line asserted");
LOG_DEBUG("SRST line asserted");
}
else
{
DEBUG("SRST line released");
LOG_DEBUG("SRST line released");
if (jtag_nsrst_delay)
jtag_add_sleep(jtag_nsrst_delay * 1000);
}
if (trst_with_tms)
{
DEBUG("JTAG reset with tms instead of TRST");
LOG_DEBUG("JTAG reset with tms instead of TRST");
jtag_add_end_state(TAP_TLR);
jtag_add_statemove(TAP_TLR);
jtag_call_event_callbacks(JTAG_TRST_ASSERTED);
@ -957,7 +957,7 @@ int jtag_add_reset(int req_trst, int req_srst)
/* we just asserted nTRST, so we're now in Test-Logic-Reset,
* and inform possible listeners about this
*/
DEBUG("TRST line asserted");
LOG_DEBUG("TRST line asserted");
cmd_queue_cur_state = TAP_TLR;
jtag_call_event_callbacks(JTAG_TRST_ASSERTED);
}
@ -966,7 +966,7 @@ int jtag_add_reset(int req_trst, int req_srst)
/* the nTRST line got deasserted, so we're still in Test-Logic-Reset,
* but we might want to add a delay to give the TAP time to settle
*/
DEBUG("Now in TAP_TLR - Test-Logic-Reset(either due to TRST line asserted or tms reset)");
LOG_DEBUG("Now in TAP_TLR - Test-Logic-Reset(either due to TRST line asserted or tms reset)");
if (jtag_ntrst_delay)
jtag_add_sleep(jtag_ntrst_delay * 1000);
}
@ -1053,7 +1053,7 @@ int jtag_build_buffer(scan_command_t *cmd, u8 **buffer)
#endif
buf_set_buf(cmd->fields[i].out_value, 0, *buffer, bit_count, cmd->fields[i].num_bits);
#ifdef _DEBUG_JTAG_IO_
DEBUG("fields[%i].out_value: 0x%s", i, char_buf);
LOG_DEBUG("fields[%i].out_value: 0x%s", i, char_buf);
free(char_buf);
#endif
}
@ -1088,7 +1088,7 @@ int jtag_read_buffer(u8 *buffer, scan_command_t *cmd)
char *char_buf;
char_buf = buf_to_str(captured, (num_bits > 64) ? 64 : num_bits, 16);
DEBUG("fields[%i].in_value: 0x%s", i, char_buf);
LOG_DEBUG("fields[%i].in_value: 0x%s", i, char_buf);
free(char_buf);
#endif
@ -1100,7 +1100,7 @@ int jtag_read_buffer(u8 *buffer, scan_command_t *cmd)
{
if (cmd->fields[i].in_handler(cmd->fields[i].in_value, cmd->fields[i].in_handler_priv, cmd->fields+i) != ERROR_OK)
{
WARNING("in_handler reported a failed check");
LOG_WARNING("in_handler reported a failed check");
retval = ERROR_JTAG_QUEUE_FAILED;
}
}
@ -1114,7 +1114,7 @@ int jtag_read_buffer(u8 *buffer, scan_command_t *cmd)
/* We're going to call the error:handler later, but if the in_handler
* reported an error we report this failure upstream
*/
WARNING("in_handler reported a failed check");
LOG_WARNING("in_handler reported a failed check");
retval = ERROR_JTAG_QUEUE_FAILED;
}
}
@ -1154,12 +1154,12 @@ int jtag_check_value(u8 *captured, void *priv, scan_field_t *field)
{
char *in_check_mask_char;
in_check_mask_char = buf_to_str(field->in_check_mask, (num_bits > 64) ? 64 : num_bits, 16);
WARNING("value captured during scan didn't pass the requested check: captured: 0x%s check_value: 0x%s check_mask: 0x%s", captured_char, in_check_value_char, in_check_mask_char);
LOG_WARNING("value captured during scan didn't pass the requested check: captured: 0x%s check_value: 0x%s check_mask: 0x%s", captured_char, in_check_value_char, in_check_mask_char);
free(in_check_mask_char);
}
else
{
WARNING("value captured during scan didn't pass the requested check: captured: 0x%s check_value: 0x%s", captured_char, in_check_value_char);
LOG_WARNING("value captured during scan didn't pass the requested check: captured: 0x%s check_value: 0x%s", captured_char, in_check_value_char);
}
free(captured_char);
@ -1232,7 +1232,7 @@ int jtag_reset_callback(enum jtag_event event, void *priv)
{
jtag_device_t *device = priv;
DEBUG("-");
LOG_DEBUG("-");
if (event == JTAG_TRST_ASSERTED)
{
@ -1288,7 +1288,7 @@ int jtag_examine_chain()
/* if there wasn't a single non-zero bit or if all bits were one, the scan isn't valid */
if ((zero_check == 0x00) || (one_check == 0xff))
{
ERROR("JTAG communication failure, check connection, JTAG interface, target power etc.");
LOG_ERROR("JTAG communication failure, check connection, JTAG interface, target power etc.");
return ERROR_JTAG_INIT_FAILED;
}
@ -1325,7 +1325,7 @@ int jtag_examine_chain()
part = (idcode & 0xffff000) >> 12;
version = (idcode & 0xf0000000) >> 28;
INFO("JTAG device found: 0x%8.8x (Manufacturer: 0x%3.3x, Part: 0x%4.4x, Version: 0x%1.1x)",
LOG_INFO("JTAG device found: 0x%8.8x (Manufacturer: 0x%3.3x, Part: 0x%4.4x, Version: 0x%1.1x)",
idcode, manufacturer, part, version);
bit_count += 32;
@ -1335,9 +1335,9 @@ int jtag_examine_chain()
/* see if number of discovered devices matches configuration */
if (device_count != jtag_num_devices)
{
ERROR("number of discovered devices in JTAG chain (%i) doesn't match configuration (%i)",
LOG_ERROR("number of discovered devices in JTAG chain (%i) doesn't match configuration (%i)",
device_count, jtag_num_devices);
ERROR("check the config file and ensure proper JTAG communication (connections, speed, ...)");
LOG_ERROR("check the config file and ensure proper JTAG communication (connections, speed, ...)");
return ERROR_JTAG_INIT_FAILED;
}
@ -1381,7 +1381,7 @@ int jtag_validate_chain()
if (buf_get_u32(ir_test, chain_pos, 2) != 0x1)
{
char *cbuf = buf_to_str(ir_test, total_ir_length, 16);
ERROR("Error validating JTAG scan chain, IR mismatch, scan returned 0x%s", cbuf);
LOG_ERROR("Error validating JTAG scan chain, IR mismatch, scan returned 0x%s", cbuf);
free(cbuf);
free(ir_test);
return ERROR_JTAG_INIT_FAILED;
@ -1393,7 +1393,7 @@ int jtag_validate_chain()
if (buf_get_u32(ir_test, chain_pos, 2) != 0x3)
{
char *cbuf = buf_to_str(ir_test, total_ir_length, 16);
ERROR("Error validating JTAG scan chain, IR mismatch, scan returned 0x%s", cbuf);
LOG_ERROR("Error validating JTAG scan chain, IR mismatch, scan returned 0x%s", cbuf);
free(cbuf);
free(ir_test);
return ERROR_JTAG_INIT_FAILED;
@ -1447,7 +1447,7 @@ int jtag_interface_init(struct command_context_s *cmd_ctx)
if (!jtag_interface)
{
/* nothing was previously specified by "interface" command */
ERROR("JTAG interface has to be specified, see \"interface\" command");
LOG_ERROR("JTAG interface has to be specified, see \"interface\" command");
return ERROR_JTAG_INVALID_INTERFACE;
}
@ -1463,7 +1463,7 @@ int jtag_init(struct command_context_s *cmd_ctx)
int validate_tries = 0;
jtag_device_t *device;
DEBUG("-");
LOG_DEBUG("-");
if (!jtag && jtag_interface_init(cmd_ctx) != ERROR_OK)
return ERROR_JTAG_INIT_FAILED;
@ -1484,7 +1484,7 @@ int jtag_init(struct command_context_s *cmd_ctx)
/* examine chain first, as this could discover the real chain layout */
if (jtag_examine_chain() != ERROR_OK)
{
ERROR("trying to validate configured JTAG chain anyway...");
LOG_ERROR("trying to validate configured JTAG chain anyway...");
}
while (jtag_validate_chain() != ERROR_OK)
@ -1492,7 +1492,7 @@ int jtag_init(struct command_context_s *cmd_ctx)
validate_tries++;
if (validate_tries > 5)
{
ERROR("Could not validate JTAG chain, exit");
LOG_ERROR("Could not validate JTAG chain, exit");
return ERROR_JTAG_INVALID_INTERFACE;
}
usleep(10000);
@ -1504,7 +1504,7 @@ int jtag_init(struct command_context_s *cmd_ctx)
static int default_khz(int khz, int *jtag_speed)
{
ERROR("Translation from khz to jtag_speed not implemented");
LOG_ERROR("Translation from khz to jtag_speed not implemented");
return ERROR_FAIL;
}
@ -1515,7 +1515,7 @@ int handle_interface_command(struct command_context_s *cmd_ctx, char *cmd, char
/* check whether the interface is already configured */
if (jtag_interface)
{
WARNING("Interface already configured, ignoring");
LOG_WARNING("Interface already configured, ignoring");
return ERROR_OK;
}
@ -1545,11 +1545,11 @@ int handle_interface_command(struct command_context_s *cmd_ctx, char *cmd, char
/* no valid interface was found (i.e. the configuration option,
* didn't match one of the compiled-in interfaces
*/
ERROR("No valid jtag interface found (%s)", args[0]);
ERROR("compiled-in jtag interfaces:");
LOG_ERROR("No valid jtag interface found (%s)", args[0]);
LOG_ERROR("compiled-in jtag interfaces:");
for (i = 0; jtag_interfaces[i]; i++)
{
ERROR("%i: %s", i, jtag_interfaces[i]->name);
LOG_ERROR("%i: %s", i, jtag_interfaces[i]->name);
}
return ERROR_JTAG_INVALID_INTERFACE;
@ -1623,7 +1623,7 @@ int handle_reset_config_command(struct command_context_s *cmd_ctx, char *cmd, ch
jtag_reset_config = RESET_TRST_AND_SRST;
else
{
ERROR("invalid reset_config argument, defaulting to none");
LOG_ERROR("invalid reset_config argument, defaulting to none");
jtag_reset_config = RESET_NONE;
return ERROR_INVALID_ARGUMENTS;
}
@ -1641,7 +1641,7 @@ int handle_reset_config_command(struct command_context_s *cmd_ctx, char *cmd, ch
jtag_reset_config &= ~(RESET_SRST_PULLS_TRST | RESET_TRST_PULLS_SRST);
else
{
ERROR("invalid reset_config argument, defaulting to none");
LOG_ERROR("invalid reset_config argument, defaulting to none");
jtag_reset_config = RESET_NONE;
return ERROR_INVALID_ARGUMENTS;
}
@ -1655,7 +1655,7 @@ int handle_reset_config_command(struct command_context_s *cmd_ctx, char *cmd, ch
jtag_reset_config &= ~RESET_TRST_OPEN_DRAIN;
else
{
ERROR("invalid reset_config argument, defaulting to none");
LOG_ERROR("invalid reset_config argument, defaulting to none");
jtag_reset_config = RESET_NONE;
return ERROR_INVALID_ARGUMENTS;
}
@ -1669,7 +1669,7 @@ int handle_reset_config_command(struct command_context_s *cmd_ctx, char *cmd, ch
jtag_reset_config &= ~RESET_SRST_PUSH_PULL;
else
{
ERROR("invalid reset_config argument, defaulting to none");
LOG_ERROR("invalid reset_config argument, defaulting to none");
jtag_reset_config = RESET_NONE;
return ERROR_INVALID_ARGUMENTS;
}
@ -1682,7 +1682,7 @@ int handle_jtag_nsrst_delay_command(struct command_context_s *cmd_ctx, char *cmd
{
if (argc < 1)
{
ERROR("jtag_nsrst_delay <ms> command takes one required argument");
LOG_ERROR("jtag_nsrst_delay <ms> command takes one required argument");
exit(-1);
}
else
@ -1697,7 +1697,7 @@ int handle_jtag_ntrst_delay_command(struct command_context_s *cmd_ctx, char *cmd
{
if (argc < 1)
{
ERROR("jtag_ntrst_delay <ms> command takes one required argument");
LOG_ERROR("jtag_ntrst_delay <ms> command takes one required argument");
exit(-1);
}
else
@ -1736,7 +1736,7 @@ int handle_jtag_khz_command(struct command_context_s *cmd_ctx, char *cmd, char *
if (jtag == NULL)
{
ERROR("Interface not selected yet");
LOG_ERROR("Interface not selected yet");
return ERROR_COMMAND_SYNTAX_ERROR;
}

31
src/jtag/parport.c
View File

@ -70,7 +70,6 @@
#if IS_CYGWIN == 1
#include <windows.h>
#include <errno.h>
#undef ERROR
#endif
#endif
@ -231,7 +230,7 @@ void parport_write(int tck, int tms, int tdi)
/* (1) assert or (0) deassert reset lines */
void parport_reset(int trst, int srst)
{
DEBUG("trst: %i, srst: %i", trst, srst);
LOG_DEBUG("trst: %i, srst: %i", trst, srst);
if (trst == 0)
dataport_value |= cable->TRST_MASK;
@ -315,7 +314,7 @@ int parport_init(void)
if ((parport_cable == NULL) || (parport_cable[0] == 0))
{
parport_cable = "wiggler";
WARNING("No parport cable specified, using default 'wiggler'");
LOG_WARNING("No parport cable specified, using default 'wiggler'");
}
while (cur_cable->name)
@ -330,7 +329,7 @@ int parport_init(void)
if (!cable)
{
ERROR("No matching cable found for %s", parport_cable);
LOG_ERROR("No matching cable found for %s", parport_cable);
return ERROR_JTAG_INIT_FAILED;
}
@ -339,17 +338,17 @@ int parport_init(void)
#if PARPORT_USE_PPDEV == 1
if (device_handle > 0)
{
ERROR("device is already opened");
LOG_ERROR("device is already opened");
return ERROR_JTAG_INIT_FAILED;
}
#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
DEBUG("opening /dev/ppi%d...", parport_port);
LOG_DEBUG("opening /dev/ppi%d...", parport_port);
snprintf(buffer, 256, "/dev/ppi%d", parport_port);
device_handle = open(buffer, O_WRONLY);
#else /* not __FreeBSD__, __FreeBSD_kernel__ */
DEBUG("opening /dev/parport%d...", parport_port);
LOG_DEBUG("opening /dev/parport%d...", parport_port);
snprintf(buffer, 256, "/dev/parport%d", parport_port);
device_handle = open(buffer, O_WRONLY);
@ -357,17 +356,17 @@ int parport_init(void)
if (device_handle < 0)
{
ERROR("cannot open device. check it exists and that user read and write rights are set");
LOG_ERROR("cannot open device. check it exists and that user read and write rights are set");
return ERROR_JTAG_INIT_FAILED;
}
DEBUG("...open");
LOG_DEBUG("...open");
#if !defined(__FreeBSD__) && !defined(__FreeBSD_kernel__)
i=ioctl(device_handle, PPCLAIM);
if (i<0)
{
ERROR("cannot claim device");
LOG_ERROR("cannot claim device");
return ERROR_JTAG_INIT_FAILED;
}
@ -375,7 +374,7 @@ int parport_init(void)
i= ioctl(device_handle, PPSETMODE, & i);
if (i<0)
{
ERROR(" cannot set compatible mode to device");
LOG_ERROR(" cannot set compatible mode to device");
return ERROR_JTAG_INIT_FAILED;
}
@ -383,7 +382,7 @@ int parport_init(void)
i = ioctl(device_handle, PPNEGOT, & i);
if (i<0)
{
ERROR("cannot set compatible 1284 mode to device");
LOG_ERROR("cannot set compatible 1284 mode to device");
return ERROR_JTAG_INIT_FAILED;
}
#endif /* not __FreeBSD__, __FreeBSD_kernel__ */
@ -392,23 +391,23 @@ int parport_init(void)
if (parport_port == 0)
{
parport_port = 0x378;
WARNING("No parport port specified, using default '0x378' (LPT1)");
LOG_WARNING("No parport port specified, using default '0x378' (LPT1)");
}
dataport = parport_port;
statusport = parport_port + 1;
DEBUG("requesting privileges for parallel port 0x%lx...", dataport);
LOG_DEBUG("requesting privileges for parallel port 0x%lx...", dataport);
#if PARPORT_USE_GIVEIO == 1
if (parport_get_giveio_access() != 0)
#else /* PARPORT_USE_GIVEIO */
if (ioperm(dataport, 3, 1) != 0)
#endif /* PARPORT_USE_GIVEIO */
{
ERROR("missing privileges for direct i/o");
LOG_ERROR("missing privileges for direct i/o");
return ERROR_JTAG_INIT_FAILED;
}
DEBUG("...privileges granted");
LOG_DEBUG("...privileges granted");
/* make sure parallel port is in right mode (clear tristate and interrupt */
#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)

67
src/jtag/presto.c
View File

@ -23,7 +23,6 @@
#if IS_CYGWIN == 1
#include "windows.h"
#undef ERROR
#endif
#include "replacements.h"
@ -145,7 +144,7 @@ int presto_write(u8 *buf, int size)
DWORD ftbytes;
if ((presto->status = FT_Write(presto->handle, buf, size, &ftbytes)) != FT_OK)
{
ERROR("FT_Write returned: %lu", presto->status);
LOG_ERROR("FT_Write returned: %lu", presto->status);
return ERROR_JTAG_DEVICE_ERROR;
}
@ -153,7 +152,7 @@ int presto_write(u8 *buf, int size)
u32 ftbytes;
if ((presto->retval = ftdi_write_data(&presto->ftdic, buf, size)) < 0)
{
ERROR("ftdi_write_data: %s", ftdi_get_error_string(&presto->ftdic));
LOG_ERROR("ftdi_write_data: %s", ftdi_get_error_string(&presto->ftdic));
return ERROR_JTAG_DEVICE_ERROR;
}
ftbytes = presto->retval;
@ -161,7 +160,7 @@ int presto_write(u8 *buf, int size)
if (ftbytes != size)
{
ERROR("couldn't write the requested number of bytes to PRESTO (%i < %i)", ftbytes, size);
LOG_ERROR("couldn't write the requested number of bytes to PRESTO (%i < %i)", ftbytes, size);
return ERROR_JTAG_DEVICE_ERROR;
}
@ -174,7 +173,7 @@ int presto_read(u8* buf, int size)
DWORD ftbytes;
if ((presto->status = FT_Read(presto->handle, buf, size, &ftbytes)) != FT_OK)
{
ERROR("FT_Read returned: %lu", presto->status);
LOG_ERROR("FT_Read returned: %lu", presto->status);
return ERROR_JTAG_DEVICE_ERROR;
}
@ -189,7 +188,7 @@ int presto_read(u8* buf, int size)
{
if ((presto->retval = ftdi_read_data(&presto->ftdic, buf + ftbytes, size - ftbytes)) < 0)
{
ERROR("ftdi_read_data: %s", ftdi_get_error_string(&presto->ftdic));
LOG_ERROR("ftdi_read_data: %s", ftdi_get_error_string(&presto->ftdic));
return ERROR_JTAG_DEVICE_ERROR;
}
ftbytes += presto->retval;
@ -203,7 +202,7 @@ int presto_read(u8* buf, int size)
if (ftbytes != size)
{
/* this is just a warning, there might have been timeout when detecting PRESTO, which is not fatal */
WARNING("couldn't read the requested number of bytes from PRESTO (%i < %i)", ftbytes, size);
LOG_WARNING("couldn't read the requested number of bytes from PRESTO (%i < %i)", ftbytes, size);
return ERROR_JTAG_DEVICE_ERROR;
}
@ -228,27 +227,27 @@ int presto_open_ftd2xx(char *req_serial)
/* Add non-standard Vid/Pid to the linux driver */
if ((presto->status = FT_SetVIDPID(PRESTO_VID, PRESTO_PID)) != FT_OK)
{
ERROR("couldn't add PRESTO VID/PID");
LOG_ERROR("couldn't add PRESTO VID/PID");
exit(-1);
}
#endif
if ((presto->status = FT_ListDevices(&numdevs, NULL, FT_LIST_NUMBER_ONLY)) != FT_OK)
{
ERROR("FT_ListDevices failed: %i", (int)presto->status);
LOG_ERROR("FT_ListDevices failed: %i", (int)presto->status);
return ERROR_JTAG_DEVICE_ERROR;
}
DEBUG("FTDI devices available: %i", numdevs);
LOG_DEBUG("FTDI devices available: %i", numdevs);
for (i = 0; i < numdevs; i++)
{
if ((presto->status = FT_Open(i, &(presto->handle))) != FT_OK)
{
/* this is not fatal, the device may be legitimately open by other process, hence debug message only */
DEBUG("FT_Open failed: %i", (int)presto->status);
LOG_DEBUG("FT_Open failed: %i", (int)presto->status);
continue;
}
DEBUG("FTDI device %i open", i);
LOG_DEBUG("FTDI device %i open", i);
if ((presto->status = FT_GetDeviceInfo(presto->handle, &device, &vidpid,
presto->serial, devname, NULL)) == FT_OK)
@ -258,9 +257,9 @@ int presto_open_ftd2xx(char *req_serial)
break;
}
else
DEBUG("FT_GetDeviceInfo failed: %i", presto->status);
LOG_DEBUG("FT_GetDeviceInfo failed: %i", presto->status);
DEBUG("FTDI device %i does not match, closing", i);
LOG_DEBUG("FTDI device %i does not match, closing", i);
FT_Close(presto->handle);
presto->handle = (FT_HANDLE)INVALID_HANDLE_VALUE;
}
@ -290,7 +289,7 @@ int presto_open_ftd2xx(char *req_serial)
if (ftbytes!=1)
{
DEBUG("PRESTO reset");
LOG_DEBUG("PRESTO reset");
if ((presto->status = FT_Purge(presto->handle, FT_PURGE_TX | FT_PURGE_RX)) != FT_OK)
return ERROR_JTAG_DEVICE_ERROR;
@ -324,7 +323,7 @@ int presto_open_ftd2xx(char *req_serial)
if (ftbytes!=1)
{
DEBUG("PRESTO not responding");
LOG_DEBUG("PRESTO not responding");
return ERROR_JTAG_DEVICE_ERROR;
}
}
@ -345,50 +344,50 @@ int presto_open_libftdi(char *req_serial)
{
u8 presto_data;
DEBUG("searching for PRESTO using libftdi");
LOG_DEBUG("searching for PRESTO using libftdi");
/* initialize FTDI context structure */
if (ftdi_init(&presto->ftdic) < 0)
{
ERROR("unable to init libftdi: %s", presto->ftdic.error_str);
LOG_ERROR("unable to init libftdi: %s", presto->ftdic.error_str);
return ERROR_JTAG_DEVICE_ERROR;
}
/* context, vendor id, product id */
if (ftdi_usb_open_desc(&presto->ftdic, PRESTO_VID, PRESTO_PID, NULL, req_serial) < 0)
{
ERROR("unable to open PRESTO: %s", presto->ftdic.error_str);
LOG_ERROR("unable to open PRESTO: %s", presto->ftdic.error_str);
return ERROR_JTAG_DEVICE_ERROR;
}
if (ftdi_usb_reset(&presto->ftdic) < 0)
{
ERROR("unable to reset PRESTO device");
LOG_ERROR("unable to reset PRESTO device");
return ERROR_JTAG_DEVICE_ERROR;
}
if (ftdi_set_latency_timer(&presto->ftdic, 1) < 0)
{
ERROR("unable to set latency timer");
LOG_ERROR("unable to set latency timer");
return ERROR_JTAG_DEVICE_ERROR;
}
if (ftdi_usb_purge_buffers(&presto->ftdic) < 0)
{
ERROR("unable to purge PRESTO buffers");
LOG_ERROR("unable to purge PRESTO buffers");
return ERROR_JTAG_DEVICE_ERROR;
}
presto_data = 0xD0;
if (presto_write(&presto_data, 1) != ERROR_OK)
{
ERROR("error writing to PRESTO");
LOG_ERROR("error writing to PRESTO");
return ERROR_JTAG_DEVICE_ERROR;
}
if (presto_read(&presto_data, 1) != ERROR_OK)
{
DEBUG("no response from PRESTO, retrying");
LOG_DEBUG("no response from PRESTO, retrying");
if (ftdi_usb_purge_buffers(&presto->ftdic) < 0)
return ERROR_JTAG_DEVICE_ERROR;
@ -399,14 +398,14 @@ int presto_open_libftdi(char *req_serial)
if (presto_read(&presto_data, 1) != ERROR_OK)
{
ERROR("no response from PRESTO, giving up");
LOG_ERROR("no response from PRESTO, giving up");
return ERROR_JTAG_DEVICE_ERROR;
}
}
if (presto_write(presto_init_seq, sizeof(presto_init_seq)) != ERROR_OK)
{
ERROR("error writing PRESTO init sequence");
LOG_ERROR("error writing PRESTO init sequence");
return ERROR_JTAG_DEVICE_ERROR;
}
@ -492,7 +491,7 @@ int presto_flush(void)
if (presto->retval < 0)
#endif
{
DEBUG("error in previous communication, canceling I/O operation");
LOG_DEBUG("error in previous communication, canceling I/O operation");
return ERROR_JTAG_DEVICE_ERROR;
}
@ -714,12 +713,12 @@ int presto_jtag_speed(int speed)
if ((speed < 0) || (speed > 3))
{
INFO("valid speed values: 0 (3 MHz), 1 (1.5 MHz), 2 (750 kHz) and 3 (93.75 kHz)");
LOG_INFO("valid speed values: 0 (3 MHz), 1 (1.5 MHz), 2 (750 kHz) and 3 (93.75 kHz)");
return ERROR_INVALID_ARGUMENTS;
}
jtag_speed = speed;
INFO("setting speed to %d, max. TCK freq. is %s", speed, presto_speed_text[speed]);
LOG_INFO("setting speed to %d, max. TCK freq. is %s", speed, presto_speed_text[speed]);
return presto_sendbyte(0xA8 | speed);
}
@ -736,7 +735,7 @@ int presto_handle_serial_command(struct command_context_s *cmd_ctx, char *cmd, c
}
else
{
ERROR("expected exactly one argument to presto_serial <serial-number>");
LOG_ERROR("expected exactly one argument to presto_serial <serial-number>");
}
return ERROR_OK;
@ -757,12 +756,12 @@ int presto_jtag_init(void)
{
presto_close();
if (presto_serial != NULL)
ERROR("Cannot open PRESTO, serial number '%s'", presto_serial);
LOG_ERROR("Cannot open PRESTO, serial number '%s'", presto_serial);
else
ERROR("Cannot open PRESTO");
LOG_ERROR("Cannot open PRESTO");
return ERROR_JTAG_INIT_FAILED;
}
INFO("PRESTO open, serial number '%s'", presto->serial);
LOG_INFO("PRESTO open, serial number '%s'", presto->serial);
/* use JTAG speed setting from configuration file */
presto_jtag_speed(jtag_speed);
@ -776,7 +775,7 @@ int presto_jtag_quit(void)
{
bitq_cleanup();
presto_close();
INFO("PRESTO closed");
LOG_INFO("PRESTO closed");
if (presto_serial)
{

40
src/jtag/usbprog.c
View File

@ -140,14 +140,14 @@ int usbprog_execute_queue(void)
{
case JTAG_END_STATE:
#ifdef _DEBUG_JTAG_IO_
DEBUG("end_state: %i", cmd->cmd.end_state->end_state);
LOG_DEBUG("end_state: %i", cmd->cmd.end_state->end_state);
#endif
if (cmd->cmd.end_state->end_state != -1)
usbprog_end_state(cmd->cmd.end_state->end_state);
break;
case JTAG_RESET:
#ifdef _DEBUG_JTAG_IO_
DEBUG("reset trst: %i srst %i", cmd->cmd.reset->trst, cmd->cmd.reset->srst);
LOG_DEBUG("reset trst: %i srst %i", cmd->cmd.reset->trst, cmd->cmd.reset->srst);
#endif
if (cmd->cmd.reset->trst == 1)
{
@ -157,7 +157,7 @@ int usbprog_execute_queue(void)
break;
case JTAG_RUNTEST:
#ifdef _DEBUG_JTAG_IO_
DEBUG("runtest %i cycles, end in %i", cmd->cmd.runtest->num_cycles, cmd->cmd.runtest->end_state);
LOG_DEBUG("runtest %i cycles, end in %i", cmd->cmd.runtest->num_cycles, cmd->cmd.runtest->end_state);
#endif
if (cmd->cmd.runtest->end_state != -1)
usbprog_end_state(cmd->cmd.runtest->end_state);
@ -165,7 +165,7 @@ int usbprog_execute_queue(void)
break;
case JTAG_STATEMOVE:
#ifdef _DEBUG_JTAG_IO_
DEBUG("statemove end in %i", cmd->cmd.statemove->end_state);
LOG_DEBUG("statemove end in %i", cmd->cmd.statemove->end_state);
#endif
if (cmd->cmd.statemove->end_state != -1)
usbprog_end_state(cmd->cmd.statemove->end_state);
@ -173,14 +173,14 @@ int usbprog_execute_queue(void)
break;
case JTAG_PATHMOVE:
#ifdef _DEBUG_JTAG_IO_
DEBUG("pathmove: %i states, end in %i", cmd->cmd.pathmove->num_states,
LOG_DEBUG("pathmove: %i states, end in %i", cmd->cmd.pathmove->num_states,
cmd->cmd.pathmove->path[cmd->cmd.pathmove->num_states - 1]);
#endif
usbprog_path_move(cmd->cmd.pathmove);
break;
case JTAG_SCAN:
#ifdef _DEBUG_JTAG_IO_
DEBUG("scan end in %i", cmd->cmd.scan->end_state);
LOG_DEBUG("scan end in %i", cmd->cmd.scan->end_state);
#endif
if (cmd->cmd.scan->end_state != -1)
usbprog_end_state(cmd->cmd.scan->end_state);
@ -194,12 +194,12 @@ int usbprog_execute_queue(void)
break;
case JTAG_SLEEP:
#ifdef _DEBUG_JTAG_IO_
DEBUG("sleep %i", cmd->cmd.sleep->us);
LOG_DEBUG("sleep %i", cmd->cmd.sleep->us);
#endif
jtag_sleep(cmd->cmd.sleep->us);
break;
default:
ERROR("BUG: unknown JTAG command type encountered");
LOG_ERROR("BUG: unknown JTAG command type encountered");
exit(-1);
}
@ -216,11 +216,11 @@ int usbprog_init(void)
tms_chain_index = 0;
if (usbprog_jtag_handle == 0)
{
ERROR("Can't find USB JTAG Interface! Please check connection and permissions.");
LOG_ERROR("Can't find USB JTAG Interface! Please check connection and permissions.");
return ERROR_JTAG_INIT_FAILED;
}
INFO("USB JTAG Interface ready!");
LOG_INFO("USB JTAG Interface ready!");
usbprog_jtag_init(usbprog_jtag_handle);
usbprog_reset(0, 0);
@ -241,7 +241,7 @@ void usbprog_end_state(enum tap_state state)
end_state = state;
else
{
ERROR("BUG: %i is not a valid end state", state);
LOG_ERROR("BUG: %i is not a valid end state", state);
exit(-1);
}
}
@ -270,19 +270,19 @@ void usbprog_path_move(pathmove_command_t *cmd)
{
if (tap_transitions[cur_state].low == cmd->path[state_count])
{
/* INFO("1"); */
/* LOG_INFO("1"); */
usbprog_write(0, 0, 0);
usbprog_write(1, 0, 0);
}
else if (tap_transitions[cur_state].high == cmd->path[state_count])
{
/* INFO("2"); */
/* LOG_INFO("2"); */
usbprog_write(0, 1, 0);
usbprog_write(1, 1, 0);
}
else
{
ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_strings[cur_state], tap_state_strings[cmd->path[state_count]]);
LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_strings[cur_state], tap_state_strings[cmd->path[state_count]]);
exit(-1);
}
@ -314,7 +314,7 @@ void usbprog_runtest(int num_cycles)
else
{
usbprog_jtag_tms_send(usbprog_jtag_handle);
/* INFO("NUM CYCLES %i",num_cycles); */
/* LOG_INFO("NUM CYCLES %i",num_cycles); */
}
for (i = 0; i < num_cycles; i++)
@ -388,7 +388,7 @@ void usbprog_write(int tck, int tms, int tdi)
/* (1) assert or (0) deassert reset lines */
void usbprog_reset(int trst, int srst)
{
DEBUG("trst: %i, srst: %i", trst, srst);
LOG_DEBUG("trst: %i, srst: %i", trst, srst);
if (trst)
usbprog_jtag_set_bit(usbprog_jtag_handle, 5, 0);
@ -455,7 +455,7 @@ unsigned char usbprog_jtag_message(struct usbprog_jtag *usbprog_jtag, char *msg,
return 1;
if (res == msglen)
{
/* INFO("HALLLLOOO %i",(int)msg[0]); */
/* LOG_INFO("HALLLLOOO %i",(int)msg[0]); */
res = usb_bulk_read(usbprog_jtag->usb_handle, 0x82, msg, 2, 100);
if (res > 0)
return (unsigned char)msg[1];
@ -508,7 +508,7 @@ void usbprog_jtag_write_and_read(struct usbprog_jtag *usbprog_jtag, char * buffe
if (usb_bulk_write(usbprog_jtag->usb_handle, 3, tmp, 64, 1000) == 64)
{
/* INFO("HALLLLOOO2 %i",(int)tmp[0]); */
/* LOG_INFO("HALLLLOOO2 %i",(int)tmp[0]); */
usleep(1);
int timeout = 0;
while (usb_bulk_read(usbprog_jtag->usb_handle, 0x82, tmp, 64, 1000) < 1)
@ -556,7 +556,7 @@ void usbprog_jtag_read_tdo(struct usbprog_jtag *usbprog_jtag, char * buffer, int
usb_bulk_write(usbprog_jtag->usb_handle, 3, tmp, 3, 1000);
/* INFO("HALLLLOOO3 %i",(int)tmp[0]); */
/* LOG_INFO("HALLLLOOO3 %i",(int)tmp[0]); */
int timeout = 0;
usleep(1);
while (usb_bulk_read(usbprog_jtag->usb_handle, 0x82, tmp, 64, 10) < 1)
@ -672,7 +672,7 @@ void usbprog_jtag_tms_collect(char tms_scan)
void usbprog_jtag_tms_send(struct usbprog_jtag *usbprog_jtag)
{
int i;
/* INFO("TMS SEND"); */
/* LOG_INFO("TMS SEND"); */
if (tms_chain_index > 0)
{
char tmp[tms_chain_index + 2];

18
src/openocd.c
View File

@ -88,10 +88,10 @@ int main(int argc, char *argv[])
if (log_init(cmd_ctx) != ERROR_OK)
return EXIT_FAILURE;
DEBUG("log init complete");
LOG_DEBUG("log init complete");
OUTPUT( OPENOCD_VERSION "\n" );
OUTPUT( "$URL$\n");
LOG_OUTPUT( OPENOCD_VERSION "\n" );
LOG_OUTPUT( "$URL$\n");
cfg_cmd_ctx = copy_command_context(cmd_ctx);
cfg_cmd_ctx->mode = COMMAND_CONFIG;
@ -111,23 +111,23 @@ int main(int argc, char *argv[])
if (jtag_init(cmd_ctx) != ERROR_OK)
return EXIT_FAILURE;
DEBUG("jtag init complete");
LOG_DEBUG("jtag init complete");
if (target_init(cmd_ctx) != ERROR_OK)
return EXIT_FAILURE;
DEBUG("target init complete");
LOG_DEBUG("target init complete");
if (flash_init_drivers(cmd_ctx) != ERROR_OK)
return EXIT_FAILURE;
DEBUG("flash init complete");
LOG_DEBUG("flash init complete");
if (nand_init(cmd_ctx) != ERROR_OK)
return EXIT_FAILURE;
DEBUG("NAND init complete");
LOG_DEBUG("NAND init complete");
if (pld_init(cmd_ctx) != ERROR_OK)
return EXIT_FAILURE;
DEBUG("pld init complete");
LOG_DEBUG("pld init complete");
/* initialize tcp server */
server_init();
@ -139,7 +139,7 @@ int main(int argc, char *argv[])
/* call any target resets */
if (target_init_reset(cmd_ctx) != ERROR_OK)
return EXIT_FAILURE;
DEBUG("target init reset complete");
LOG_DEBUG("target init reset complete");
/* handle network connections */
server_loop(cmd_ctx);

8
src/pld/pld.c
View File

@ -95,7 +95,7 @@ int handle_pld_device_command(struct command_context_s *cmd_ctx, char *cmd, char
if (argc < 1)
{
WARNING("incomplete 'pld bank' configuration");
LOG_WARNING("incomplete 'pld bank' configuration");
return ERROR_OK;
}
@ -108,7 +108,7 @@ int handle_pld_device_command(struct command_context_s *cmd_ctx, char *cmd, char
/* register pld specific commands */
if (pld_drivers[i]->register_commands(cmd_ctx) != ERROR_OK)
{
ERROR("couldn't register '%s' commands", args[0]);
LOG_ERROR("couldn't register '%s' commands", args[0]);
exit(-1);
}
@ -118,7 +118,7 @@ int handle_pld_device_command(struct command_context_s *cmd_ctx, char *cmd, char
if (pld_drivers[i]->pld_device_command(cmd_ctx, cmd, args, argc, c) != ERROR_OK)
{
ERROR("'%s' driver rejected pld device", args[0]);
LOG_ERROR("'%s' driver rejected pld device", args[0]);
free(c);
return ERROR_OK;
}
@ -143,7 +143,7 @@ int handle_pld_device_command(struct command_context_s *cmd_ctx, char *cmd, char
/* no matching pld driver found */
if (!found)
{
ERROR("pld driver '%s' not found", args[0]);
LOG_ERROR("pld driver '%s' not found", args[0]);
exit(-1);
}

4
src/pld/virtex2.c
View File

@ -150,7 +150,7 @@ int virtex2_read_stat(struct pld_device_s *pld_device, u32 *status)
jtag_execute_queue();
DEBUG("status: 0x%8.8x", *status);
LOG_DEBUG("status: 0x%8.8x", *status);
return ERROR_OK;
}
@ -251,7 +251,7 @@ int virtex2_pld_device_command(struct command_context_s *cmd_ctx, char *cmd, cha
if (argc < 2)
{
WARNING("incomplete pld device 'virtex2' configuration");
LOG_WARNING("incomplete pld device 'virtex2' configuration");
return ERROR_PLD_DEVICE_INVALID;
}

14
src/pld/xilinx_bit.c
View File

@ -46,7 +46,7 @@ int read_section(FILE *input_file, int length_size, char section, u32 *buffer_le
if ((length_size != 2) && (length_size != 4))
{
ERROR("BUG: length_size neither 2 nor 4");
LOG_ERROR("BUG: length_size neither 2 nor 4");
return ERROR_PLD_FILE_LOAD_FAILED;
}
@ -94,30 +94,30 @@ int xilinx_read_bit_file(xilinx_bit_file_t *bit_file, char *filename)
if (stat(filename, &input_stat) == -1)
{
ERROR("couldn't stat() %s: %s", filename, strerror(errno));
LOG_ERROR("couldn't stat() %s: %s", filename, strerror(errno));
return ERROR_PLD_FILE_LOAD_FAILED;
}
if (S_ISDIR(input_stat.st_mode))
{
ERROR("%s is a directory", filename);
LOG_ERROR("%s is a directory", filename);
return ERROR_PLD_FILE_LOAD_FAILED;
}
if (input_stat.st_size == 0){
ERROR("Empty file %s", filename);
LOG_ERROR("Empty file %s", filename);
return ERROR_PLD_FILE_LOAD_FAILED;
}
if (!(input_file = fopen(filename, "rb")))
{
ERROR("couldn't open %s: %s", filename, strerror(errno));
LOG_ERROR("couldn't open %s: %s", filename, strerror(errno));
return ERROR_PLD_FILE_LOAD_FAILED;
}
if ((read_count = fread(bit_file->unknown_header, 1, 13, input_file)) != 13)
{
ERROR("couldn't read unknown_header from file '%s'", filename);
LOG_ERROR("couldn't read unknown_header from file '%s'", filename);
return ERROR_PLD_FILE_LOAD_FAILED;
}
@ -136,7 +136,7 @@ int xilinx_read_bit_file(xilinx_bit_file_t *bit_file, char *filename)
if (read_section(input_file, 4, 'e', &bit_file->length, &bit_file->data) != ERROR_OK)
return ERROR_PLD_FILE_LOAD_FAILED;
DEBUG("bit_file: %s %s %s,%s %i", bit_file->source_file, bit_file->part_name,
LOG_DEBUG("bit_file: %s %s %s,%s %i", bit_file->source_file, bit_file->part_name,
bit_file->date, bit_file->time, bit_file->length);
fclose(input_file);

134
src/server/gdb_server.c
View File

@ -85,7 +85,7 @@ int gdb_last_signal(target_t *target)
case DBG_REASON_NOTHALTED:
return 0x0; /* no signal... shouldn't happen */
default:
USER("undefined debug reason %d - target needs reset", target->debug_reason);
LOG_USER("undefined debug reason %d - target needs reset", target->debug_reason);
return 0x0;
}
}
@ -151,7 +151,7 @@ int gdb_get_char(connection_t *connection, int* next_char)
connection->input_pending = 0;
#ifdef _DEBUG_GDB_IO_
DEBUG("returned char '%c' (0x%2.2x)", *next_char, *next_char);
LOG_DEBUG("returned char '%c' (0x%2.2x)", *next_char, *next_char);
#endif
return ERROR_OK;
@ -190,7 +190,7 @@ int gdb_get_char(connection_t *connection, int* next_char)
gdb_con->closed = 1;
return ERROR_SERVER_REMOTE_CLOSED;
default:
ERROR("read: %d", errno);
LOG_ERROR("read: %d", errno);
exit(-1);
}
#else
@ -206,7 +206,7 @@ int gdb_get_char(connection_t *connection, int* next_char)
gdb_con->closed = 1;
return ERROR_SERVER_REMOTE_CLOSED;
default:
ERROR("read: %s", strerror(errno));
LOG_ERROR("read: %s", strerror(errno));
gdb_con->closed = 1;
return ERROR_SERVER_REMOTE_CLOSED;
}
@ -217,7 +217,7 @@ int gdb_get_char(connection_t *connection, int* next_char)
debug_buffer = malloc(gdb_con->buf_cnt + 1);
memcpy(debug_buffer, gdb_con->buffer, gdb_con->buf_cnt);
debug_buffer[gdb_con->buf_cnt] = 0;
DEBUG("received '%s'", debug_buffer);
LOG_DEBUG("received '%s'", debug_buffer);
free(debug_buffer);
#endif
@ -229,7 +229,7 @@ int gdb_get_char(connection_t *connection, int* next_char)
else
connection->input_pending = 0;
#ifdef _DEBUG_GDB_IO_
DEBUG("returned char '%c' (0x%2.2x)", *next_char, *next_char);
LOG_DEBUG("returned char '%c' (0x%2.2x)", *next_char, *next_char);
#endif
return retval;
@ -246,7 +246,7 @@ int gdb_putback_char(connection_t *connection, int last_char)
}
else
{
ERROR("BUG: couldn't put character back");
LOG_ERROR("BUG: couldn't put character back");
}
return ERROR_OK;
@ -299,7 +299,7 @@ int gdb_put_packet_inner(connection_t *connection, char *buffer, int len)
break;
if ((retval = gdb_get_char(connection, &reply)) != ERROR_OK)
return retval;
WARNING("Discard unexpected char %c", reply);
LOG_WARNING("Discard unexpected char %c", reply);
}
#endif
#endif
@ -310,7 +310,7 @@ int gdb_put_packet_inner(connection_t *connection, char *buffer, int len)
debug_buffer = malloc(len + 1);
memcpy(debug_buffer, buffer, len);
debug_buffer[len] = 0;
DEBUG("sending packet '$%s#%2.2x'", debug_buffer, my_checksum);
LOG_DEBUG("sending packet '$%s#%2.2x'", debug_buffer, my_checksum);
free(debug_buffer);
#endif
@ -346,7 +346,7 @@ int gdb_put_packet_inner(connection_t *connection, char *buffer, int len)
{
/* Stop sending output packets for now */
log_remove_callback(gdb_log_callback, connection);
WARNING("negative reply, retrying");
LOG_WARNING("negative reply, retrying");
}
else if (reply == 0x3)
{
@ -359,18 +359,18 @@ int gdb_put_packet_inner(connection_t *connection, char *buffer, int len)
{
/* Stop sending output packets for now */
log_remove_callback(gdb_log_callback, connection);
WARNING("negative reply, retrying");
LOG_WARNING("negative reply, retrying");
}
else
{
ERROR("unknown character 0x%2.2x in reply, dropping connection", reply);
LOG_ERROR("unknown character 0x%2.2x in reply, dropping connection", reply);
gdb_con->closed=1;
return ERROR_SERVER_REMOTE_CLOSED;
}
}
else
{
ERROR("unknown character 0x%2.2x in reply, dropping connection", reply);
LOG_ERROR("unknown character 0x%2.2x in reply, dropping connection", reply);
gdb_con->closed=1;
return ERROR_SERVER_REMOTE_CLOSED;
}
@ -407,7 +407,7 @@ int gdb_get_packet_inner(connection_t *connection, char *buffer, int *len)
return retval;
#ifdef _DEBUG_GDB_IO_
DEBUG("character: '%c'", character);
LOG_DEBUG("character: '%c'", character);
#endif
switch (character)
@ -415,17 +415,17 @@ int gdb_get_packet_inner(connection_t *connection, char *buffer, int *len)
case '$':
break;
case '+':
WARNING("acknowledgment received, but no packet pending");
LOG_WARNING("acknowledgment received, but no packet pending");
break;
case '-':
WARNING("negative acknowledgment, but no packet pending");
LOG_WARNING("negative acknowledgment, but no packet pending");
break;
case 0x3:
gdb_con->ctrl_c = 1;
*len = 0;
return ERROR_OK;
default:
WARNING("ignoring character 0x%x", character);
LOG_WARNING("ignoring character 0x%x", character);
break;
}
} while (character != '$');
@ -486,7 +486,7 @@ int gdb_get_packet_inner(connection_t *connection, char *buffer, int *len)
}
if (count > *len)
{
ERROR("packet buffer too small");
LOG_ERROR("packet buffer too small");
return ERROR_GDB_BUFFER_TOO_SMALL;
}
@ -530,7 +530,7 @@ int gdb_get_packet_inner(connection_t *connection, char *buffer, int *len)
break;
}
WARNING("checksum error, requesting retransmission");
LOG_WARNING("checksum error, requesting retransmission");
gdb_write(connection, "-", 1);
}
if (gdb_con->closed)
@ -573,7 +573,7 @@ int gdb_output_con(connection_t *connection, const char* line)
int gdb_output(struct command_context_s *context, char* line)
{
/* this will be dumped to the log and also sent as an O packet if possible */
USER_N("%s", line);
LOG_USER_N("%s", line);
return ERROR_OK;
}
@ -587,11 +587,11 @@ int gdb_program_handler(struct target_s *target, enum target_event event, void *
script = open_file_from_path(target->gdb_program_script, "r");
if (!script)
{
ERROR("couldn't open script file %s", target->gdb_program_script);
LOG_ERROR("couldn't open script file %s", target->gdb_program_script);
return ERROR_OK;
}
INFO("executing gdb_program script '%s'", target->gdb_program_script);
LOG_INFO("executing gdb_program script '%s'", target->gdb_program_script);
command_run_file(cmd_ctx, script, COMMAND_EXEC);
fclose(script);
@ -732,7 +732,7 @@ int gdb_connection_closed(connection_t *connection)
}
else
{
ERROR("BUG: connection->priv == NULL");
LOG_ERROR("BUG: connection->priv == NULL");
}
target_unregister_event_callback(gdb_target_callback_event_handler, connection);
@ -787,7 +787,7 @@ void gdb_target_to_str(target_t *target, char *tstr, char *str)
if (str_len % 2)
{
ERROR("BUG: gdb value with uneven number of characters encountered");
LOG_ERROR("BUG: gdb value with uneven number of characters encountered");
exit(-1);
}
@ -809,7 +809,7 @@ int gdb_get_registers_packet(connection_t *connection, target_t *target, char* p
int i;
#ifdef _DEBUG_GDB_IO_
DEBUG("-");
LOG_DEBUG("-");
#endif
if ((retval = target->type->get_gdb_reg_list(target, &reg_list, &reg_list_size)) != ERROR_OK)
@ -835,7 +835,7 @@ int gdb_get_registers_packet(connection_t *connection, target_t *target, char* p
{
char *reg_packet_p;
reg_packet_p = strndup(reg_packet, CEIL(reg_packet_size, 8) * 2);
DEBUG("reg_packet: %s", reg_packet_p);
LOG_DEBUG("reg_packet: %s", reg_packet_p);
free(reg_packet_p);
}
#endif
@ -857,7 +857,7 @@ int gdb_set_registers_packet(connection_t *connection, target_t *target, char *p
char *packet_p;
#ifdef _DEBUG_GDB_IO_
DEBUG("-");
LOG_DEBUG("-");
#endif
/* skip command character */
@ -866,7 +866,7 @@ int gdb_set_registers_packet(connection_t *connection, target_t *target, char *p
if (packet_size % 2)
{
WARNING("GDB set_registers packet with uneven characters received, dropping connection");
LOG_WARNING("GDB set_registers packet with uneven characters received, dropping connection");
return ERROR_SERVER_REMOTE_CLOSED;
}
@ -894,7 +894,7 @@ int gdb_set_registers_packet(connection_t *connection, target_t *target, char *p
arch_type = register_get_arch_type(reg_list[i]->arch_type);
if (arch_type == NULL)
{
ERROR("BUG: encountered unregistered arch type");
LOG_ERROR("BUG: encountered unregistered arch type");
exit(-1);
}
arch_type->set(reg_list[i], bin_buf);
@ -923,7 +923,7 @@ int gdb_get_register_packet(connection_t *connection, target_t *target, char *pa
int retval;
#ifdef _DEBUG_GDB_IO_
DEBUG("-");
LOG_DEBUG("-");
#endif
if ((retval = target->type->get_gdb_reg_list(target, &reg_list, &reg_list_size)) != ERROR_OK)
@ -933,7 +933,7 @@ int gdb_get_register_packet(connection_t *connection, target_t *target, char *pa
if (reg_list_size <= reg_num)
{
ERROR("gdb requested a non-existing register");
LOG_ERROR("gdb requested a non-existing register");
exit(-1);
}
@ -960,7 +960,7 @@ int gdb_set_register_packet(connection_t *connection, target_t *target, char *pa
int retval;
reg_arch_type_t *arch_type;
DEBUG("-");
LOG_DEBUG("-");
if ((retval = target->type->get_gdb_reg_list(target, &reg_list, &reg_list_size)) != ERROR_OK)
{
@ -969,13 +969,13 @@ int gdb_set_register_packet(connection_t *connection, target_t *target, char *pa
if (reg_list_size < reg_num)
{
ERROR("gdb requested a non-existing register");
LOG_ERROR("gdb requested a non-existing register");
return ERROR_SERVER_REMOTE_CLOSED;
}
if (*separator != '=')
{
ERROR("GDB 'set register packet', but no '=' following the register number");
LOG_ERROR("GDB 'set register packet', but no '=' following the register number");
return ERROR_SERVER_REMOTE_CLOSED;
}
@ -991,7 +991,7 @@ int gdb_set_register_packet(connection_t *connection, target_t *target, char *pa
arch_type = register_get_arch_type(reg_list[reg_num]->arch_type);
if (arch_type == NULL)
{
ERROR("BUG: encountered unregistered arch type");
LOG_ERROR("BUG: encountered unregistered arch type");
exit(-1);
}
arch_type->set(reg_list[reg_num], bin_buf);
@ -1023,7 +1023,7 @@ int gdb_error(connection_t *connection, int retval)
break;
default:
/* This could be that the target reset itself. */
ERROR("unexpected error %i", retval);
LOG_ERROR("unexpected error %i", retval);
gdb_send_error(connection, EFAULT);
break;
}
@ -1054,7 +1054,7 @@ int gdb_read_memory_packet(connection_t *connection, target_t *target, char *pac
if (*separator != ',')
{
ERROR("incomplete read memory packet received, dropping connection");
LOG_ERROR("incomplete read memory packet received, dropping connection");
return ERROR_SERVER_REMOTE_CLOSED;
}
@ -1062,7 +1062,7 @@ int gdb_read_memory_packet(connection_t *connection, target_t *target, char *pac
buffer = malloc(len);
DEBUG("addr: 0x%8.8x, len: 0x%8.8x", addr, len);
LOG_DEBUG("addr: 0x%8.8x, len: 0x%8.8x", addr, len);
retval = target_read_buffer(target, addr, len, buffer);
@ -1128,7 +1128,7 @@ int gdb_write_memory_packet(connection_t *connection, target_t *target, char *pa
if (*separator != ',')
{
ERROR("incomplete write memory packet received, dropping connection");
LOG_ERROR("incomplete write memory packet received, dropping connection");
return ERROR_SERVER_REMOTE_CLOSED;
}
@ -1136,13 +1136,13 @@ int gdb_write_memory_packet(connection_t *connection, target_t *target, char *pa
if (*(separator++) != ':')
{
ERROR("incomplete write memory packet received, dropping connection");
LOG_ERROR("incomplete write memory packet received, dropping connection");
return ERROR_SERVER_REMOTE_CLOSED;
}
buffer = malloc(len);
DEBUG("addr: 0x%8.8x, len: 0x%8.8x", addr, len);
LOG_DEBUG("addr: 0x%8.8x, len: 0x%8.8x", addr, len);
for (i=0; i<len; i++)
{
@ -1182,7 +1182,7 @@ int gdb_write_memory_binary_packet(connection_t *connection, target_t *target, c
if (*separator != ',')
{
ERROR("incomplete write memory binary packet received, dropping connection");
LOG_ERROR("incomplete write memory binary packet received, dropping connection");
return ERROR_SERVER_REMOTE_CLOSED;
}
@ -1190,14 +1190,14 @@ int gdb_write_memory_binary_packet(connection_t *connection, target_t *target, c
if (*(separator++) != ':')
{
ERROR("incomplete write memory binary packet received, dropping connection");
LOG_ERROR("incomplete write memory binary packet received, dropping connection");
return ERROR_SERVER_REMOTE_CLOSED;
}
retval = ERROR_OK;
if (len)
{
DEBUG("addr: 0x%8.8x, len: 0x%8.8x", addr, len);
LOG_DEBUG("addr: 0x%8.8x, len: 0x%8.8x", addr, len);
retval = target_write_buffer(target, addr, len, (u8*)separator);
}
@ -1220,7 +1220,7 @@ void gdb_step_continue_packet(connection_t *connection, target_t *target, char *
int current = 0;
u32 address = 0x0;
DEBUG("-");
LOG_DEBUG("-");
if (packet_size > 1)
{
@ -1234,12 +1234,12 @@ void gdb_step_continue_packet(connection_t *connection, target_t *target, char *
if (packet[0] == 'c')
{
DEBUG("continue");
LOG_DEBUG("continue");
target->type->resume(target, current, address, 0, 0); /* resume at current address, don't handle breakpoints, not debugging */
}
else if (packet[0] == 's')
{
DEBUG("step");
LOG_DEBUG("step");
target->type->step(target, current, address, 0); /* step at current or address, don't handle breakpoints */
}
}
@ -1254,7 +1254,7 @@ int gdb_breakpoint_watchpoint_packet(connection_t *connection, target_t *target,
char *separator;
int retval;
DEBUG("-");
LOG_DEBUG("-");
type = strtoul(packet + 1, &separator, 16);
@ -1271,7 +1271,7 @@ int gdb_breakpoint_watchpoint_packet(connection_t *connection, target_t *target,
if (*separator != ',')
{
ERROR("incomplete breakpoint/watchpoint packet received, dropping connection");
LOG_ERROR("incomplete breakpoint/watchpoint packet received, dropping connection");
return ERROR_SERVER_REMOTE_CLOSED;
}
@ -1279,7 +1279,7 @@ int gdb_breakpoint_watchpoint_packet(connection_t *connection, target_t *target,
if (*separator != ',')
{
ERROR("incomplete breakpoint/watchpoint packet received, dropping connection");
LOG_ERROR("incomplete breakpoint/watchpoint packet received, dropping connection");
return ERROR_SERVER_REMOTE_CLOSED;
}
@ -1469,7 +1469,7 @@ int gdb_query_packet(connection_t *connection, target_t *target, char *packet, i
if (*separator != ',')
{
ERROR("incomplete read memory packet received, dropping connection");
LOG_ERROR("incomplete read memory packet received, dropping connection");
return ERROR_SERVER_REMOTE_CLOSED;
}
@ -1648,7 +1648,7 @@ int gdb_v_packet(connection_t *connection, target_t *target, char *packet, int p
char *parse = packet + 12;
if (*parse == '\0')
{
ERROR("incomplete vFlashErase packet received, dropping connection");
LOG_ERROR("incomplete vFlashErase packet received, dropping connection");
return ERROR_SERVER_REMOTE_CLOSED;
}
@ -1656,7 +1656,7 @@ int gdb_v_packet(connection_t *connection, target_t *target, char *packet, int p
if (*(parse++) != ',' || *parse == '\0')
{
ERROR("incomplete vFlashErase packet received, dropping connection");
LOG_ERROR("incomplete vFlashErase packet received, dropping connection");
return ERROR_SERVER_REMOTE_CLOSED;
}
@ -1664,7 +1664,7 @@ int gdb_v_packet(connection_t *connection, target_t *target, char *packet, int p
if (*parse != '\0')
{
ERROR("incomplete vFlashErase packet received, dropping connection");
LOG_ERROR("incomplete vFlashErase packet received, dropping connection");
return ERROR_SERVER_REMOTE_CLOSED;
}
@ -1682,7 +1682,7 @@ int gdb_v_packet(connection_t *connection, target_t *target, char *packet, int p
* treat a failed erase as an I/O error
*/
gdb_send_error(connection, EIO);
ERROR("flash_erase returned %i", result);
LOG_ERROR("flash_erase returned %i", result);
}
else
gdb_put_packet(connection, "OK", 2);
@ -1698,13 +1698,13 @@ int gdb_v_packet(connection_t *connection, target_t *target, char *packet, int p
if (*parse == '\0')
{
ERROR("incomplete vFlashErase packet received, dropping connection");
LOG_ERROR("incomplete vFlashErase packet received, dropping connection");
return ERROR_SERVER_REMOTE_CLOSED;
}
addr = strtoul(parse, &parse, 16);
if (*(parse++) != ':')
{
ERROR("incomplete vFlashErase packet received, dropping connection");
LOG_ERROR("incomplete vFlashErase packet received, dropping connection");
return ERROR_SERVER_REMOTE_CLOSED;
}
length = packet_size - (parse - packet);
@ -1739,7 +1739,7 @@ int gdb_v_packet(connection_t *connection, target_t *target, char *packet, int p
}
else
{
DEBUG("wrote %u bytes from vFlash image to flash", written);
LOG_DEBUG("wrote %u bytes from vFlash image to flash", written);
gdb_put_packet(connection, "OK", 2);
}
@ -1816,7 +1816,7 @@ int gdb_input_inner(connection_t *connection)
/* terminate with zero */
packet[packet_size] = 0;
DEBUG("received packet: '%s'", packet);
LOG_DEBUG("received packet: '%s'", packet);
if (packet_size > 0)
{
@ -1894,7 +1894,7 @@ int gdb_input_inner(connection_t *connection)
break;
default:
/* ignore unkown packets */
DEBUG("ignoring 0x%2.2x packet", packet[0]);
LOG_DEBUG("ignoring 0x%2.2x packet", packet[0]);
gdb_put_packet(connection, NULL, 0);
break;
}
@ -1941,13 +1941,13 @@ int gdb_init()
if (!target)
{
WARNING("no gdb ports allocated as no target has been specified");
LOG_WARNING("no gdb ports allocated as no target has been specified");
return ERROR_OK;
}
if (gdb_port == 0)
{
WARNING("no gdb port specified, using default port 3333");
LOG_WARNING("no gdb port specified, using default port 3333");
gdb_port = 3333;
}
@ -1962,7 +1962,7 @@ int gdb_init()
add_service("gdb", CONNECTION_GDB, gdb_port + i, 1, gdb_new_connection, gdb_input, gdb_connection_closed, gdb_service);
DEBUG("gdb service for target %s at port %i", target->type->name, gdb_port + i);
LOG_DEBUG("gdb service for target %s at port %i", target->type->name, gdb_port + i);
i++;
target = target->next;
@ -2010,7 +2010,7 @@ int handle_gdb_detach_command(struct command_context_s *cmd_ctx, char *cmd, char
}
}
WARNING("invalid gdb_detach configuration directive: %s", args[0]);
LOG_WARNING("invalid gdb_detach configuration directive: %s", args[0]);
return ERROR_OK;
}
@ -2030,7 +2030,7 @@ int handle_gdb_memory_map_command(struct command_context_s *cmd_ctx, char *cmd,
}
}
WARNING("invalid gdb_memory_map configuration directive: %s", args[0]);
LOG_WARNING("invalid gdb_memory_map configuration directive: %s", args[0]);
return ERROR_OK;
}
@ -2050,7 +2050,7 @@ int handle_gdb_flash_program_command(struct command_context_s *cmd_ctx, char *cm
}
}
WARNING("invalid gdb_memory_map configuration directive: %s", args[0]);
LOG_WARNING("invalid gdb_memory_map configuration directive: %s", args[0]);
return ERROR_OK;
}
@ -2070,7 +2070,7 @@ int handle_gdb_report_data_abort_command(struct command_context_s *cmd_ctx, char
}
}
WARNING("invalid gdb_report_data_abort configuration directive: %s", args[0]);
LOG_WARNING("invalid gdb_report_data_abort configuration directive: %s", args[0]);
return ERROR_OK;
}

22
src/server/server.c
View File

@ -63,14 +63,14 @@ int add_connection(service_t *service, command_context_t *cmd_ctx)
c->fd = accept(service->fd, (struct sockaddr *)&service->sin, &address_size);
INFO("accepting '%s' connection from %i", service->name, c->sin.sin_port);
LOG_INFO("accepting '%s' connection from %i", service->name, c->sin.sin_port);
if ((retval = service->new_connection(c)) == ERROR_OK)
{
}
else
{
close_socket(c->fd);
ERROR("attempted '%s' connection rejected", service->name);
LOG_ERROR("attempted '%s' connection rejected", service->name);
free(c);
return retval;
}
@ -134,7 +134,7 @@ int add_service(char *name, enum connection_type type, unsigned short port, int
if ((c->fd = socket(AF_INET, SOCK_STREAM, 0)) == -1)
{
ERROR("error creating socket: %s", strerror(errno));
LOG_ERROR("error creating socket: %s", strerror(errno));
exit(-1);
}
@ -149,13 +149,13 @@ int add_service(char *name, enum connection_type type, unsigned short port, int
if (bind(c->fd, (struct sockaddr *)&c->sin, sizeof(c->sin)) == -1)
{
ERROR("couldn't bind to socket: %s", strerror(errno));
LOG_ERROR("couldn't bind to socket: %s", strerror(errno));
exit(-1);
}
if (listen(c->fd, 1) == -1)
{
ERROR("couldn't listen on socket: %s", strerror(errno));
LOG_ERROR("couldn't listen on socket: %s", strerror(errno));
exit(-1);
}
@ -235,7 +235,7 @@ int server_loop(command_context_t *command_context)
#ifndef _WIN32
if (signal(SIGPIPE, SIG_IGN) == SIG_ERR)
ERROR("couldn't set SIGPIPE to SIG_IGN");
LOG_ERROR("couldn't set SIGPIPE to SIG_IGN");
#endif
/* do regular tasks after at most 10ms */
@ -291,7 +291,7 @@ int server_loop(command_context_t *command_context)
FD_ZERO(&read_fds);
else
{
ERROR("error during select: %s", strerror(errno));
LOG_ERROR("error during select: %s", strerror(errno));
exit(-1);
}
#else
@ -302,7 +302,7 @@ int server_loop(command_context_t *command_context)
}
else
{
ERROR("error during select: %s", strerror(errno));
LOG_ERROR("error during select: %s", strerror(errno));
exit(-1);
}
#endif
@ -335,7 +335,7 @@ int server_loop(command_context_t *command_context)
int tmp_fd;
tmp_fd = accept(service->fd, (struct sockaddr *)&service->sin, &address_size);
close_socket(tmp_fd);
INFO("rejected '%s' connection, no more connections allowed", service->name);
LOG_INFO("rejected '%s' connection, no more connections allowed", service->name);
}
}
@ -352,7 +352,7 @@ int server_loop(command_context_t *command_context)
{
connection_t *next = c->next;
remove_connection(service, c);
INFO("dropped '%s' connection", service->name);
LOG_INFO("dropped '%s' connection", service->name);
c = next;
continue;
}
@ -405,7 +405,7 @@ int server_init()
if (WSAStartup(wVersionRequested, &wsaData) != 0)
{
ERROR("Failed to Open Winsock");
LOG_ERROR("Failed to Open Winsock");
exit(-1);
}

12
src/server/telnet_server.c
View File

@ -234,7 +234,7 @@ int telnet_input(connection_t *connection)
return ERROR_SERVER_REMOTE_CLOSED;
else if (bytes_read == -1)
{
ERROR("error during read: %s", strerror(errno));
LOG_ERROR("error during read: %s", strerror(errno));
return ERROR_SERVER_REMOTE_CLOSED;
}
@ -413,7 +413,7 @@ int telnet_input(connection_t *connection)
}
else
{
DEBUG("unhandled nonprintable: %2.2x", *buf_p);
LOG_DEBUG("unhandled nonprintable: %2.2x", *buf_p);
}
}
}
@ -546,13 +546,13 @@ int telnet_input(connection_t *connection)
}
else
{
ERROR("BUG: unexpected value in t_con->last_escape");
LOG_ERROR("BUG: unexpected value in t_con->last_escape");
t_con->state = TELNET_STATE_DATA;
}
break;
default:
ERROR("unknown telnet state");
LOG_ERROR("unknown telnet state");
exit(-1);
}
@ -595,7 +595,7 @@ int telnet_connection_closed(connection_t *connection)
}
else
{
ERROR("BUG: connection->priv == NULL");
LOG_ERROR("BUG: connection->priv == NULL");
}
target_unregister_event_callback(telnet_target_callback_event_handler, connection->cmd_ctx);
@ -621,7 +621,7 @@ int telnet_init(char *banner)
if (telnet_port == 0)
{
WARNING("no telnet port specified, using default port 4444");
LOG_WARNING("no telnet port specified, using default port 4444");
telnet_port = 4444;
}

120
src/target/arm11.c
View File

@ -34,13 +34,13 @@
#if 0
#define FNC_INFO DEBUG("-")
#define FNC_INFO LOG_DEBUG("-")
#else
#define FNC_INFO
#endif
#if 1
#define FNC_INFO_NOTIMPLEMENTED do { DEBUG("NOT IMPLEMENTED"); /*exit(-1);*/ } while (0)
#define FNC_INFO_NOTIMPLEMENTED do { LOG_DEBUG("NOT IMPLEMENTED"); /*exit(-1);*/ } while (0)
#else
#define FNC_INFO_NOTIMPLEMENTED
#endif
@ -324,7 +324,7 @@ void arm11_check_init(arm11_common_t * arm11, u32 * dscr)
if (!(*dscr & ARM11_DSCR_MODE_SELECT))
{
DEBUG("Bringing target into debug mode");
LOG_DEBUG("Bringing target into debug mode");
*dscr |= ARM11_DSCR_MODE_SELECT; /* Halt debug-mode */
arm11_write_DSCR(arm11, *dscr);
@ -428,7 +428,7 @@ static void arm11_on_enter_debug_state(arm11_common_t * arm11)
u32 dscr = arm11_read_DSCR(arm11);
DEBUG("DRAIN, DSCR %08x", dscr);
LOG_DEBUG("DRAIN, DSCR %08x", dscr);
if (dscr & ARM11_DSCR_STICKY_IMPRECISE_DATA_ABORT)
{
@ -436,7 +436,7 @@ static void arm11_on_enter_debug_state(arm11_common_t * arm11)
dscr = arm11_read_DSCR(arm11);
DEBUG("DRAIN, DSCR %08x (DONE)", dscr);
LOG_DEBUG("DRAIN, DSCR %08x (DONE)", dscr);
break;
}
@ -502,7 +502,7 @@ static void arm11_on_enter_debug_state(arm11_common_t * arm11)
{
arm11->simulate_reset_on_next_halt = false;
DEBUG("Reset c1 Control Register");
LOG_DEBUG("Reset c1 Control Register");
/* Write 0 (reset value) to Control register 0 to disable MMU/Cache etc. */
@ -524,18 +524,18 @@ void arm11_dump_reg_changes(arm11_common_t * arm11)
if (!arm11->reg_list[i].valid)
{
if (arm11->reg_history[i].valid)
INFO("%8s INVALID (%08x)", arm11_reg_defs[i].name, arm11->reg_history[i].value);
LOG_INFO("%8s INVALID (%08x)", arm11_reg_defs[i].name, arm11->reg_history[i].value);
}
else
{
if (arm11->reg_history[i].valid)
{
if (arm11->reg_history[i].value != arm11->reg_values[i])
INFO("%8s %08x (%08x)", arm11_reg_defs[i].name, arm11->reg_values[i], arm11->reg_history[i].value);
LOG_INFO("%8s %08x (%08x)", arm11_reg_defs[i].name, arm11->reg_values[i], arm11->reg_history[i].value);
}
else
{
INFO("%8s %08x (INVALID)", arm11_reg_defs[i].name, arm11->reg_values[i]);
LOG_INFO("%8s %08x (INVALID)", arm11_reg_defs[i].name, arm11->reg_values[i]);
}
}
}}
@ -565,7 +565,7 @@ void arm11_leave_debug_state(arm11_common_t * arm11)
/* MRC p14,0,r?,c0,c5,0 */
arm11_run_instr_data_to_core1(arm11, 0xee100e15 | (i << 12), R(RX + i));
// DEBUG("RESTORE R" ZU " %08x", i, R(RX + i));
// LOG_DEBUG("RESTORE R" ZU " %08x", i, R(RX + i));
}}
arm11_run_instr_data_finish(arm11);
@ -579,7 +579,7 @@ void arm11_leave_debug_state(arm11_common_t * arm11)
if (DSCR & (ARM11_DSCR_RDTR_FULL | ARM11_DSCR_WDTR_FULL))
{
ERROR("wDTR/rDTR inconsistent (DSCR %08x)", DSCR);
LOG_ERROR("wDTR/rDTR inconsistent (DSCR %08x)", DSCR);
}
}
@ -667,7 +667,7 @@ int arm11_poll(struct target_s *target)
u32 dscr = arm11_read_DSCR(arm11);
DEBUG("DSCR %08x", dscr);
LOG_DEBUG("DSCR %08x", dscr);
arm11_check_init(arm11, &dscr);
@ -677,7 +677,7 @@ int arm11_poll(struct target_s *target)
{
enum target_state old_state = target->state;
DEBUG("enter TARGET_HALTED");
LOG_DEBUG("enter TARGET_HALTED");
target->state = TARGET_HALTED;
target->debug_reason = arm11_get_DSCR_debug_reason(dscr);
arm11_on_enter_debug_state(arm11);
@ -690,7 +690,7 @@ int arm11_poll(struct target_s *target)
{
if (target->state != TARGET_RUNNING && target->state != TARGET_DEBUG_RUNNING)
{
DEBUG("enter TARGET_RUNNING");
LOG_DEBUG("enter TARGET_RUNNING");
target->state = TARGET_RUNNING;
target->debug_reason = DBG_REASON_NOTHALTED;
}
@ -724,7 +724,7 @@ int arm11_halt(struct target_s *target)
arm11_common_t * arm11 = target->arch_info;
DEBUG("target->state: %s", target_state_strings[target->state]);
LOG_DEBUG("target->state: %s", target_state_strings[target->state]);
if (target->state == TARGET_UNKNOWN)
{
@ -733,7 +733,7 @@ int arm11_halt(struct target_s *target)
if (target->state == TARGET_HALTED)
{
WARNING("target was already halted");
LOG_WARNING("target was already halted");
return ERROR_OK;
}
@ -775,23 +775,23 @@ int arm11_resume(struct target_s *target, int current, u32 address, int handle_b
{
FNC_INFO;
// DEBUG("current %d address %08x handle_breakpoints %d debug_execution %d",
// LOG_DEBUG("current %d address %08x handle_breakpoints %d debug_execution %d",
// current, address, handle_breakpoints, debug_execution);
arm11_common_t * arm11 = target->arch_info;
DEBUG("target->state: %s", target_state_strings[target->state]);
LOG_DEBUG("target->state: %s", target_state_strings[target->state]);
if (target->state != TARGET_HALTED)
{
WARNING("target was not halted");
LOG_WARNING("target was not halted");
return ERROR_TARGET_NOT_HALTED;
}
if (!current)
R(PC) = address;
INFO("RESUME PC %08x%s", R(PC), !current ? "!" : "");
LOG_INFO("RESUME PC %08x%s", R(PC), !current ? "!" : "");
/* clear breakpoints/watchpoints and VCR*/
arm11_sc7_clear_vbw(arm11);
@ -807,7 +807,7 @@ int arm11_resume(struct target_s *target, int current, u32 address, int handle_b
{
if (bp->address == R(PC))
{
DEBUG("must step over %08x", bp->address);
LOG_DEBUG("must step over %08x", bp->address);
arm11_step(target, 1, 0, 0);
break;
}
@ -830,7 +830,7 @@ int arm11_resume(struct target_s *target, int current, u32 address, int handle_b
arm11_sc7_run(arm11, brp, asizeof(brp));
DEBUG("Add BP " ZU " at %08x", brp_num, bp->address);
LOG_DEBUG("Add BP " ZU " at %08x", brp_num, bp->address);
brp_num++;
}
@ -849,7 +849,7 @@ int arm11_resume(struct target_s *target, int current, u32 address, int handle_b
{
u32 dscr = arm11_read_DSCR(arm11);
DEBUG("DSCR %08x", dscr);
LOG_DEBUG("DSCR %08x", dscr);
if (dscr & ARM11_DSCR_CORE_RESTARTED)
break;
@ -875,11 +875,11 @@ int arm11_step(struct target_s *target, int current, u32 address, int handle_bre
{
FNC_INFO;
DEBUG("target->state: %s", target_state_strings[target->state]);
LOG_DEBUG("target->state: %s", target_state_strings[target->state]);
if (target->state != TARGET_HALTED)
{
WARNING("target was not halted");
LOG_WARNING("target was not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -888,7 +888,7 @@ int arm11_step(struct target_s *target, int current, u32 address, int handle_bre
if (!current)
R(PC) = address;
INFO("STEP PC %08x%s", R(PC), !current ? "!" : "");
LOG_INFO("STEP PC %08x%s", R(PC), !current ? "!" : "");
/** \todo TODO: Thumb not supported here */
@ -902,7 +902,7 @@ int arm11_step(struct target_s *target, int current, u32 address, int handle_bre
R(PC) += 4;
arm11->reg_list[ARM11_RC_PC].valid = 1;
arm11->reg_list[ARM11_RC_PC].dirty = 0;
INFO("Skipping BKPT");
LOG_INFO("Skipping BKPT");
}
/* skip over Wait for interrupt / Standby */
/* mcr 15, 0, r?, cr7, cr0, {4} */
@ -911,12 +911,12 @@ int arm11_step(struct target_s *target, int current, u32 address, int handle_bre
R(PC) += 4;
arm11->reg_list[ARM11_RC_PC].valid = 1;
arm11->reg_list[ARM11_RC_PC].dirty = 0;
INFO("Skipping WFI");
LOG_INFO("Skipping WFI");
}
/* ignore B to self */
else if ((next_instruction & 0xFEFFFFFF) == 0xeafffffe)
{
INFO("Not stepping jump to self");
LOG_INFO("Not stepping jump to self");
}
else
{
@ -956,7 +956,7 @@ int arm11_step(struct target_s *target, int current, u32 address, int handle_bre
{
u32 dscr = arm11_read_DSCR(arm11);
DEBUG("DSCR %08x", dscr);
LOG_DEBUG("DSCR %08x", dscr);
if ((dscr & (ARM11_DSCR_CORE_RESTARTED | ARM11_DSCR_CORE_HALTED)) ==
(ARM11_DSCR_CORE_RESTARTED | ARM11_DSCR_CORE_HALTED))
@ -1003,7 +1003,7 @@ int arm11_deassert_reset(struct target_s *target)
FNC_INFO;
#if 0
DEBUG("target->state: %s", target_state_strings[target->state]);
LOG_DEBUG("target->state: %s", target_state_strings[target->state]);
/* deassert reset lines */
jtag_add_reset(0, 0);
@ -1077,11 +1077,11 @@ int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count,
if (target->state != TARGET_HALTED)
{
WARNING("target was not halted");
LOG_WARNING("target was not halted");
return ERROR_TARGET_NOT_HALTED;
}
DEBUG("ADDR %08x SIZE %08x COUNT %08x", address, size, count);
LOG_DEBUG("ADDR %08x SIZE %08x COUNT %08x", address, size, count);
arm11_common_t * arm11 = target->arch_info;
@ -1152,11 +1152,11 @@ int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count
if (target->state != TARGET_HALTED)
{
WARNING("target was not halted");
LOG_WARNING("target was not halted");
return ERROR_TARGET_NOT_HALTED;
}
DEBUG("ADDR %08x SIZE %08x COUNT %08x", address, size, count);
LOG_DEBUG("ADDR %08x SIZE %08x COUNT %08x", address, size, count);
arm11_common_t * arm11 = target->arch_info;
@ -1230,10 +1230,10 @@ int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count
if (address + size * count != r0)
{
ERROR("Data transfer failed. (%d)", (r0 - address) - size * count);
LOG_ERROR("Data transfer failed. (%d)", (r0 - address) - size * count);
if (arm11_config_memwrite_burst)
ERROR("use 'arm11 memwrite burst disable' to disable fast burst mode");
LOG_ERROR("use 'arm11 memwrite burst disable' to disable fast burst mode");
if (arm11_config_memwrite_error_fatal)
exit(-1);
@ -1258,7 +1258,7 @@ int arm11_bulk_write_memory(struct target_s *target, u32 address, u32 count, u8
if (target->state != TARGET_HALTED)
{
WARNING("target was not halted");
LOG_WARNING("target was not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -1286,20 +1286,20 @@ int arm11_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
#if 0
if (breakpoint->type == BKPT_SOFT)
{
INFO("sw breakpoint requested, but software breakpoints not enabled");
LOG_INFO("sw breakpoint requested, but software breakpoints not enabled");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
#endif
if (!arm11->free_brps)
{
INFO("no breakpoint unit available for hardware breakpoint");
LOG_INFO("no breakpoint unit available for hardware breakpoint");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
if (breakpoint->length != 4)
{
INFO("only breakpoints of four bytes length supported");
LOG_INFO("only breakpoints of four bytes length supported");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
@ -1348,7 +1348,7 @@ int arm11_target_command(struct command_context_s *cmd_ctx, char *cmd, char **ar
if (argc < 4)
{
ERROR("'target arm11' 4th argument <jtag chain pos>");
LOG_ERROR("'target arm11' 4th argument <jtag chain pos>");
exit(-1);
}
@ -1368,7 +1368,7 @@ int arm11_target_command(struct command_context_s *cmd_ctx, char *cmd, char **ar
if (device->ir_length != 5)
{
ERROR("'target arm11' expects 'jtag_device 5 0x01 0x1F 0x1E'");
LOG_ERROR("'target arm11' expects 'jtag_device 5 0x01 0x1F 0x1E'");
exit(-1);
}
@ -1411,12 +1411,12 @@ int arm11_init_target(struct command_context_s *cmd_ctx, struct target_s *target
switch (arm11->device_id & 0x0FFFF000)
{
case 0x07B36000: INFO("found ARM1136"); break;
case 0x07B56000: INFO("found ARM1156"); break;
case 0x07B76000: INFO("found ARM1176"); break;
case 0x07B36000: LOG_INFO("found ARM1136"); break;
case 0x07B56000: LOG_INFO("found ARM1156"); break;
case 0x07B76000: LOG_INFO("found ARM1176"); break;
default:
{
ERROR("'target arm11' expects IDCODE 0x*7B*7****");
LOG_ERROR("'target arm11' expects IDCODE 0x*7B*7****");
exit(-1);
}
}
@ -1426,7 +1426,7 @@ int arm11_init_target(struct command_context_s *cmd_ctx, struct target_s *target
if (arm11->debug_version != ARM11_DEBUG_V6 &&
arm11->debug_version != ARM11_DEBUG_V61)
{
ERROR("Only ARMv6 v6 and v6.1 architectures supported.");
LOG_ERROR("Only ARMv6 v6 and v6.1 architectures supported.");
exit(-1);
}
@ -1438,7 +1438,7 @@ int arm11_init_target(struct command_context_s *cmd_ctx, struct target_s *target
arm11->free_brps = arm11->brp;
arm11->free_wrps = arm11->wrp;
DEBUG("IDCODE %08x IMPLEMENTOR %02x DIDR %08x",
LOG_DEBUG("IDCODE %08x IMPLEMENTOR %02x DIDR %08x",
arm11->device_id,
arm11->implementor,
arm11->didr);
@ -1472,7 +1472,7 @@ int arm11_get_reg(reg_t *reg)
if (target->state != TARGET_HALTED)
{
WARNING("target was not halted");
LOG_WARNING("target was not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -1535,7 +1535,7 @@ void arm11_build_reg_cache(target_t *target)
ARM11_REGCACHE_COUNT != asizeof(arm11_reg_defs) ||
ARM11_REGCACHE_COUNT != ARM11_RC_MAX)
{
ERROR("arm11->reg_values inconsistent (%d " ZU " " ZU " %d)", ARM11_REGCACHE_COUNT, asizeof(arm11->reg_values), asizeof(arm11_reg_defs), ARM11_RC_MAX);
LOG_ERROR("arm11->reg_values inconsistent (%d " ZU " " ZU " %d)", ARM11_REGCACHE_COUNT, asizeof(arm11->reg_values), asizeof(arm11_reg_defs), ARM11_RC_MAX);
exit(-1);
}
@ -1566,7 +1566,7 @@ int arm11_handle_bool(struct command_context_s *cmd_ctx, char *cmd, char **args,
{
if (argc == 0)
{
INFO("%s is %s.", name, *var ? "enabled" : "disabled");
LOG_INFO("%s is %s.", name, *var ? "enabled" : "disabled");
return ERROR_OK;
}
@ -1592,7 +1592,7 @@ int arm11_handle_bool(struct command_context_s *cmd_ctx, char *cmd, char **args,
break;
}
INFO("%s %s.", *var ? "Enabled" : "Disabled", name);
LOG_INFO("%s %s.", *var ? "Enabled" : "Disabled", name);
return ERROR_OK;
}
@ -1633,7 +1633,7 @@ int arm11_handle_vcr(struct command_context_s *cmd_ctx, char *cmd, char **args,
return ERROR_COMMAND_SYNTAX_ERROR;
}
INFO("VCR 0x%08X", arm11_vcr);
LOG_INFO("VCR 0x%08X", arm11_vcr);
return ERROR_OK;
}
@ -1676,7 +1676,7 @@ int arm11_handle_mrc_mcr(struct command_context_s *cmd_ctx, char *cmd, char **ar
{
if (argc != (read ? 6 : 7))
{
ERROR("Invalid number of arguments. %s", read ? arm11_mrc_syntax : arm11_mcr_syntax);
LOG_ERROR("Invalid number of arguments. %s", read ? arm11_mrc_syntax : arm11_mcr_syntax);
return -1;
}
@ -1684,7 +1684,7 @@ int arm11_handle_mrc_mcr(struct command_context_s *cmd_ctx, char *cmd, char **ar
if (!arm11)
{
ERROR("Parameter 1 is not a the JTAG chain position of an ARM11 device. %s",
LOG_ERROR("Parameter 1 is not a the JTAG chain position of an ARM11 device. %s",
read ? arm11_mrc_syntax : arm11_mcr_syntax);
return -1;
@ -1693,7 +1693,7 @@ int arm11_handle_mrc_mcr(struct command_context_s *cmd_ctx, char *cmd, char **ar
if (arm11->target->state != TARGET_HALTED)
{
WARNING("target was not halted");
LOG_WARNING("target was not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -1707,7 +1707,7 @@ int arm11_handle_mrc_mcr(struct command_context_s *cmd_ctx, char *cmd, char **ar
if (values[i] > arm11_coproc_instruction_limits[i])
{
ERROR("Parameter %d out of bounds (%d max). %s",
LOG_ERROR("Parameter %d out of bounds (%d max). %s",
i + 2, arm11_coproc_instruction_limits[i],
read ? arm11_mrc_syntax : arm11_mcr_syntax);
return -1;
@ -1732,14 +1732,14 @@ int arm11_handle_mrc_mcr(struct command_context_s *cmd_ctx, char *cmd, char **ar
u32 result;
arm11_run_instr_data_from_core_via_r0(arm11, instr, &result);
INFO("MRC p%d, %d, R0, c%d, c%d, %d = 0x%08x (%d)",
LOG_INFO("MRC p%d, %d, R0, c%d, c%d, %d = 0x%08x (%d)",
values[0], values[1], values[2], values[3], values[4], result, result);
}
else
{
arm11_run_instr_data_to_core_via_r0(arm11, instr, values[5]);
INFO("MRC p%d, %d, R0 (#0x%08x), c%d, c%d, %d",
LOG_INFO("MRC p%d, %d, R0 (#0x%08x), c%d, c%d, %d",
values[0], values[1],
values[5],
values[2], values[3], values[4]);

22
src/target/arm11_dbgtap.c
View File

@ -128,7 +128,7 @@ static int arm11_in_handler_SCAN_N(u8 *in_value, void *priv, struct scan_field_s
if (v != 0x10)
{
ERROR("'arm11 target' JTAG communication error SCREG SCAN OUT 0x%02x (expected 0x10)", v);
LOG_ERROR("'arm11 target' JTAG communication error SCREG SCAN OUT 0x%02x (expected 0x10)", v);
exit(-1);
}
@ -277,31 +277,31 @@ enum target_debug_reason arm11_get_DSCR_debug_reason(u32 dscr)
switch (dscr & ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_MASK)
{
case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_HALT:
INFO("Debug entry: JTAG HALT");
LOG_INFO("Debug entry: JTAG HALT");
return DBG_REASON_DBGRQ;
case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_BREAKPOINT:
INFO("Debug entry: breakpoint");
LOG_INFO("Debug entry: breakpoint");
return DBG_REASON_BREAKPOINT;
case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_WATCHPOINT:
INFO("Debug entry: watchpoint");
LOG_INFO("Debug entry: watchpoint");
return DBG_REASON_WATCHPOINT;
case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_BKPT_INSTRUCTION:
INFO("Debug entry: BKPT instruction");
LOG_INFO("Debug entry: BKPT instruction");
return DBG_REASON_BREAKPOINT;
case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_EDBGRQ:
INFO("Debug entry: EDBGRQ signal");
LOG_INFO("Debug entry: EDBGRQ signal");
return DBG_REASON_DBGRQ;
case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_VECTOR_CATCH:
INFO("Debug entry: VCR vector catch");
LOG_INFO("Debug entry: VCR vector catch");
return DBG_REASON_BREAKPOINT;
default:
INFO("Debug entry: unknown");
LOG_INFO("Debug entry: unknown");
return DBG_REASON_DBGRQ;
}
};
@ -541,7 +541,7 @@ void arm11_run_instr_data_to_core_noack(arm11_common_t * arm11, u32 opcode, u32
}}
if (error_count)
ERROR("Transfer errors " ZU, error_count);
LOG_ERROR("Transfer errors " ZU, error_count);
}
@ -707,7 +707,7 @@ void arm11_sc7_run(arm11_common_t * arm11, arm11_sc7_action_t * actions, size_t
{
if (actions[i - 1].address != AddressIn)
{
WARNING("Scan chain 7 shifted out unexpected address");
LOG_WARNING("Scan chain 7 shifted out unexpected address");
}
if (!actions[i - 1].write)
@ -718,7 +718,7 @@ void arm11_sc7_run(arm11_common_t * arm11, arm11_sc7_action_t * actions, size_t
{
if (actions[i - 1].value != DataIn)
{
WARNING("Scan chain 7 shifted out unexpected data");
LOG_WARNING("Scan chain 7 shifted out unexpected data");
}
}
}

16
src/target/arm720t.c
View File

@ -136,11 +136,11 @@ int arm720t_scan_cp15(target_t *target, u32 out, u32 *in, int instruction, int c
jtag_execute_queue();
if (in)
DEBUG("out: %8.8x, in: %8.8x, instruction: %i, clock: %i", out, *in, instruction, clock);
LOG_DEBUG("out: %8.8x, in: %8.8x, instruction: %i, clock: %i", out, *in, instruction, clock);
else
DEBUG("out: %8.8x, instruction: %i, clock: %i", out, instruction, clock);
LOG_DEBUG("out: %8.8x, instruction: %i, clock: %i", out, instruction, clock);
#else
DEBUG("out: %8.8x, instruction: %i, clock: %i", out, instruction, clock);
LOG_DEBUG("out: %8.8x, instruction: %i, clock: %i", out, instruction, clock);
#endif
return ERROR_OK;
@ -235,7 +235,7 @@ void arm720t_post_debug_entry(target_t *target)
/* examine cp15 control reg */
arm720t_read_cp15(target, 0xee110f10, &arm720t->cp15_control_reg);
jtag_execute_queue();
DEBUG("cp15_control_reg: %8.8x", arm720t->cp15_control_reg);
LOG_DEBUG("cp15_control_reg: %8.8x", arm720t->cp15_control_reg);
arm720t->armv4_5_mmu.mmu_enabled = (arm720t->cp15_control_reg & 0x1U) ? 1 : 0;
arm720t->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled = (arm720t->cp15_control_reg & 0x4U) ? 1 : 0;
@ -311,11 +311,11 @@ int arm720t_arch_state(struct target_s *target)
if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
{
ERROR("BUG: called for a non-ARMv4/5 target");
LOG_ERROR("BUG: called for a non-ARMv4/5 target");
exit(-1);
}
USER("target halted in %s state due to %s, current mode: %s\n"
LOG_USER("target halted in %s state due to %s, current mode: %s\n"
"cpsr: 0x%8.8x pc: 0x%8.8x\n"
"MMU: %s, Cache: %s",
armv4_5_state_strings[armv4_5->core_state],
@ -448,7 +448,7 @@ int arm720t_target_command(struct command_context_s *cmd_ctx, char *cmd, char **
if (argc < 4)
{
ERROR("'target arm720t' requires at least one additional argument");
LOG_ERROR("'target arm720t' requires at least one additional argument");
exit(-1);
}
@ -457,7 +457,7 @@ int arm720t_target_command(struct command_context_s *cmd_ctx, char *cmd, char **
if (argc >= 5)
variant = args[4];
DEBUG("chain_pos: %i, variant: %s", chain_pos, variant);
LOG_DEBUG("chain_pos: %i, variant: %s", chain_pos, variant);
arm720t_init_arch_info(target, arm720t, chain_pos, variant);

182
src/target/arm7_9_common.c
View File

@ -135,7 +135,7 @@ int arm7_9_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -144,7 +144,7 @@ int arm7_9_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
if (breakpoint->set)
{
WARNING("breakpoint already set");
LOG_WARNING("breakpoint already set");
return ERROR_OK;
}
@ -178,7 +178,7 @@ int arm7_9_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
}
else
{
ERROR("BUG: no hardware comparator available");
LOG_ERROR("BUG: no hardware comparator available");
return ERROR_OK;
}
}
@ -195,7 +195,7 @@ int arm7_9_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
target->type->read_memory(target, breakpoint->address, 4, 1, (u8 *)&verify);
if (verify != arm7_9->arm_bkpt)
{
ERROR("Unable to set 32 bit software breakpoint at address %08x", breakpoint->address);
LOG_ERROR("Unable to set 32 bit software breakpoint at address %08x", breakpoint->address);
return ERROR_OK;
}
}
@ -210,7 +210,7 @@ int arm7_9_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
target->type->read_memory(target, breakpoint->address, 2, 1, (u8 *)&verify);
if (verify != arm7_9->thumb_bkpt)
{
ERROR("Unable to set thumb software breakpoint at address %08x", breakpoint->address);
LOG_ERROR("Unable to set thumb software breakpoint at address %08x", breakpoint->address);
return ERROR_OK;
}
}
@ -228,13 +228,13 @@ int arm7_9_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
if (!breakpoint->set)
{
WARNING("breakpoint not set");
LOG_WARNING("breakpoint not set");
return ERROR_OK;
}
@ -286,31 +286,31 @@ int arm7_9_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
if (arm7_9->force_hw_bkpts)
{
DEBUG("forcing use of hardware breakpoint at address 0x%8.8x", breakpoint->address);
LOG_DEBUG("forcing use of hardware breakpoint at address 0x%8.8x", breakpoint->address);
breakpoint->type = BKPT_HARD;
}
if ((breakpoint->type == BKPT_SOFT) && (arm7_9->sw_bkpts_enabled == 0))
{
INFO("sw breakpoint requested, but software breakpoints not enabled");
LOG_INFO("sw breakpoint requested, but software breakpoints not enabled");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
if ((breakpoint->type == BKPT_HARD) && (arm7_9->wp_available < 1))
{
INFO("no watchpoint unit available for hardware breakpoint");
LOG_INFO("no watchpoint unit available for hardware breakpoint");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
if ((breakpoint->length != 2) && (breakpoint->length != 4))
{
INFO("only breakpoints of two (Thumb) or four (ARM) bytes length supported");
LOG_INFO("only breakpoints of two (Thumb) or four (ARM) bytes length supported");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
@ -327,7 +327,7 @@ int arm7_9_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -353,7 +353,7 @@ int arm7_9_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -392,7 +392,7 @@ int arm7_9_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
}
else
{
ERROR("BUG: no hardware comparator available");
LOG_ERROR("BUG: no hardware comparator available");
return ERROR_OK;
}
@ -406,13 +406,13 @@ int arm7_9_unset_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
if (!watchpoint->set)
{
WARNING("breakpoint not set");
LOG_WARNING("breakpoint not set");
return ERROR_OK;
}
@ -440,7 +440,7 @@ int arm7_9_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -466,7 +466,7 @@ int arm7_9_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -491,7 +491,7 @@ int arm7_9_enable_sw_bkpts(struct target_s *target)
if (arm7_9->wp_available < 1)
{
WARNING("can't enable sw breakpoints with no watchpoint unit available");
LOG_WARNING("can't enable sw breakpoints with no watchpoint unit available");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
arm7_9->wp_available--;
@ -518,13 +518,13 @@ int arm7_9_enable_sw_bkpts(struct target_s *target)
}
else
{
ERROR("BUG: both watchpoints used, but wp_available >= 1");
LOG_ERROR("BUG: both watchpoints used, but wp_available >= 1");
exit(-1);
}
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
ERROR("error writing EmbeddedICE registers to enable sw breakpoints");
LOG_ERROR("error writing EmbeddedICE registers to enable sw breakpoints");
exit(-1);
};
@ -584,7 +584,7 @@ int arm7_9_execute_sys_speed(struct target_s *target)
}
if (timeout == 50)
{
ERROR("timeout waiting for SYSCOMP & DBGACK, last DBG_STATUS: %x", buf_get_u32(dbg_stat->value, 0, dbg_stat->size));
LOG_ERROR("timeout waiting for SYSCOMP & DBGACK, last DBG_STATUS: %x", buf_get_u32(dbg_stat->value, 0, dbg_stat->size));
return ERROR_TARGET_TIMEOUT;
}
@ -697,11 +697,11 @@ int arm7_9_poll(target_t *target)
if (buf_get_u32(dbg_stat->value, EICE_DBG_STATUS_DBGACK, 1))
{
DEBUG("DBGACK set, dbg_state->value: 0x%x", buf_get_u32(dbg_stat->value, 0, 32));
LOG_DEBUG("DBGACK set, dbg_state->value: 0x%x", buf_get_u32(dbg_stat->value, 0, 32));
if (target->state == TARGET_UNKNOWN)
{
target->state = TARGET_RUNNING;
WARNING("DBGACK set while target was in unknown state. Reset or initialize target.");
LOG_WARNING("DBGACK set while target was in unknown state. Reset or initialize target.");
}
if ((target->state == TARGET_RUNNING) || (target->state == TARGET_RESET))
{
@ -721,7 +721,7 @@ int arm7_9_poll(target_t *target)
}
if (target->state != TARGET_HALTED)
{
WARNING("DBGACK set, but the target did not end up in the halted stated %d", target->state);
LOG_WARNING("DBGACK set, but the target did not end up in the halted stated %d", target->state);
}
}
else
@ -737,7 +737,7 @@ int arm7_9_assert_reset(target_t *target)
{
int retval;
DEBUG("target->state: %s", target_state_strings[target->state]);
LOG_DEBUG("target->state: %s", target_state_strings[target->state]);
if (target->state == TARGET_HALTED || target->state == TARGET_UNKNOWN)
{
@ -754,7 +754,7 @@ int arm7_9_assert_reset(target_t *target)
}
else
{
ERROR("unknown error");
LOG_ERROR("unknown error");
exit(-1);
}
}
@ -782,7 +782,7 @@ int arm7_9_assert_reset(target_t *target)
}
else if (retval != ERROR_OK)
{
ERROR("unknown error");
LOG_ERROR("unknown error");
exit(-1);
}
}
@ -799,7 +799,7 @@ int arm7_9_assert_reset(target_t *target)
int arm7_9_deassert_reset(target_t *target)
{
DEBUG("target->state: %s", target_state_strings[target->state]);
LOG_DEBUG("target->state: %s", target_state_strings[target->state]);
/* deassert reset lines */
jtag_add_reset(0, 0);
@ -876,7 +876,7 @@ int arm7_9_soft_reset_halt(struct target_s *target)
}
if (i==10)
{
ERROR("Failed to halt CPU after 1 sec");
LOG_ERROR("Failed to halt CPU after 1 sec");
return ERROR_TARGET_TIMEOUT;
}
target->state = TARGET_HALTED;
@ -895,7 +895,7 @@ int arm7_9_soft_reset_halt(struct target_s *target)
if (buf_get_u32(dbg_stat->value, EICE_DBG_STATUS_ITBIT, 1))
{
u32 r0_thumb, pc_thumb;
DEBUG("target entered debug from Thumb state, changing to ARM");
LOG_DEBUG("target entered debug from Thumb state, changing to ARM");
/* Entered debug from Thumb mode */
armv4_5->core_state = ARMV4_5_STATE_THUMB;
arm7_9->change_to_arm(target, &r0_thumb, &pc_thumb);
@ -965,24 +965,24 @@ int arm7_9_halt(target_t *target)
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL];
DEBUG("target->state: %s", target_state_strings[target->state]);
LOG_DEBUG("target->state: %s", target_state_strings[target->state]);
if (target->state == TARGET_HALTED)
{
WARNING("target was already halted");
LOG_WARNING("target was already halted");
return ERROR_OK;
}
if (target->state == TARGET_UNKNOWN)
{
WARNING("target was in unknown state when halt was requested");
LOG_WARNING("target was in unknown state when halt was requested");
}
if (target->state == TARGET_RESET)
{
if ((jtag_reset_config & RESET_SRST_PULLS_TRST) && jtag_srst)
{
ERROR("can't request a halt while in reset if nSRST pulls nTRST");
LOG_ERROR("can't request a halt while in reset if nSRST pulls nTRST");
return ERROR_TARGET_FAILURE;
}
else
@ -1033,7 +1033,7 @@ int arm7_9_debug_entry(target_t *target)
reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL];
#ifdef _DEBUG_ARM7_9_
DEBUG("-");
LOG_DEBUG("-");
#endif
if (arm7_9->pre_debug_entry)
@ -1054,7 +1054,7 @@ int arm7_9_debug_entry(target_t *target)
switch (retval)
{
case ERROR_JTAG_QUEUE_FAILED:
ERROR("JTAG queue failed while writing EmbeddedICE control register");
LOG_ERROR("JTAG queue failed while writing EmbeddedICE control register");
exit(-1);
break;
default:
@ -1068,22 +1068,22 @@ int arm7_9_debug_entry(target_t *target)
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
/* if the target is in Thumb state, change to ARM state */
if (buf_get_u32(dbg_stat->value, EICE_DBG_STATUS_ITBIT, 1))
{
DEBUG("target entered debug from Thumb state");
LOG_DEBUG("target entered debug from Thumb state");
/* Entered debug from Thumb mode */
armv4_5->core_state = ARMV4_5_STATE_THUMB;
arm7_9->change_to_arm(target, &r0_thumb, &pc_thumb);
DEBUG("r0_thumb: 0x%8.8x, pc_thumb: 0x%8.8x", r0_thumb, pc_thumb);
LOG_DEBUG("r0_thumb: 0x%8.8x, pc_thumb: 0x%8.8x", r0_thumb, pc_thumb);
}
else
{
DEBUG("target entered debug from ARM state");
LOG_DEBUG("target entered debug from ARM state");
/* Entered debug from ARM mode */
armv4_5->core_state = ARMV4_5_STATE_ARM;
}
@ -1111,15 +1111,15 @@ int arm7_9_debug_entry(target_t *target)
if (armv4_5_mode_to_number(armv4_5->core_mode) == -1)
{
target->state = TARGET_UNKNOWN;
ERROR("cpsr contains invalid mode value - communication failure");
LOG_ERROR("cpsr contains invalid mode value - communication failure");
return ERROR_TARGET_FAILURE;
}
DEBUG("target entered debug state in %s mode", armv4_5_mode_strings[armv4_5_mode_to_number(armv4_5->core_mode)]);
LOG_DEBUG("target entered debug state in %s mode", armv4_5_mode_strings[armv4_5_mode_to_number(armv4_5->core_mode)]);
if (armv4_5->core_state == ARMV4_5_STATE_THUMB)
{
DEBUG("thumb state, applying fixups");
LOG_DEBUG("thumb state, applying fixups");
context[0] = r0_thumb;
context[15] = pc_thumb;
} else if (armv4_5->core_state == ARMV4_5_STATE_ARM)
@ -1138,19 +1138,19 @@ int arm7_9_debug_entry(target_t *target)
context[15] -= arm7_9->dbgreq_adjust_pc * ((armv4_5->core_state == ARMV4_5_STATE_ARM) ? 4 : 2);
else
{
ERROR("unknown debug reason: %i", target->debug_reason);
LOG_ERROR("unknown debug reason: %i", target->debug_reason);
}
for (i=0; i<=15; i++)
{
DEBUG("r%i: 0x%8.8x", i, context[i]);
LOG_DEBUG("r%i: 0x%8.8x", i, context[i]);
buf_set_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).value, 0, 32, context[i]);
ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).dirty = 0;
ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).valid = 1;
}
DEBUG("entered debug state at PC 0x%x", context[15]);
LOG_DEBUG("entered debug state at PC 0x%x", context[15]);
/* exceptions other than USR & SYS have a saved program status register */
if ((armv4_5_mode_to_number(armv4_5->core_mode) != ARMV4_5_MODE_USR) && (armv4_5_mode_to_number(armv4_5->core_mode) != ARMV4_5_MODE_SYS))
@ -1183,11 +1183,11 @@ int arm7_9_full_context(target_t *target)
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
DEBUG("-");
LOG_DEBUG("-");
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -1249,7 +1249,7 @@ int arm7_9_full_context(target_t *target)
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
ERROR("JTAG failure");
LOG_ERROR("JTAG failure");
exit(-1);
}
return ERROR_OK;
@ -1266,11 +1266,11 @@ int arm7_9_restore_context(target_t *target)
int dirty;
int mode_change;
DEBUG("-");
LOG_DEBUG("-");
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -1282,7 +1282,7 @@ int arm7_9_restore_context(target_t *target)
*/
for (i = 0; i < 6; i++)
{
DEBUG("examining %s mode", armv4_5_mode_strings[i]);
LOG_DEBUG("examining %s mode", armv4_5_mode_strings[i]);
dirty = 0;
mode_change = 0;
/* check if there are dirty registers in the current mode
@ -1296,19 +1296,19 @@ int arm7_9_restore_context(target_t *target)
if (reg->valid == 1)
{
dirty = 1;
DEBUG("examining dirty reg: %s", reg->name);
LOG_DEBUG("examining dirty reg: %s", reg->name);
if ((reg_arch_info->mode != ARMV4_5_MODE_ANY)
&& (reg_arch_info->mode != current_mode)
&& !((reg_arch_info->mode == ARMV4_5_MODE_USR) && (armv4_5->core_mode == ARMV4_5_MODE_SYS))
&& !((reg_arch_info->mode == ARMV4_5_MODE_SYS) && (armv4_5->core_mode == ARMV4_5_MODE_USR)))
{
mode_change = 1;
DEBUG("require mode change");
LOG_DEBUG("require mode change");
}
}
else
{
ERROR("BUG: dirty register '%s', but no valid data", reg->name);
LOG_ERROR("BUG: dirty register '%s', but no valid data", reg->name);
}
}
}
@ -1344,7 +1344,7 @@ int arm7_9_restore_context(target_t *target)
num_regs++;
reg->dirty = 0;
reg->valid = 1;
DEBUG("writing register %i of mode %s with value 0x%8.8x", j, armv4_5_mode_strings[i], regs[j]);
LOG_DEBUG("writing register %i of mode %s with value 0x%8.8x", j, armv4_5_mode_strings[i], regs[j]);
}
}
@ -1357,7 +1357,7 @@ int arm7_9_restore_context(target_t *target)
reg_arch_info = reg->arch_info;
if ((reg->dirty) && (reg_arch_info->mode != ARMV4_5_MODE_ANY))
{
DEBUG("writing SPSR of mode %i with value 0x%8.8x", i, buf_get_u32(reg->value, 0, 32));
LOG_DEBUG("writing SPSR of mode %i with value 0x%8.8x", i, buf_get_u32(reg->value, 0, 32));
arm7_9->write_xpsr(target, buf_get_u32(reg->value, 0, 32), 1);
}
}
@ -1371,20 +1371,20 @@ int arm7_9_restore_context(target_t *target)
tmp_cpsr = buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 8) & 0xE0;
tmp_cpsr |= armv4_5_number_to_mode(i);
tmp_cpsr &= ~0x20;
DEBUG("writing lower 8 bit of cpsr with value 0x%2.2x", tmp_cpsr);
LOG_DEBUG("writing lower 8 bit of cpsr with value 0x%2.2x", tmp_cpsr);
arm7_9->write_xpsr_im8(target, tmp_cpsr & 0xff, 0, 0);
}
else if (armv4_5->core_cache->reg_list[ARMV4_5_CPSR].dirty == 1)
{
/* CPSR has been changed, full restore necessary (mask T bit) */
DEBUG("writing cpsr with value 0x%8.8x", buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32));
LOG_DEBUG("writing cpsr with value 0x%8.8x", buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32));
arm7_9->write_xpsr(target, buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32) & ~0x20, 0);
armv4_5->core_cache->reg_list[ARMV4_5_CPSR].dirty = 0;
armv4_5->core_cache->reg_list[ARMV4_5_CPSR].valid = 1;
}
/* restore PC */
DEBUG("writing PC with value 0x%8.8x", buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
LOG_DEBUG("writing PC with value 0x%8.8x", buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
arm7_9->write_pc(target, buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
armv4_5->core_cache->reg_list[15].dirty = 0;
@ -1467,11 +1467,11 @@ int arm7_9_resume(struct target_s *target, int current, u32 address, int handle_
reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL];
int err;
DEBUG("-");
LOG_DEBUG("-");
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -1489,10 +1489,10 @@ int arm7_9_resume(struct target_s *target, int current, u32 address, int handle_
{
if ((breakpoint = breakpoint_find(target, buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32))))
{
DEBUG("unset breakpoint at 0x%8.8x", breakpoint->address);
LOG_DEBUG("unset breakpoint at 0x%8.8x", breakpoint->address);
arm7_9_unset_breakpoint(target, breakpoint);
DEBUG("enable single-step");
LOG_DEBUG("enable single-step");
arm7_9->enable_single_step(target);
target->debug_reason = DBG_REASON_SINGLESTEP;
@ -1507,7 +1507,7 @@ int arm7_9_resume(struct target_s *target, int current, u32 address, int handle_
}
else
{
ERROR("unhandled core state");
LOG_ERROR("unhandled core state");
exit(-1);
}
@ -1515,7 +1515,7 @@ int arm7_9_resume(struct target_s *target, int current, u32 address, int handle_
embeddedice_write_reg(dbg_ctrl, buf_get_u32(dbg_ctrl->value, 0, dbg_ctrl->size));
err = arm7_9_execute_sys_speed(target);
DEBUG("disable single-step");
LOG_DEBUG("disable single-step");
arm7_9->disable_single_step(target);
if (err != ERROR_OK)
@ -1526,9 +1526,9 @@ int arm7_9_resume(struct target_s *target, int current, u32 address, int handle_
}
arm7_9_debug_entry(target);
DEBUG("new PC after step: 0x%8.8x", buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
LOG_DEBUG("new PC after step: 0x%8.8x", buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
DEBUG("set breakpoint at 0x%8.8x", breakpoint->address);
LOG_DEBUG("set breakpoint at 0x%8.8x", breakpoint->address);
arm7_9_set_breakpoint(target, breakpoint);
}
}
@ -1549,7 +1549,7 @@ int arm7_9_resume(struct target_s *target, int current, u32 address, int handle_
}
else
{
ERROR("unhandled core state");
LOG_ERROR("unhandled core state");
exit(-1);
}
@ -1577,7 +1577,7 @@ int arm7_9_resume(struct target_s *target, int current, u32 address, int handle_
target_call_event_callbacks(target, TARGET_EVENT_DEBUG_RESUMED);
}
DEBUG("target resumed");
LOG_DEBUG("target resumed");
return ERROR_OK;
}
@ -1627,7 +1627,7 @@ int arm7_9_step(struct target_s *target, int current, u32 address, int handle_br
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -1656,7 +1656,7 @@ int arm7_9_step(struct target_s *target, int current, u32 address, int handle_br
}
else
{
ERROR("unhandled core state");
LOG_ERROR("unhandled core state");
exit(-1);
}
@ -1674,7 +1674,7 @@ int arm7_9_step(struct target_s *target, int current, u32 address, int handle_br
} else {
arm7_9_debug_entry(target);
target_call_event_callbacks(target, TARGET_EVENT_HALTED);
DEBUG("target stepped");
LOG_DEBUG("target stepped");
}
if (breakpoint)
@ -1729,7 +1729,7 @@ int arm7_9_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mod
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
ERROR("JTAG failure");
LOG_ERROR("JTAG failure");
exit(-1);
}
@ -1818,11 +1818,11 @@ int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count
int retval;
int last_reg = 0;
DEBUG("address: 0x%8.8x, size: 0x%8.8x, count: 0x%8.8x", address, size, count);
LOG_DEBUG("address: 0x%8.8x, size: 0x%8.8x, count: 0x%8.8x", address, size, count);
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -1923,7 +1923,7 @@ int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count
}
break;
default:
ERROR("BUG: we shouldn't get here");
LOG_ERROR("BUG: we shouldn't get here");
exit(-1);
break;
}
@ -1934,13 +1934,13 @@ int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count
arm7_9->read_xpsr(target, &cpsr, 0);
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
ERROR("JTAG error while reading cpsr");
LOG_ERROR("JTAG error while reading cpsr");
return ERROR_TARGET_DATA_ABORT;
}
if (((cpsr & 0x1f) == ARMV4_5_MODE_ABT) && (armv4_5->core_mode != ARMV4_5_MODE_ABT))
{
WARNING("memory read caused data abort (address: 0x%8.8x, size: 0x%x, count: 0x%x)", address, size, count);
LOG_WARNING("memory read caused data abort (address: 0x%8.8x, size: 0x%x, count: 0x%x)", address, size, count);
arm7_9->write_xpsr_im8(target, buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 8) & ~0x20, 0, 0);
@ -1965,12 +1965,12 @@ int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 coun
int last_reg = 0;
#ifdef _DEBUG_ARM7_9_
DEBUG("address: 0x%8.8x, size: 0x%8.8x, count: 0x%8.8x", address, size, count);
LOG_DEBUG("address: 0x%8.8x, size: 0x%8.8x, count: 0x%8.8x", address, size, count);
#endif
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -2086,7 +2086,7 @@ int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 coun
}
break;
default:
ERROR("BUG: we shouldn't get here");
LOG_ERROR("BUG: we shouldn't get here");
exit(-1);
break;
}
@ -2101,13 +2101,13 @@ int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 coun
arm7_9->read_xpsr(target, &cpsr, 0);
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
ERROR("JTAG error while reading cpsr");
LOG_ERROR("JTAG error while reading cpsr");
return ERROR_TARGET_DATA_ABORT;
}
if (((cpsr & 0x1f) == ARMV4_5_MODE_ABT) && (armv4_5->core_mode != ARMV4_5_MODE_ABT))
{
WARNING("memory write caused data abort (address: 0x%8.8x, size: 0x%x, count: 0x%x)", address, size, count);
LOG_WARNING("memory write caused data abort (address: 0x%8.8x, size: 0x%x, count: 0x%x)", address, size, count);
arm7_9->write_xpsr_im8(target, buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 8) & ~0x20, 0, 0);
@ -2144,7 +2144,7 @@ int arm7_9_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffe
/* make sure we have a working area */
if (target_alloc_working_area(target, 24, &arm7_9->dcc_working_area) != ERROR_OK)
{
INFO("no working area available, falling back to memory writes");
LOG_INFO("no working area available, falling back to memory writes");
return target->type->write_memory(target, address, 4, count, buffer);
}
@ -2216,7 +2216,7 @@ int arm7_9_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffe
}
if (i == 100)
{
ERROR("bulk write timed out, target not halted");
LOG_ERROR("bulk write timed out, target not halted");
return ERROR_TARGET_TIMEOUT;
}
@ -2294,7 +2294,7 @@ int arm7_9_checksum_memory(struct target_s *target, u32 address, u32 count, u32*
if ((retval = target->type->run_algorithm(target, 0, NULL, 2, reg_params,
crc_algorithm->address, crc_algorithm->address + (sizeof(arm7_9_crc_code) - 8), 20000, &armv4_5_info)) != ERROR_OK)
{
ERROR("error executing arm7_9 crc algorithm");
LOG_ERROR("error executing arm7_9 crc algorithm");
destroy_reg_param(&reg_params[0]);
destroy_reg_param(&reg_params[1]);
target_free_working_area(target, crc_algorithm);
@ -2377,7 +2377,7 @@ int handle_arm7_9_write_xpsr_command(struct command_context_s *cmd_ctx, char *cm
arm7_9->write_xpsr(target, value, spsr);
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
ERROR("JTAG error while writing to xpsr");
LOG_ERROR("JTAG error while writing to xpsr");
return retval;
}
@ -2419,7 +2419,7 @@ int handle_arm7_9_write_xpsr_im8_command(struct command_context_s *cmd_ctx, char
arm7_9->write_xpsr_im8(target, value, rotate, spsr);
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
ERROR("JTAG error while writing 8-bit immediate to xpsr");
LOG_ERROR("JTAG error while writing 8-bit immediate to xpsr");
return retval;
}

20
src/target/arm7tdmi.c
View File

@ -200,10 +200,10 @@ int arm7tdmi_clock_out(arm_jtag_t *jtag_info, u32 out, u32 *in, int breakpoint)
if (in)
{
DEBUG("out: 0x%8.8x, in: 0x%8.8x", out, *in);
LOG_DEBUG("out: 0x%8.8x, in: 0x%8.8x", out, *in);
}
else
DEBUG("out: 0x%8.8x", out);
LOG_DEBUG("out: 0x%8.8x", out);
}
#endif
@ -249,11 +249,11 @@ int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
if (in)
{
DEBUG("in: 0x%8.8x", *in);
LOG_DEBUG("in: 0x%8.8x", *in);
}
else
{
ERROR("BUG: called with in == NULL");
LOG_ERROR("BUG: called with in == NULL");
}
}
#endif
@ -314,11 +314,11 @@ int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
if (in)
{
DEBUG("in: 0x%8.8x", *in);
LOG_DEBUG("in: 0x%8.8x", *in);
}
else
{
ERROR("BUG: called with in == NULL");
LOG_ERROR("BUG: called with in == NULL");
}
}
#endif
@ -476,7 +476,7 @@ void arm7tdmi_write_xpsr(target_t *target, u32 xpsr, int spsr)
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
DEBUG("xpsr: %8.8x, spsr: %i", xpsr, spsr);
LOG_DEBUG("xpsr: %8.8x, spsr: %i", xpsr, spsr);
/* MSR1 fetched */
arm7tdmi_clock_out(jtag_info, ARMV4_5_MSR_IM(xpsr & 0xff, 0, 1, spsr), NULL, 0);
@ -507,7 +507,7 @@ void arm7tdmi_write_xpsr_im8(target_t *target, u8 xpsr_im, int rot, int spsr)
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
DEBUG("xpsr_im: %2.2x, rot: %i, spsr: %i", xpsr_im, rot, spsr);
LOG_DEBUG("xpsr_im: %2.2x, rot: %i, spsr: %i", xpsr_im, rot, spsr);
/* MSR fetched */
arm7tdmi_clock_out(jtag_info, ARMV4_5_MSR_IM(xpsr_im, rot, 1, spsr), NULL, 0);
@ -673,7 +673,7 @@ void arm7tdmi_branch_resume(target_t *target)
void arm7tdmi_branch_resume_thumb(target_t *target)
{
DEBUG("-");
LOG_DEBUG("-");
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
@ -849,7 +849,7 @@ int arm7tdmi_target_command(struct command_context_s *cmd_ctx, char *cmd, char *
if (argc < 4)
{
ERROR("'target arm7tdmi' requires at least one additional argument");
LOG_ERROR("'target arm7tdmi' requires at least one additional argument");
exit(-1);
}

30
src/target/arm920t.c
View File

@ -157,7 +157,7 @@ int arm920t_read_cp15_physical(target_t *target, int reg_addr, u32 *value)
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
jtag_execute_queue();
DEBUG("addr: 0x%x value: %8.8x", reg_addr, *value);
LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, *value);
#endif
return ERROR_OK;
@ -223,7 +223,7 @@ int arm920t_write_cp15_physical(target_t *target, int reg_addr, u32 value)
jtag_add_dr_scan(4, fields, -1);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
DEBUG("addr: 0x%x value: %8.8x", reg_addr, value);
LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, value);
#endif
return ERROR_OK;
@ -294,7 +294,7 @@ int arm920t_execute_cp15(target_t *target, u32 cp15_opcode, u32 arm_opcode)
if (jtag_execute_queue() != ERROR_OK)
{
ERROR("failed executing JTAG queue, exiting");
LOG_ERROR("failed executing JTAG queue, exiting");
exit(-1);
}
@ -332,7 +332,7 @@ int arm920t_read_cp15_interpreted(target_t *target, u32 cp15_opcode, u32 address
jtag_execute_queue();
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
DEBUG("cp15_opcode: %8.8x, address: %8.8x, value: %8.8x", cp15_opcode, address, *value);
LOG_DEBUG("cp15_opcode: %8.8x, address: %8.8x, value: %8.8x", cp15_opcode, address, *value);
#endif
ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 0).dirty = 1;
@ -367,7 +367,7 @@ int arm920t_write_cp15_interpreted(target_t *target, u32 cp15_opcode, u32 value,
arm920t_write_cp15_physical(target, 0x1e, cp15c15);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
DEBUG("cp15_opcode: %8.8x, value: %8.8x, address: %8.8x", cp15_opcode, value, address);
LOG_DEBUG("cp15_opcode: %8.8x, value: %8.8x, address: %8.8x", cp15_opcode, value, address);
#endif
ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 0).dirty = 1;
@ -438,7 +438,7 @@ void arm920t_post_debug_entry(target_t *target)
/* examine cp15 control reg */
arm920t_read_cp15_physical(target, 0x2, &arm920t->cp15_control_reg);
jtag_execute_queue();
DEBUG("cp15_control_reg: %8.8x", arm920t->cp15_control_reg);
LOG_DEBUG("cp15_control_reg: %8.8x", arm920t->cp15_control_reg);
if (arm920t->armv4_5_mmu.armv4_5_cache.ctype == -1)
{
@ -459,7 +459,7 @@ void arm920t_post_debug_entry(target_t *target)
arm920t_read_cp15_interpreted(target, 0xee160f10, 0x0, &arm920t->d_far);
arm920t_read_cp15_interpreted(target, 0xee160f30, 0x0, &arm920t->i_far);
DEBUG("D FSR: 0x%8.8x, D FAR: 0x%8.8x, I FSR: 0x%8.8x, I FAR: 0x%8.8x",
LOG_DEBUG("D FSR: 0x%8.8x, D FAR: 0x%8.8x, I FSR: 0x%8.8x, I FAR: 0x%8.8x",
arm920t->d_fsr, arm920t->d_far, arm920t->i_fsr, arm920t->i_far);
if (arm920t->preserve_cache)
@ -550,11 +550,11 @@ int arm920t_arch_state(struct target_s *target)
if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
{
ERROR("BUG: called for a non-ARMv4/5 target");
LOG_ERROR("BUG: called for a non-ARMv4/5 target");
exit(-1);
}
USER( "target halted in %s state due to %s, current mode: %s\n"
LOG_USER( "target halted in %s state due to %s, current mode: %s\n"
"cpsr: 0x%8.8x pc: 0x%8.8x\n"
"MMU: %s, D-Cache: %s, I-Cache: %s",
armv4_5_state_strings[armv4_5->core_state],
@ -593,7 +593,7 @@ int arm920t_write_memory(struct target_s *target, u32 address, u32 size, u32 cou
{
if (arm920t->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled)
{
DEBUG("D-Cache enabled, writing through to main memory");
LOG_DEBUG("D-Cache enabled, writing through to main memory");
u32 pa, cb, ap;
int type, domain;
@ -607,7 +607,7 @@ int arm920t_write_memory(struct target_s *target, u32 address, u32 size, u32 cou
if (arm920t->armv4_5_mmu.armv4_5_cache.i_cache_enabled)
{
DEBUG("I-Cache enabled, invalidating affected I-Cache line");
LOG_DEBUG("I-Cache enabled, invalidating affected I-Cache line");
arm920t_write_cp15_interpreted(target, 0xee070f35, 0x0, address);
}
}
@ -715,7 +715,7 @@ int arm920t_target_command(struct command_context_s *cmd_ctx, char *cmd, char **
if (argc < 4)
{
ERROR("'target arm920t' requires at least one additional argument");
LOG_ERROR("'target arm920t' requires at least one additional argument");
exit(-1);
}
@ -724,7 +724,7 @@ int arm920t_target_command(struct command_context_s *cmd_ctx, char *cmd, char **
if (argc >= 5)
variant = args[4];
DEBUG("chain_pos: %i, variant: %s", chain_pos, variant);
LOG_DEBUG("chain_pos: %i, variant: %s", chain_pos, variant);
arm920t_init_arch_info(target, arm920t, chain_pos, variant);
@ -786,7 +786,7 @@ int arm920t_handle_read_cache_command(struct command_context_s *cmd_ctx, char *c
if ((output = fopen(args[0], "w")) == NULL)
{
DEBUG("error opening cache content file");
LOG_DEBUG("error opening cache content file");
return ERROR_OK;
}
@ -1027,7 +1027,7 @@ int arm920t_handle_read_mmu_command(struct command_context_s *cmd_ctx, char *cmd
if ((output = fopen(args[0], "w")) == NULL)
{
DEBUG("error opening mmu content file");
LOG_DEBUG("error opening mmu content file");
return ERROR_OK;
}

44
src/target/arm926ejs.c
View File

@ -108,7 +108,7 @@ int arm926ejs_catch_broken_irscan(u8 *captured, void *priv, scan_field_t *field)
}
else if ((t == 0x0f) || (t == 0x00))
{
DEBUG("caught ARM926EJ-S invalid Capture-IR result after CP15 access");
LOG_DEBUG("caught ARM926EJ-S invalid Capture-IR result after CP15 access");
return ERROR_OK;
}
return ERROR_JTAG_QUEUE_FAILED;;
@ -189,7 +189,7 @@ int arm926ejs_cp15_read(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u3
} while (buf_get_u32(&access, 0, 1) != 1);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
DEBUG("addr: 0x%x value: %8.8x", address, *value);
LOG_DEBUG("addr: 0x%x value: %8.8x", address, *value);
#endif
arm_jtag_set_instr(jtag_info, 0xc, &arm926ejs_catch_broken_irscan);
@ -268,7 +268,7 @@ int arm926ejs_cp15_write(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u
} while (buf_get_u32(&access, 0, 1) != 1);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
DEBUG("addr: 0x%x value: %8.8x", address, value);
LOG_DEBUG("addr: 0x%x value: %8.8x", address, value);
#endif
arm_jtag_set_instr(jtag_info, 0xf, &arm926ejs_catch_broken_irscan);
@ -293,50 +293,50 @@ int arm926ejs_examine_debug_reason(target_t *target)
switch (debug_reason)
{
case 1:
DEBUG("breakpoint from EICE unit 0");
LOG_DEBUG("breakpoint from EICE unit 0");
target->debug_reason = DBG_REASON_BREAKPOINT;
break;
case 2:
DEBUG("breakpoint from EICE unit 1");
LOG_DEBUG("breakpoint from EICE unit 1");
target->debug_reason = DBG_REASON_BREAKPOINT;
break;
case 3:
DEBUG("soft breakpoint (BKPT instruction)");
LOG_DEBUG("soft breakpoint (BKPT instruction)");
target->debug_reason = DBG_REASON_BREAKPOINT;
break;
case 4:
DEBUG("vector catch breakpoint");
LOG_DEBUG("vector catch breakpoint");
target->debug_reason = DBG_REASON_BREAKPOINT;
break;
case 5:
DEBUG("external breakpoint");
LOG_DEBUG("external breakpoint");
target->debug_reason = DBG_REASON_BREAKPOINT;
break;
case 6:
DEBUG("watchpoint from EICE unit 0");
LOG_DEBUG("watchpoint from EICE unit 0");
target->debug_reason = DBG_REASON_WATCHPOINT;
break;
case 7:
DEBUG("watchpoint from EICE unit 1");
LOG_DEBUG("watchpoint from EICE unit 1");
target->debug_reason = DBG_REASON_WATCHPOINT;
break;
case 8:
DEBUG("external watchpoint");
LOG_DEBUG("external watchpoint");
target->debug_reason = DBG_REASON_WATCHPOINT;
break;
case 9:
DEBUG("internal debug request");
LOG_DEBUG("internal debug request");
target->debug_reason = DBG_REASON_DBGRQ;
break;
case 10:
DEBUG("external debug request");
LOG_DEBUG("external debug request");
target->debug_reason = DBG_REASON_DBGRQ;
break;
case 11:
ERROR("BUG: debug re-entry from system speed access shouldn't be handled here");
LOG_ERROR("BUG: debug re-entry from system speed access shouldn't be handled here");
break;
default:
ERROR("BUG: unknown debug reason: 0x%x", debug_reason);
LOG_ERROR("BUG: unknown debug reason: 0x%x", debug_reason);
target->debug_reason = DBG_REASON_DBGRQ;
retval = ERROR_TARGET_FAILURE;
break;
@ -445,7 +445,7 @@ void arm926ejs_post_debug_entry(target_t *target)
/* examine cp15 control reg */
arm926ejs->read_cp15(target, 0, 0, 1, 0, &arm926ejs->cp15_control_reg);
jtag_execute_queue();
DEBUG("cp15_control_reg: %8.8x", arm926ejs->cp15_control_reg);
LOG_DEBUG("cp15_control_reg: %8.8x", arm926ejs->cp15_control_reg);
if (arm926ejs->armv4_5_mmu.armv4_5_cache.ctype == -1)
{
@ -465,7 +465,7 @@ void arm926ejs_post_debug_entry(target_t *target)
arm926ejs->read_cp15(target, 0, 1, 5, 0, &arm926ejs->i_fsr);
arm926ejs->read_cp15(target, 0, 0, 6, 0, &arm926ejs->d_far);
DEBUG("D FSR: 0x%8.8x, D FAR: 0x%8.8x, I FSR: 0x%8.8x",
LOG_DEBUG("D FSR: 0x%8.8x, D FAR: 0x%8.8x, I FSR: 0x%8.8x",
arm926ejs->d_fsr, arm926ejs->d_far, arm926ejs->i_fsr);
@ -551,11 +551,11 @@ int arm926ejs_arch_state(struct target_s *target)
if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
{
ERROR("BUG: called for a non-ARMv4/5 target");
LOG_ERROR("BUG: called for a non-ARMv4/5 target");
exit(-1);
}
USER(
LOG_USER(
"target halted in %s state due to %s, current mode: %s\n"
"cpsr: 0x%8.8x pc: 0x%8.8x\n"
"MMU: %s, D-Cache: %s, I-Cache: %s",
@ -706,7 +706,7 @@ int arm926ejs_target_command(struct command_context_s *cmd_ctx, char *cmd, char
if (argc < 4)
{
ERROR("'target arm926ejs' requires at least one additional argument");
LOG_ERROR("'target arm926ejs' requires at least one additional argument");
exit(-1);
}
@ -715,7 +715,7 @@ int arm926ejs_target_command(struct command_context_s *cmd_ctx, char *cmd, char
if (argc >= 5)
variant = args[4];
DEBUG("chain_pos: %i, variant: %s", chain_pos, variant);
LOG_DEBUG("chain_pos: %i, variant: %s", chain_pos, variant);
arm926ejs_init_arch_info(target, arm926ejs, chain_pos, variant);
@ -937,7 +937,7 @@ static int arm926ejs_mmu(struct target_s *target, int *enabled)
if (target->state != TARGET_HALTED)
{
ERROR("Target not halted");
LOG_ERROR("Target not halted");
return ERROR_TARGET_INVALID;
}
*enabled = arm926ejs->armv4_5_mmu.mmu_enabled;

8
src/target/arm966e.c
View File

@ -129,7 +129,7 @@ int arm966e_target_command(struct command_context_s *cmd_ctx, char *cmd, char **
if (argc < 4)
{
ERROR("'target arm966e' requires at least one additional argument");
LOG_ERROR("'target arm966e' requires at least one additional argument");
exit(-1);
}
@ -138,7 +138,7 @@ int arm966e_target_command(struct command_context_s *cmd_ctx, char *cmd, char **
if (argc >= 5)
variant = args[4];
DEBUG("chain_pos: %i, variant: %s", chain_pos, variant);
LOG_DEBUG("chain_pos: %i, variant: %s", chain_pos, variant);
arm966e_init_arch_info(target, arm966e, chain_pos, variant);
@ -235,7 +235,7 @@ int arm966e_read_cp15(target_t *target, int reg_addr, u32 *value)
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
jtag_execute_queue();
DEBUG("addr: 0x%x value: %8.8x", reg_addr, *value);
LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, *value);
#endif
return ERROR_OK;
@ -290,7 +290,7 @@ int arm966e_write_cp15(target_t *target, int reg_addr, u32 value)
jtag_add_dr_scan(3, fields, -1);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
DEBUG("addr: 0x%x value: %8.8x", reg_addr, value);
LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, value);
#endif
return ERROR_OK;

20
src/target/arm9tdmi.c
View File

@ -244,10 +244,10 @@ int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int s
if (in)
{
DEBUG("instr: 0x%8.8x, out: 0x%8.8x, in: 0x%8.8x", instr, out, *in);
LOG_DEBUG("instr: 0x%8.8x, out: 0x%8.8x, in: 0x%8.8x", instr, out, *in);
}
else
DEBUG("instr: 0x%8.8x, out: 0x%8.8x", instr, out);
LOG_DEBUG("instr: 0x%8.8x, out: 0x%8.8x", instr, out);
}
#endif
@ -304,11 +304,11 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
if (in)
{
DEBUG("in: 0x%8.8x", *in);
LOG_DEBUG("in: 0x%8.8x", *in);
}
else
{
ERROR("BUG: called with in == NULL");
LOG_ERROR("BUG: called with in == NULL");
}
}
#endif
@ -380,11 +380,11 @@ int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
if (in)
{
DEBUG("in: 0x%8.8x", *in);
LOG_DEBUG("in: 0x%8.8x", *in);
}
else
{
ERROR("BUG: called with in == NULL");
LOG_ERROR("BUG: called with in == NULL");
}
}
#endif
@ -544,7 +544,7 @@ void arm9tdmi_write_xpsr(target_t *target, u32 xpsr, int spsr)
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
DEBUG("xpsr: %8.8x, spsr: %i", xpsr, spsr);
LOG_DEBUG("xpsr: %8.8x, spsr: %i", xpsr, spsr);
/* MSR1 fetched */
arm9tdmi_clock_out(jtag_info, ARMV4_5_MSR_IM(xpsr & 0xff, 0, 1, spsr), 0, NULL, 0);
@ -580,7 +580,7 @@ void arm9tdmi_write_xpsr_im8(target_t *target, u8 xpsr_im, int rot, int spsr)
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
DEBUG("xpsr_im: %2.2x, rot: %i, spsr: %i", xpsr_im, rot, spsr);
LOG_DEBUG("xpsr_im: %2.2x, rot: %i, spsr: %i", xpsr_im, rot, spsr);
/* MSR fetched */
arm9tdmi_clock_out(jtag_info, ARMV4_5_MSR_IM(xpsr_im, rot, 1, spsr), 0, NULL, 0);
@ -745,7 +745,7 @@ void arm9tdmi_branch_resume(target_t *target)
void arm9tdmi_branch_resume_thumb(target_t *target)
{
DEBUG("-");
LOG_DEBUG("-");
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
@ -992,7 +992,7 @@ int arm9tdmi_target_command(struct command_context_s *cmd_ctx, char *cmd, char *
if (argc < 4)
{
ERROR("'target arm9tdmi' requires at least one additional argument");
LOG_ERROR("'target arm9tdmi' requires at least one additional argument");
exit(-1);
}

8
src/target/arm_disassembler.c
View File

@ -57,7 +57,7 @@ int evaluate_pld(u32 opcode, u32 address, arm_instruction_t *instruction)
return ERROR_OK;
}
ERROR("should never reach this point");
LOG_ERROR("should never reach this point");
return -1;
}
@ -1317,7 +1317,7 @@ int arm_evaluate_opcode(u32 opcode, u32 address, arm_instruction_t *instruction)
return evaluate_cdp_mcr_mrc(opcode, address, instruction);
}
ERROR("should never reach this point");
LOG_ERROR("should never reach this point");
return -1;
}
@ -2076,7 +2076,7 @@ int thumb_evaluate_opcode(u16 opcode, u32 address, arm_instruction_t *instructio
}
}
ERROR("should never reach this point (opcode=%04x)",opcode);
LOG_ERROR("should never reach this point (opcode=%04x)",opcode);
return -1;
}
@ -2110,7 +2110,7 @@ int arm_access_size(arm_instruction_t *instruction)
}
else
{
ERROR("BUG: instruction type %i isn't a load/store instruction", instruction->type);
LOG_ERROR("BUG: instruction type %i isn't a load/store instruction", instruction->type);
return 0;
}
}

10
src/target/arm_simulator.c
View File

@ -160,7 +160,7 @@ u32 arm_shifter_operand(armv4_5_common_t *armv4_5, int variant, union arm_shifte
}
else
{
ERROR("BUG: shifter_operand.variant not 0, 1 or 2");
LOG_ERROR("BUG: shifter_operand.variant not 0, 1 or 2");
return_value = 0xffffffff;
}
@ -253,7 +253,7 @@ int pass_condition(u32 cpsr, u32 opcode)
}
ERROR("BUG: should never get here");
LOG_ERROR("BUG: should never get here");
return 0;
}
@ -444,7 +444,7 @@ int arm_simulate_step(target_t *target, u32 *dry_run_pc)
else
{
buf_set_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, instruction.info.data_proc.Rd).value, 0, 32, Rd);
WARNING("no updating of flags yet");
LOG_WARNING("no updating of flags yet");
if (instruction.info.data_proc.Rd == 15)
return ERROR_OK;
@ -460,7 +460,7 @@ int arm_simulate_step(target_t *target, u32 *dry_run_pc)
}
else
{
WARNING("no updating of flags yet");
LOG_WARNING("no updating of flags yet");
}
}
/* load register instructions */
@ -497,7 +497,7 @@ int arm_simulate_step(target_t *target, u32 *dry_run_pc)
}
else
{
ERROR("BUG: offset_mode neither 0 (offset) nor 1 (scaled register)");
LOG_ERROR("BUG: offset_mode neither 0 (offset) nor 1 (scaled register)");
}
if (instruction.info.load_store.index_mode == 0)

40
src/target/armv4_5.c
View File

@ -183,7 +183,7 @@ int armv4_5_mode_to_number(enum armv4_5_mode mode)
case ARMV4_5_MODE_SYS: return 6; break;
case ARMV4_5_MODE_ANY: return 0; break; /* map MODE_ANY to user mode */
default:
ERROR("invalid mode value encountered");
LOG_ERROR("invalid mode value encountered");
return -1;
}
}
@ -201,7 +201,7 @@ enum armv4_5_mode armv4_5_number_to_mode(int number)
case 5: return ARMV4_5_MODE_UND; break;
case 6: return ARMV4_5_MODE_SYS; break;
default:
ERROR("mode index out of bounds");
LOG_ERROR("mode index out of bounds");
return -1;
}
};
@ -243,7 +243,7 @@ int armv4_5_set_core_reg(reg_t *reg, u8 *buf)
if (armv4_5_target->core_state == ARMV4_5_STATE_ARM)
{
/* change state to Thumb */
DEBUG("changing to Thumb state");
LOG_DEBUG("changing to Thumb state");
armv4_5_target->core_state = ARMV4_5_STATE_THUMB;
}
}
@ -253,14 +253,14 @@ int armv4_5_set_core_reg(reg_t *reg, u8 *buf)
if (armv4_5_target->core_state == ARMV4_5_STATE_THUMB)
{
/* change state to ARM */
DEBUG("changing to ARM state");
LOG_DEBUG("changing to ARM state");
armv4_5_target->core_state = ARMV4_5_STATE_ARM;
}
}
if (armv4_5_target->core_mode != (value & 0x1f))
{
DEBUG("changing ARM core mode to '%s'", armv4_5_mode_strings[armv4_5_mode_to_number(value & 0x1f)]);
LOG_DEBUG("changing ARM core mode to '%s'", armv4_5_mode_strings[armv4_5_mode_to_number(value & 0x1f)]);
armv4_5_target->core_mode = value & 0x1f;
armv4_5_target->write_core_reg(target, 16, ARMV4_5_MODE_ANY, value);
}
@ -328,11 +328,11 @@ int armv4_5_arch_state(struct target_s *target)
if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
{
ERROR("BUG: called for a non-ARMv4/5 target");
LOG_ERROR("BUG: called for a non-ARMv4/5 target");
exit(-1);
}
USER("target halted in %s state due to %s, current mode: %s\ncpsr: 0x%8.8x pc: 0x%8.8x",
LOG_USER("target halted in %s state due to %s, current mode: %s\ncpsr: 0x%8.8x pc: 0x%8.8x",
armv4_5_state_strings[armv4_5->core_state],
target_debug_reason_strings[target->debug_reason],
armv4_5_mode_strings[armv4_5_mode_to_number(armv4_5->core_mode)],
@ -507,13 +507,13 @@ int armv4_5_run_algorithm(struct target_s *target, int num_mem_params, mem_param
if (armv4_5_algorithm_info->common_magic != ARMV4_5_COMMON_MAGIC)
{
ERROR("current target isn't an ARMV4/5 target");
LOG_ERROR("current target isn't an ARMV4/5 target");
return ERROR_TARGET_INVALID;
}
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -535,13 +535,13 @@ int armv4_5_run_algorithm(struct target_s *target, int num_mem_params, mem_param
reg_t *reg = register_get_by_name(armv4_5->core_cache, reg_params[i].reg_name, 0);
if (!reg)
{
ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
exit(-1);
}
if (reg->size != reg_params[i].size)
{
ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name);
LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name);
exit(-1);
}
@ -555,13 +555,13 @@ int armv4_5_run_algorithm(struct target_s *target, int num_mem_params, mem_param
exit_breakpoint_size = 2;
else
{
ERROR("BUG: can't execute algorithms when not in ARM or Thumb state");
LOG_ERROR("BUG: can't execute algorithms when not in ARM or Thumb state");
exit(-1);
}
if (armv4_5_algorithm_info->core_mode != ARMV4_5_MODE_ANY)
{
DEBUG("setting core_mode: 0x%2.2x", armv4_5_algorithm_info->core_mode);
LOG_DEBUG("setting core_mode: 0x%2.2x", armv4_5_algorithm_info->core_mode);
buf_set_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 5, armv4_5_algorithm_info->core_mode);
armv4_5->core_cache->reg_list[ARMV4_5_CPSR].dirty = 1;
armv4_5->core_cache->reg_list[ARMV4_5_CPSR].valid = 1;
@ -569,7 +569,7 @@ int armv4_5_run_algorithm(struct target_s *target, int num_mem_params, mem_param
if ((retval = breakpoint_add(target, exit_point, exit_breakpoint_size, BKPT_HARD)) != ERROR_OK)
{
ERROR("can't add breakpoint to finish algorithm execution");
LOG_ERROR("can't add breakpoint to finish algorithm execution");
return ERROR_TARGET_FAILURE;
}
@ -582,7 +582,7 @@ int armv4_5_run_algorithm(struct target_s *target, int num_mem_params, mem_param
target->type->poll(target);
if ((timeout_ms -= 10) <= 0)
{
ERROR("timeout waiting for algorithm to complete, trying to halt target");
LOG_ERROR("timeout waiting for algorithm to complete, trying to halt target");
target->type->halt(target);
timeout_ms = 1000;
while (target->state != TARGET_HALTED)
@ -591,7 +591,7 @@ int armv4_5_run_algorithm(struct target_s *target, int num_mem_params, mem_param
target->type->poll(target);
if ((timeout_ms -= 10) <= 0)
{
ERROR("target didn't reenter debug state, exiting");
LOG_ERROR("target didn't reenter debug state, exiting");
exit(-1);
}
}
@ -602,7 +602,7 @@ int armv4_5_run_algorithm(struct target_s *target, int num_mem_params, mem_param
if ((retval != ERROR_TARGET_TIMEOUT) &&
(buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32) != exit_point))
{
WARNING("target reentered debug state, but not at the desired exit point: 0x%4.4x",
LOG_WARNING("target reentered debug state, but not at the desired exit point: 0x%4.4x",
buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
}
@ -622,13 +622,13 @@ int armv4_5_run_algorithm(struct target_s *target, int num_mem_params, mem_param
reg_t *reg = register_get_by_name(armv4_5->core_cache, reg_params[i].reg_name, 0);
if (!reg)
{
ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
exit(-1);
}
if (reg->size != reg_params[i].size)
{
ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name);
LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name);
exit(-1);
}
@ -638,7 +638,7 @@ int armv4_5_run_algorithm(struct target_s *target, int num_mem_params, mem_param
for (i = 0; i <= 16; i++)
{
DEBUG("restoring register %s with value 0x%8.8x", ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_algorithm_info->core_mode, i).name, context[i]);
LOG_DEBUG("restoring register %s with value 0x%8.8x", ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_algorithm_info->core_mode, i).name, context[i]);
buf_set_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_algorithm_info->core_mode, i).value, 0, 32, context[i]);
ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_algorithm_info->core_mode, i).valid = 1;
ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_algorithm_info->core_mode, i).dirty = 1;

12
src/target/armv4_5_mmu.c
View File

@ -49,19 +49,19 @@ u32 armv4_5_mmu_translate_va(target_t *target, armv4_5_mmu_common_t *armv4_5_mmu
4, 1, (u8*)&first_lvl_descriptor);
first_lvl_descriptor = target_buffer_get_u32(target, (u8*)&first_lvl_descriptor);
DEBUG("1st lvl desc: %8.8x", first_lvl_descriptor);
LOG_DEBUG("1st lvl desc: %8.8x", first_lvl_descriptor);
if ((first_lvl_descriptor & 0x3) == 0)
{
*type = -1;
ERROR("Address translation failure");
LOG_ERROR("Address translation failure");
return ERROR_TARGET_TRANSLATION_FAULT;
}
if (!armv4_5_mmu->has_tiny_pages && ((first_lvl_descriptor & 0x3) == 3))
{
*type = -1;
ERROR("Address translation failure");
LOG_ERROR("Address translation failure");
return ERROR_TARGET_TRANSLATION_FAULT;
}
@ -94,12 +94,12 @@ u32 armv4_5_mmu_translate_va(target_t *target, armv4_5_mmu_common_t *armv4_5_mmu
second_lvl_descriptor = target_buffer_get_u32(target, (u8*)&second_lvl_descriptor);
DEBUG("2nd lvl desc: %8.8x", second_lvl_descriptor);
LOG_DEBUG("2nd lvl desc: %8.8x", second_lvl_descriptor);
if ((second_lvl_descriptor & 0x3) == 0)
{
*type = -1;
ERROR("Address translation failure");
LOG_ERROR("Address translation failure");
return ERROR_TARGET_TRANSLATION_FAULT;
}
@ -132,7 +132,7 @@ u32 armv4_5_mmu_translate_va(target_t *target, armv4_5_mmu_common_t *armv4_5_mmu
/* should not happen */
*type = -1;
ERROR("Address translation failure");
LOG_ERROR("Address translation failure");
return ERROR_TARGET_TRANSLATION_FAULT;
}

36
src/target/armv7m.c
View File

@ -143,7 +143,7 @@ enum armv7m_runcontext armv7m_get_context(target_t *target)
if (armv7m->debug_context == armv7m->core_cache)
return ARMV7M_DEBUG_CONTEXT;
ERROR("Invalid runcontext");
LOG_ERROR("Invalid runcontext");
exit(-1);
}
@ -155,7 +155,7 @@ int armv7m_use_context(target_t *target, enum armv7m_runcontext new_ctx)
if ((target->state != TARGET_HALTED) && (target->state != TARGET_RESET))
{
WARNING("target not halted, switch context ");
LOG_WARNING("target not halted, switch context ");
return ERROR_TARGET_NOT_HALTED;
}
@ -171,7 +171,7 @@ int armv7m_use_context(target_t *target, enum armv7m_runcontext new_ctx)
armv7m->core_cache = armv7m->debug_context;
break;
default:
ERROR("Invalid runcontext");
LOG_ERROR("Invalid runcontext");
exit(-1);
}
/* Mark registers in new context as dirty to force reload when run */
@ -191,7 +191,7 @@ int armv7m_restore_context(target_t *target)
/* get pointers to arch-specific information */
armv7m_common_t *armv7m = target->arch_info;
DEBUG(" ");
LOG_DEBUG(" ");
if (armv7m->pre_restore_context)
armv7m->pre_restore_context(target);
@ -296,11 +296,11 @@ int armv7m_write_core_reg(struct target_s *target, int num)
retval = armv7m->store_core_reg_u32(target, armv7m_core_reg->type, armv7m_core_reg->num, reg_value);
if (retval != ERROR_OK)
{
ERROR("JTAG failure");
LOG_ERROR("JTAG failure");
armv7m->core_cache->reg_list[num].dirty = armv7m->core_cache->reg_list[num].valid;
return ERROR_JTAG_DEVICE_ERROR;
}
DEBUG("write core reg %i value 0x%x", num , reg_value);
LOG_DEBUG("write core reg %i value 0x%x", num , reg_value);
armv7m->core_cache->reg_list[num].valid = 1;
armv7m->core_cache->reg_list[num].dirty = 0;
@ -361,13 +361,13 @@ int armv7m_run_algorithm(struct target_s *target, int num_mem_params, mem_param_
if (armv7m_algorithm_info->common_magic != ARMV7M_COMMON_MAGIC)
{
ERROR("current target isn't an ARMV7M target");
LOG_ERROR("current target isn't an ARMV7M target");
return ERROR_TARGET_INVALID;
}
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -387,13 +387,13 @@ int armv7m_run_algorithm(struct target_s *target, int num_mem_params, mem_param_
if (!reg)
{
ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
exit(-1);
}
if (reg->size != reg_params[i].size)
{
ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name);
LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name);
exit(-1);
}
@ -404,7 +404,7 @@ int armv7m_run_algorithm(struct target_s *target, int num_mem_params, mem_param_
/* ARMV7M always runs in Thumb state */
if ((retval = breakpoint_add(target, exit_point, 2, BKPT_SOFT)) != ERROR_OK)
{
ERROR("can't add breakpoint to finish algorithm execution");
LOG_ERROR("can't add breakpoint to finish algorithm execution");
return ERROR_TARGET_FAILURE;
}
@ -419,7 +419,7 @@ int armv7m_run_algorithm(struct target_s *target, int num_mem_params, mem_param_
target->type->poll(target);
if ((timeout_ms -= 5) <= 0)
{
ERROR("timeout waiting for algorithm to complete, trying to halt target");
LOG_ERROR("timeout waiting for algorithm to complete, trying to halt target");
target->type->halt(target);
timeout_ms = 1000;
while (target->state != TARGET_HALTED)
@ -428,12 +428,12 @@ int armv7m_run_algorithm(struct target_s *target, int num_mem_params, mem_param_
target->type->poll(target);
if ((timeout_ms -= 10) <= 0)
{
ERROR("target didn't reenter debug state, exiting");
LOG_ERROR("target didn't reenter debug state, exiting");
exit(-1);
}
}
armv7m->load_core_reg_u32(target, ARMV7M_REGISTER_CORE_GP, 15, &pc);
DEBUG("failed algoritm halted at 0x%x ", pc);
LOG_DEBUG("failed algoritm halted at 0x%x ", pc);
retval = ERROR_TARGET_TIMEOUT;
}
}
@ -456,13 +456,13 @@ int armv7m_run_algorithm(struct target_s *target, int num_mem_params, mem_param_
if (!reg)
{
ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
exit(-1);
}
if (reg->size != reg_params[i].size)
{
ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name);
LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name);
exit(-1);
}
@ -478,7 +478,7 @@ int armv7m_arch_state(struct target_s *target)
/* get pointers to arch-specific information */
armv7m_common_t *armv7m = target->arch_info;
USER("target halted in %s state due to %s, current mode: %s %s\nxPSR: 0x%8.8x pc: 0x%8.8x",
LOG_USER("target halted in %s state due to %s, current mode: %s %s\nxPSR: 0x%8.8x pc: 0x%8.8x",
armv7m_state_strings[armv7m->core_state],
target_debug_reason_strings[target->debug_reason],
armv7m_mode_strings[armv7m->core_mode],
@ -642,7 +642,7 @@ int armv7m_checksum_memory(struct target_s *target, u32 address, u32 count, u32*
if ((retval = target->type->run_algorithm(target, 0, NULL, 2, reg_params,
crc_algorithm->address, crc_algorithm->address + (sizeof(cortex_m3_crc_code)-6), 20000, &armv7m_info)) != ERROR_OK)
{
ERROR("error executing cortex_m3 crc algorithm");
LOG_ERROR("error executing cortex_m3 crc algorithm");
destroy_reg_param(&reg_params[0]);
destroy_reg_param(&reg_params[1]);
target_free_working_area(target, crc_algorithm);

28
src/target/breakpoints.c
View File

@ -70,27 +70,27 @@ int breakpoint_add(target_t *target, u32 address, u32 length, enum breakpoint_ty
switch (retval)
{
case ERROR_TARGET_RESOURCE_NOT_AVAILABLE:
INFO("can't add %s breakpoint, resource not available", breakpoint_type_strings[(*breakpoint_p)->type]);
LOG_INFO("can't add %s breakpoint, resource not available", breakpoint_type_strings[(*breakpoint_p)->type]);
free((*breakpoint_p)->orig_instr);
free(*breakpoint_p);
*breakpoint_p = NULL;
return retval;
break;
case ERROR_TARGET_NOT_HALTED:
INFO("can't add breakpoint while target is running");
LOG_INFO("can't add breakpoint while target is running");
free((*breakpoint_p)->orig_instr);
free(*breakpoint_p);
*breakpoint_p = NULL;
return retval;
break;
default:
ERROR("unknown error");
LOG_ERROR("unknown error");
exit(-1);
break;
}
}
DEBUG("added %s breakpoint at 0x%8.8x of length 0x%8.8x",
LOG_DEBUG("added %s breakpoint at 0x%8.8x of length 0x%8.8x",
breakpoint_type_strings[(*breakpoint_p)->type],
(*breakpoint_p)->address, (*breakpoint_p)->length);
@ -118,11 +118,11 @@ int breakpoint_remove(target_t *target, u32 address)
switch (retval)
{
case ERROR_TARGET_NOT_HALTED:
INFO("can't remove breakpoint while target is running");
LOG_INFO("can't remove breakpoint while target is running");
return retval;
break;
default:
ERROR("unknown error");
LOG_ERROR("unknown error");
exit(-1);
break;
}
@ -133,7 +133,7 @@ int breakpoint_remove(target_t *target, u32 address)
}
else
{
ERROR("no breakpoint at address 0x%8.8x found", address);
LOG_ERROR("no breakpoint at address 0x%8.8x found", address);
}
return ERROR_OK;
@ -181,25 +181,25 @@ int watchpoint_add(target_t *target, u32 address, u32 length, enum watchpoint_rw
switch (retval)
{
case ERROR_TARGET_RESOURCE_NOT_AVAILABLE:
INFO("can't add %s watchpoint, resource not available", watchpoint_rw_strings[(*watchpoint_p)->rw]);
LOG_INFO("can't add %s watchpoint, resource not available", watchpoint_rw_strings[(*watchpoint_p)->rw]);
free (*watchpoint_p);
*watchpoint_p = NULL;
return retval;
break;
case ERROR_TARGET_NOT_HALTED:
INFO("can't add watchpoint while target is running");
LOG_INFO("can't add watchpoint while target is running");
free (*watchpoint_p);
*watchpoint_p = NULL;
return retval;
break;
default:
ERROR("unknown error");
LOG_ERROR("unknown error");
exit(-1);
break;
}
}
DEBUG("added %s watchpoint at 0x%8.8x of length 0x%8.8x",
LOG_DEBUG("added %s watchpoint at 0x%8.8x of length 0x%8.8x",
watchpoint_rw_strings[(*watchpoint_p)->rw],
(*watchpoint_p)->address, (*watchpoint_p)->length);
@ -227,11 +227,11 @@ int watchpoint_remove(target_t *target, u32 address)
switch (retval)
{
case ERROR_TARGET_NOT_HALTED:
INFO("can't remove watchpoint while target is running");
LOG_INFO("can't remove watchpoint while target is running");
return retval;
break;
default:
ERROR("unknown error");
LOG_ERROR("unknown error");
exit(-1);
break;
}
@ -241,7 +241,7 @@ int watchpoint_remove(target_t *target, u32 address)
}
else
{
ERROR("no watchpoint at address 0x%8.8x found", address);
LOG_ERROR("no watchpoint at address 0x%8.8x found", address);
}
return ERROR_OK;

130
src/target/cortex_m3.c
View File

@ -103,7 +103,7 @@ int cortex_m3_clear_halt(target_t *target)
ahbap_read_system_atomic_u32(swjdp, NVIC_DFSR, &cortex_m3->nvic_dfsr);
/* Write Debug Fault Status Register to enable processing to resume ?? Try with and without this !! */
ahbap_write_system_atomic_u32(swjdp, NVIC_DFSR, cortex_m3->nvic_dfsr);
DEBUG(" NVIC_DFSR 0x%x", cortex_m3->nvic_dfsr);
LOG_DEBUG(" NVIC_DFSR 0x%x", cortex_m3->nvic_dfsr);
return ERROR_OK;
}
@ -119,7 +119,7 @@ int cortex_m3_single_step_core(target_t *target)
ahbap_write_system_atomic_u32(swjdp, DCB_DHCSR, DBGKEY | C_MASKINTS | C_HALT | C_DEBUGEN );
ahbap_write_system_atomic_u32(swjdp, DCB_DHCSR, DBGKEY | C_MASKINTS | C_STEP | C_DEBUGEN );
cortex_m3->dcb_dhcsr |= C_MASKINTS;
DEBUG(" ");
LOG_DEBUG(" ");
cortex_m3_clear_halt(target);
return ERROR_OK;
@ -171,7 +171,7 @@ int cortex_m3_endreset_event(target_t *target)
cortex_m3_dwt_comparator_t *dwt_list = cortex_m3->dwt_comparator_list;
ahbap_read_system_atomic_u32(swjdp, DCB_DEMCR, &dcb_demcr);
DEBUG("DCB_DEMCR = 0x%8.8x",dcb_demcr);
LOG_DEBUG("DCB_DEMCR = 0x%8.8x",dcb_demcr);
ahbap_write_system_u32(swjdp, DCB_DCRDR, 0 );
@ -284,7 +284,7 @@ int cortex_m3_examine_exception_reason(target_t *target)
break;
}
swjdp_transaction_endcheck(swjdp);
DEBUG("%s SHCSR 0x%x, SR 0x%x, CFSR 0x%x, AR 0x%x", armv7m_exception_string(armv7m->exception_number), \
LOG_DEBUG("%s SHCSR 0x%x, SR 0x%x, CFSR 0x%x, AR 0x%x", armv7m_exception_string(armv7m->exception_number), \
shcsr, except_sr, cfsr, except_ar);
return ERROR_OK;
}
@ -300,7 +300,7 @@ int cortex_m3_debug_entry(target_t *target)
cortex_m3_common_t *cortex_m3 = armv7m->arch_info;
swjdp_common_t *swjdp = &cortex_m3->swjdp_info;
DEBUG(" ");
LOG_DEBUG(" ");
if (armv7m->pre_debug_entry)
armv7m->pre_debug_entry(target);
@ -342,7 +342,7 @@ int cortex_m3_debug_entry(target_t *target)
cortex_m3_examine_exception_reason(target);
}
DEBUG("entered debug state in core mode: %s at PC 0x%x, target->state: %s", armv7m_mode_strings[armv7m->core_mode], \
LOG_DEBUG("entered debug state in core mode: %s at PC 0x%x, target->state: %s", armv7m_mode_strings[armv7m->core_mode], \
*(u32*)(armv7m->core_cache->reg_list[15].value), target_state_strings[target->state]);
if (armv7m->post_debug_entry)
@ -384,7 +384,7 @@ int cortex_m3_poll(target_t *target)
if (target->state == TARGET_RESET)
{
/* Cannot switch context while running so endreset is called with target->state == TARGET_RESET */
DEBUG("Exit from reset with dcb_dhcsr 0x%x", cortex_m3->dcb_dhcsr);
LOG_DEBUG("Exit from reset with dcb_dhcsr 0x%x", cortex_m3->dcb_dhcsr);
cortex_m3_endreset_event(target);
target->state = TARGET_RUNNING;
prev_target_state = TARGET_RUNNING;
@ -403,7 +403,7 @@ int cortex_m3_poll(target_t *target)
}
if (prev_target_state == TARGET_DEBUG_RUNNING)
{
DEBUG(" ");
LOG_DEBUG(" ");
if ((retval = cortex_m3_debug_entry(target)) != ERROR_OK)
return retval;
@ -418,7 +418,7 @@ int cortex_m3_poll(target_t *target)
/* Read Debug Fault Status Register, added to figure out the lockup when running flashtest.script */
ahbap_read_system_atomic_u32(swjdp, NVIC_DFSR, &cortex_m3->nvic_dfsr);
DEBUG("dcb_dhcsr 0x%x, nvic_dfsr 0x%x, target->state: %s", cortex_m3->dcb_dhcsr, cortex_m3->nvic_dfsr, target_state_strings[target->state]);
LOG_DEBUG("dcb_dhcsr 0x%x, nvic_dfsr 0x%x, target->state: %s", cortex_m3->dcb_dhcsr, cortex_m3->nvic_dfsr, target_state_strings[target->state]);
return ERROR_OK;
}
@ -429,24 +429,24 @@ int cortex_m3_halt(target_t *target)
cortex_m3_common_t *cortex_m3 = armv7m->arch_info;
swjdp_common_t *swjdp = &cortex_m3->swjdp_info;
DEBUG("target->state: %s", target_state_strings[target->state]);
LOG_DEBUG("target->state: %s", target_state_strings[target->state]);
if (target->state == TARGET_HALTED)
{
WARNING("target was already halted");
LOG_WARNING("target was already halted");
return ERROR_OK;
}
if (target->state == TARGET_UNKNOWN)
{
WARNING("target was in unknown state when halt was requested");
LOG_WARNING("target was in unknown state when halt was requested");
}
if (target->state == TARGET_RESET)
{
if ((jtag_reset_config & RESET_SRST_PULLS_TRST) && jtag_srst)
{
ERROR("can't request a halt while in reset if nSRST pulls nTRST");
LOG_ERROR("can't request a halt while in reset if nSRST pulls nTRST");
return ERROR_TARGET_FAILURE;
}
else
@ -480,7 +480,7 @@ int cortex_m3_soft_reset_halt(struct target_s *target)
/* Check that we are using process_context, or change and print warning */
if (armv7m_get_context(target) != ARMV7M_PROCESS_CONTEXT)
{
DEBUG("Changing to process contex registers");
LOG_DEBUG("Changing to process contex registers");
armv7m_use_context(target, ARMV7M_PROCESS_CONTEXT);
}
@ -502,12 +502,12 @@ int cortex_m3_soft_reset_halt(struct target_s *target)
ahbap_read_system_atomic_u32(swjdp, NVIC_DFSR, &cortex_m3->nvic_dfsr);
if ((dcb_dhcsr & S_HALT) && (cortex_m3->nvic_dfsr & DFSR_VCATCH))
{
DEBUG("system reset-halted, dcb_dhcsr 0x%x, nvic_dfsr 0x%x", dcb_dhcsr, cortex_m3->nvic_dfsr);
LOG_DEBUG("system reset-halted, dcb_dhcsr 0x%x, nvic_dfsr 0x%x", dcb_dhcsr, cortex_m3->nvic_dfsr);
cortex_m3_poll(target);
return ERROR_OK;
}
else
DEBUG("waiting for system reset-halt, dcb_dhcsr 0x%x, %i ms", dcb_dhcsr, timeout);
LOG_DEBUG("waiting for system reset-halt, dcb_dhcsr 0x%x, %i ms", dcb_dhcsr, timeout);
}
timeout++;
usleep(1000);
@ -533,7 +533,7 @@ int cortex_m3_prepare_reset_halt(struct target_s *target)
ahbap_read_system_atomic_u32(swjdp, DCB_DHCSR, &dcb_dhcsr);
ahbap_read_system_atomic_u32(swjdp, DCB_DEMCR, &dcb_demcr);
DEBUG("dcb_dhcsr 0x%x, dcb_demcr 0x%x, ", dcb_dhcsr, dcb_demcr);
LOG_DEBUG("dcb_dhcsr 0x%x, dcb_demcr 0x%x, ", dcb_dhcsr, dcb_demcr);
return ERROR_OK;
}
@ -549,7 +549,7 @@ int cortex_m3_resume(struct target_s *target, int current, u32 address, int hand
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -558,7 +558,7 @@ int cortex_m3_resume(struct target_s *target, int current, u32 address, int hand
/* Check that we are using process_context, or change and print warning */
if (armv7m_get_context(target) != ARMV7M_PROCESS_CONTEXT)
{
DEBUG("Incorrect context in resume");
LOG_DEBUG("Incorrect context in resume");
armv7m_use_context(target, ARMV7M_PROCESS_CONTEXT);
}
@ -575,7 +575,7 @@ int cortex_m3_resume(struct target_s *target, int current, u32 address, int hand
/* Check that we are using debug_context, or change and print warning */
if (armv7m_get_context(target) != ARMV7M_DEBUG_CONTEXT)
{
DEBUG("Incorrect context in debug_exec resume");
LOG_DEBUG("Incorrect context in debug_exec resume");
armv7m_use_context(target, ARMV7M_DEBUG_CONTEXT);
}
/* Disable interrupts */
@ -608,7 +608,7 @@ int cortex_m3_resume(struct target_s *target, int current, u32 address, int hand
/* Single step past breakpoint at current address */
if ((breakpoint = breakpoint_find(target, resume_pc)))
{
DEBUG("unset breakpoint at 0x%8.8x", breakpoint->address);
LOG_DEBUG("unset breakpoint at 0x%8.8x", breakpoint->address);
cortex_m3_unset_breakpoint(target, breakpoint);
cortex_m3_single_step_core(target);
cortex_m3_set_breakpoint(target, breakpoint);
@ -629,13 +629,13 @@ int cortex_m3_resume(struct target_s *target, int current, u32 address, int hand
{
target->state = TARGET_RUNNING;
target_call_event_callbacks(target, TARGET_EVENT_RESUMED);
DEBUG("target resumed at 0x%x",resume_pc);
LOG_DEBUG("target resumed at 0x%x",resume_pc);
}
else
{
target->state = TARGET_DEBUG_RUNNING;
target_call_event_callbacks(target, TARGET_EVENT_DEBUG_RESUMED);
DEBUG("target debug resumed at 0x%x",resume_pc);
LOG_DEBUG("target debug resumed at 0x%x",resume_pc);
}
return ERROR_OK;
@ -652,14 +652,14 @@ int cortex_m3_step(struct target_s *target, int current, u32 address, int handle
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
/* Check that we are using process_context, or change and print warning */
if (armv7m_get_context(target) != ARMV7M_PROCESS_CONTEXT)
{
WARNING("Incorrect context in step, must be process");
LOG_WARNING("Incorrect context in step, must be process");
armv7m_use_context(target, ARMV7M_PROCESS_CONTEXT);
}
@ -690,12 +690,12 @@ int cortex_m3_step(struct target_s *target, int current, u32 address, int handle
if (breakpoint)
cortex_m3_set_breakpoint(target, breakpoint);
DEBUG("target stepped dcb_dhcsr = 0x%x nvic_icsr = 0x%x", cortex_m3->dcb_dhcsr, cortex_m3->nvic_icsr);
LOG_DEBUG("target stepped dcb_dhcsr = 0x%x nvic_icsr = 0x%x", cortex_m3->dcb_dhcsr, cortex_m3->nvic_icsr);
cortex_m3_debug_entry(target);
target_call_event_callbacks(target, TARGET_EVENT_HALTED);
DEBUG("target stepped dcb_dhcsr = 0x%x nvic_icsr = 0x%x", cortex_m3->dcb_dhcsr, cortex_m3->nvic_icsr);
LOG_DEBUG("target stepped dcb_dhcsr = 0x%x nvic_icsr = 0x%x", cortex_m3->dcb_dhcsr, cortex_m3->nvic_icsr);
return ERROR_OK;
}
@ -706,7 +706,7 @@ int cortex_m3_assert_reset(target_t *target)
cortex_m3_common_t *cortex_m3 = armv7m->arch_info;
swjdp_common_t *swjdp = &cortex_m3->swjdp_info;
DEBUG("target->state: %s", target_state_strings[target->state]);
LOG_DEBUG("target->state: %s", target_state_strings[target->state]);
ahbap_write_system_u32(swjdp, DCB_DCRDR, 0 );
@ -735,7 +735,7 @@ int cortex_m3_assert_reset(target_t *target)
}
else
{
ERROR("unknown error");
LOG_ERROR("unknown error");
exit(-1);
}
}
@ -763,7 +763,7 @@ int cortex_m3_assert_reset(target_t *target)
}
else if (retval != ERROR_OK)
{
ERROR("unknown error");
LOG_ERROR("unknown error");
exit(-1);
}
}
@ -780,7 +780,7 @@ int cortex_m3_assert_reset(target_t *target)
int cortex_m3_deassert_reset(target_t *target)
{
DEBUG("target->state: %s", target_state_strings[target->state]);
LOG_DEBUG("target->state: %s", target_state_strings[target->state]);
/* deassert reset lines */
jtag_add_reset(0, 0);
@ -819,7 +819,7 @@ int cortex_m3_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
if (breakpoint->set)
{
WARNING("breakpoint already set");
LOG_WARNING("breakpoint already set");
return ERROR_OK;
}
@ -834,8 +834,8 @@ int cortex_m3_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
fp_num++;
if (fp_num >= cortex_m3->fp_num_code)
{
DEBUG("ERROR Can not find free FP Comparator");
WARNING("ERROR Can not find free FP Comparator");
LOG_DEBUG("ERROR Can not find free FP Comparator");
LOG_WARNING("ERROR Can not find free FP Comparator");
exit(-1);
}
breakpoint->set = fp_num + 1;
@ -843,7 +843,7 @@ int cortex_m3_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
comparator_list[fp_num].used = 1;
comparator_list[fp_num].fpcr_value = (breakpoint->address & 0x1FFFFFFC) | hilo | 1;
target_write_u32(target, comparator_list[fp_num].fpcr_address, comparator_list[fp_num].fpcr_value);
DEBUG("fpc_num %i fpcr_value 0x%x", fp_num, comparator_list[fp_num].fpcr_value);
LOG_DEBUG("fpc_num %i fpcr_value 0x%x", fp_num, comparator_list[fp_num].fpcr_value);
}
else if (breakpoint->type == BKPT_SOFT)
{
@ -866,7 +866,7 @@ int cortex_m3_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint
if (!breakpoint->set)
{
WARNING("breakpoint not set");
LOG_WARNING("breakpoint not set");
return ERROR_OK;
}
@ -875,7 +875,7 @@ int cortex_m3_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint
int fp_num = breakpoint->set - 1;
if ((fp_num < 0) || (fp_num >= cortex_m3->fp_num_code))
{
DEBUG("Invalid FP Comparator number in breakpoint");
LOG_DEBUG("Invalid FP Comparator number in breakpoint");
return ERROR_OK;
}
comparator_list[fp_num].used = 0;
@ -912,25 +912,25 @@ int cortex_m3_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
if ((breakpoint->type == BKPT_HARD) && (breakpoint->address >= 0x20000000))
{
INFO("flash patch comparator requested outside code memory region");
LOG_INFO("flash patch comparator requested outside code memory region");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
if ((breakpoint->type == BKPT_SOFT) && (breakpoint->address < 0x20000000))
{
INFO("soft breakpoint requested in code (flash) memory region");
LOG_INFO("soft breakpoint requested in code (flash) memory region");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
if ((breakpoint->type == BKPT_HARD) && (cortex_m3->fp_code_available < 1))
{
INFO("no flash patch comparator unit available for hardware breakpoint");
LOG_INFO("no flash patch comparator unit available for hardware breakpoint");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
if ((breakpoint->length != 2))
{
INFO("only breakpoints of two bytes length supported");
LOG_INFO("only breakpoints of two bytes length supported");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
@ -949,7 +949,7 @@ int cortex_m3_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoin
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -981,7 +981,7 @@ int cortex_m3_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
if (watchpoint->set)
{
WARNING("watchpoint already set");
LOG_WARNING("watchpoint already set");
return ERROR_OK;
}
@ -991,8 +991,8 @@ int cortex_m3_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
dwt_num++;
if (dwt_num >= cortex_m3->dwt_num_comp)
{
DEBUG("ERROR Can not find free DWT Comparator");
WARNING("ERROR Can not find free DWT Comparator");
LOG_DEBUG("ERROR Can not find free DWT Comparator");
LOG_WARNING("ERROR Can not find free DWT Comparator");
return -1;
}
watchpoint->set = dwt_num + 1;
@ -1010,11 +1010,11 @@ int cortex_m3_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
target_write_u32(target, comparator_list[dwt_num].dwt_comparator_address, comparator_list[dwt_num].comp);
target_write_u32(target, comparator_list[dwt_num].dwt_comparator_address|0x4, comparator_list[dwt_num].mask);
target_write_u32(target, comparator_list[dwt_num].dwt_comparator_address|0x8, comparator_list[dwt_num].function);
DEBUG("dwt_num %i 0x%x 0x%x 0x%x", dwt_num, comparator_list[dwt_num].comp, comparator_list[dwt_num].mask, comparator_list[dwt_num].function);
LOG_DEBUG("dwt_num %i 0x%x 0x%x 0x%x", dwt_num, comparator_list[dwt_num].comp, comparator_list[dwt_num].mask, comparator_list[dwt_num].function);
}
else
{
WARNING("Cannot watch data values"); /* Move this test to add_watchpoint */
LOG_WARNING("Cannot watch data values"); /* Move this test to add_watchpoint */
return ERROR_OK;
}
@ -1032,7 +1032,7 @@ int cortex_m3_unset_watchpoint(struct target_s *target, watchpoint_t *watchpoint
if (!watchpoint->set)
{
WARNING("watchpoint not set");
LOG_WARNING("watchpoint not set");
return ERROR_OK;
}
@ -1040,7 +1040,7 @@ int cortex_m3_unset_watchpoint(struct target_s *target, watchpoint_t *watchpoint
if ((dwt_num < 0) || (dwt_num >= cortex_m3->dwt_num_comp))
{
DEBUG("Invalid DWT Comparator number in watchpoint");
LOG_DEBUG("Invalid DWT Comparator number in watchpoint");
return ERROR_OK;
}
comparator_list[dwt_num].used = 0;
@ -1060,7 +1060,7 @@ int cortex_m3_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -1087,7 +1087,7 @@ int cortex_m3_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoin
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -1129,10 +1129,10 @@ int cortex_m3_load_core_reg_u32(struct target_s *target, enum armv7m_regtype typ
if (retval != ERROR_OK)
{
ERROR("JTAG failure %i",retval);
LOG_ERROR("JTAG failure %i",retval);
return ERROR_JTAG_DEVICE_ERROR;
}
DEBUG("load from core reg %i value 0x%x",num,*value);
LOG_DEBUG("load from core reg %i value 0x%x",num,*value);
}
else if (type == ARMV7M_REGISTER_CORE_SP) /* Special purpose core register */
{
@ -1152,7 +1152,7 @@ int cortex_m3_load_core_reg_u32(struct target_s *target, enum armv7m_regtype typ
armv7m->core_cache->reg_list[15].dirty = armv7m->core_cache->reg_list[15].valid;
ahbap_write_system_u32(swjdp, 0x20000000, savedram);
swjdp_transaction_endcheck(swjdp);
DEBUG("load from special reg %i value 0x%x", SYSm, *value);
LOG_DEBUG("load from special reg %i value 0x%x", SYSm, *value);
}
else
{
@ -1176,11 +1176,11 @@ int cortex_m3_store_core_reg_u32(struct target_s *target, enum armv7m_regtype ty
retval = ahbap_write_coreregister_u32(swjdp, value, num);
if (retval != ERROR_OK)
{
ERROR("JTAG failure %i", retval);
LOG_ERROR("JTAG failure %i", retval);
armv7m->core_cache->reg_list[num].dirty = armv7m->core_cache->reg_list[num].valid;
return ERROR_JTAG_DEVICE_ERROR;
}
DEBUG("write core reg %i value 0x%x", num, value);
LOG_DEBUG("write core reg %i value 0x%x", num, value);
}
else if (type == ARMV7M_REGISTER_CORE_SP) /* Special purpose core register */
{
@ -1201,7 +1201,7 @@ int cortex_m3_store_core_reg_u32(struct target_s *target, enum armv7m_regtype ty
armv7m->core_cache->reg_list[15].dirty = armv7m->core_cache->reg_list[15].valid;
ahbap_write_system_u32(swjdp, 0x20000000, savedram);
swjdp_transaction_endcheck(swjdp);
DEBUG("write special reg %i value 0x%x ", SYSm, value);
LOG_DEBUG("write special reg %i value 0x%x ", SYSm, value);
}
else
{
@ -1237,7 +1237,7 @@ int cortex_m3_read_memory(struct target_s *target, u32 address, u32 size, u32 co
retval = ahbap_read_buf_u8(swjdp, buffer, count, address);
break;
default:
ERROR("BUG: we shouldn't get here");
LOG_ERROR("BUG: we shouldn't get here");
exit(-1);
}
@ -1268,7 +1268,7 @@ int cortex_m3_write_memory(struct target_s *target, u32 address, u32 size, u32 c
retval = ahbap_write_buf_u8(swjdp, buffer, count, address);
break;
default:
ERROR("BUG: we shouldn't get here");
LOG_ERROR("BUG: we shouldn't get here");
exit(-1);
}
@ -1301,8 +1301,8 @@ int cortex_m3_init_target(struct command_context_s *cmd_ctx, struct target_s *ta
/* Read from Device Identification Registers */
target_read_u32(target, CPUID, &cpuid);
if (((cpuid >> 4) & 0xc3f) == 0xc23)
DEBUG("CORTEX-M3 processor detected");
DEBUG("cpuid: 0x%8.8x", cpuid);
LOG_DEBUG("CORTEX-M3 processor detected");
LOG_DEBUG("cpuid: 0x%8.8x", cpuid);
target_read_u32(target, NVIC_ICTR, &ictr);
cortex_m3->intlinesnum = (ictr & 0x1F) + 1;
@ -1310,7 +1310,7 @@ int cortex_m3_init_target(struct command_context_s *cmd_ctx, struct target_s *ta
for (i = 0; i < cortex_m3->intlinesnum; i++)
{
target_read_u32(target, NVIC_ISE0 + 4 * i, cortex_m3->intsetenable + i);
DEBUG("interrupt enable[%i] = 0x%8.8x", i, cortex_m3->intsetenable[i]);
LOG_DEBUG("interrupt enable[%i] = 0x%8.8x", i, cortex_m3->intsetenable[i]);
}
/* Setup FPB */
@ -1325,7 +1325,7 @@ int cortex_m3_init_target(struct command_context_s *cmd_ctx, struct target_s *ta
cortex_m3->fp_comparator_list[i].type = (i < cortex_m3->fp_num_code) ? FPCR_CODE : FPCR_LITERAL;
cortex_m3->fp_comparator_list[i].fpcr_address = FP_COMP0 + 4 * i;
}
DEBUG("FPB fpcr 0x%x, numcode %i, numlit %i", fpcr, cortex_m3->fp_num_code, cortex_m3->fp_num_lit);
LOG_DEBUG("FPB fpcr 0x%x, numcode %i, numlit %i", fpcr, cortex_m3->fp_num_code, cortex_m3->fp_num_lit);
/* Setup DWT */
target_read_u32(target, DWT_CTRL, &dwtcr);
@ -1354,7 +1354,7 @@ int cortex_m3_dcc_read(swjdp_common_t *swjdp, u8 *value, u8 *ctrl)
*ctrl = (u8)dcrdr;
*value = (u8)(dcrdr >> 8);
DEBUG("data 0x%x ctrl 0x%x", *value, *ctrl);
LOG_DEBUG("data 0x%x ctrl 0x%x", *value, *ctrl);
/* write ack back to software dcc register
* signify we have read data */
@ -1470,7 +1470,7 @@ int cortex_m3_target_command(struct command_context_s *cmd_ctx, char *cmd, char
if (argc < 4)
{
ERROR("'target cortex_m3' requires at least one additional argument");
LOG_ERROR("'target cortex_m3' requires at least one additional argument");
exit(-1);
}

42
src/target/cortex_swjdp.c
View File

@ -187,13 +187,13 @@ int swjdp_transaction_endcheck(swjdp_common_t *swjdp)
waitcount++;
if (waitcount > 100)
{
WARNING("Timeout waiting for ACK = OK/FAULT in SWJDP transaction");
LOG_WARNING("Timeout waiting for ACK = OK/FAULT in SWJDP transaction");
return ERROR_JTAG_DEVICE_ERROR;
}
}
else
{
WARNING("Invalid ACK in SWJDP transaction");
LOG_WARNING("Invalid ACK in SWJDP transaction");
return ERROR_JTAG_DEVICE_ERROR;
}
@ -205,7 +205,7 @@ int swjdp_transaction_endcheck(swjdp_common_t *swjdp)
/* Check for STICKYERR and STICKYORUN */
if (ctrlstat & (SSTICKYORUN | SSTICKYERR))
{
DEBUG("swjdp: CTRL/STAT error 0x%x", ctrlstat);
LOG_DEBUG("swjdp: CTRL/STAT error 0x%x", ctrlstat);
/* Check power to debug regions */
if ((ctrlstat & 0xf0000000) != 0xf0000000)
{
@ -216,24 +216,24 @@ int swjdp_transaction_endcheck(swjdp_common_t *swjdp)
u32 dcb_dhcsr,nvic_shcsr, nvic_bfar, nvic_cfsr;
if (ctrlstat & SSTICKYORUN)
ERROR("SWJ-DP OVERRUN - check clock or reduce jtag speed");
LOG_ERROR("SWJ-DP OVERRUN - check clock or reduce jtag speed");
if (ctrlstat & SSTICKYERR)
ERROR("SWJ-DP STICKY ERROR");
LOG_ERROR("SWJ-DP STICKY ERROR");
/* Clear Sticky Error Bits */
scan_inout_check_u32(swjdp, SWJDP_IR_DPACC, DP_CTRL_STAT, DPAP_WRITE, swjdp->dp_ctrl_stat | SSTICKYORUN | SSTICKYERR, NULL);
scan_inout_check_u32(swjdp, SWJDP_IR_DPACC, DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
jtag_execute_queue();
DEBUG("swjdp: status 0x%x", ctrlstat);
LOG_DEBUG("swjdp: status 0x%x", ctrlstat);
/* Can we find out the reason for the error ?? */
ahbap_read_system_atomic_u32(swjdp, DCB_DHCSR, &dcb_dhcsr);
ahbap_read_system_atomic_u32(swjdp, NVIC_SHCSR, &nvic_shcsr);
ahbap_read_system_atomic_u32(swjdp, NVIC_CFSR, &nvic_cfsr);
ahbap_read_system_atomic_u32(swjdp, NVIC_BFAR, &nvic_bfar);
ERROR("dcb_dhcsr 0x%x, nvic_shcsr 0x%x, nvic_cfsr 0x%x, nvic_bfar 0x%x", dcb_dhcsr, nvic_shcsr, nvic_cfsr, nvic_bfar);
LOG_ERROR("dcb_dhcsr 0x%x, nvic_shcsr 0x%x, nvic_cfsr 0x%x, nvic_bfar 0x%x", dcb_dhcsr, nvic_shcsr, nvic_cfsr, nvic_bfar);
}
jtag_execute_queue();
return ERROR_JTAG_DEVICE_ERROR;
@ -317,13 +317,13 @@ int ahbap_setup_accessport(swjdp_common_t *swjdp, u32 csw, u32 tar)
csw = csw | CSW_DBGSWENABLE | CSW_MASTER_DEBUG | CSW_HPROT;
if (csw != swjdp->ap_csw_value)
{
/* DEBUG("swjdp : Set CSW %x",csw); */
/* LOG_DEBUG("swjdp : Set CSW %x",csw); */
ahbap_write_reg_u32(swjdp, AHBAP_CSW, csw );
swjdp->ap_csw_value = csw;
}
if (tar != swjdp->ap_tar_value)
{
/* DEBUG("swjdp : Set TAR %x",tar); */
/* LOG_DEBUG("swjdp : Set TAR %x",tar); */
ahbap_write_reg_u32(swjdp, AHBAP_TAR, tar );
swjdp->ap_tar_value = tar;
}
@ -452,7 +452,7 @@ int ahbap_write_buf_u32(swjdp_common_t *swjdp, u8 *buffer, int count, u32 addres
if (errorcount > 1)
{
WARNING("Block write error address 0x%x, wcount 0x%x", address, wcount);
LOG_WARNING("Block write error address 0x%x, wcount 0x%x", address, wcount);
return ERROR_JTAG_DEVICE_ERROR;
}
}
@ -495,7 +495,7 @@ int ahbap_write_buf_packed_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32
{
if (ahbap_write_buf_u16(swjdp, buffer, nbytes, address) != ERROR_OK)
{
WARNING("Block read error address 0x%x, count 0x%x", address, count);
LOG_WARNING("Block read error address 0x%x, count 0x%x", address, count);
return ERROR_JTAG_DEVICE_ERROR;
}
@ -516,7 +516,7 @@ int ahbap_write_buf_packed_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32
ahbap_write_reg_u32(swjdp, AHBAP_DRW, outvalue);
if (swjdp_transaction_endcheck(swjdp) != ERROR_OK)
{
WARNING("Block read error address 0x%x, count 0x%x", address, count);
LOG_WARNING("Block read error address 0x%x, count 0x%x", address, count);
return ERROR_JTAG_DEVICE_ERROR;
}
}
@ -586,7 +586,7 @@ int ahbap_write_buf_packed_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32
{
if (ahbap_write_buf_u8(swjdp, buffer, nbytes, address) != ERROR_OK)
{
WARNING("Block read error address 0x%x, count 0x%x", address, count);
LOG_WARNING("Block read error address 0x%x, count 0x%x", address, count);
return ERROR_JTAG_DEVICE_ERROR;
}
@ -607,7 +607,7 @@ int ahbap_write_buf_packed_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32
ahbap_write_reg_u32(swjdp, AHBAP_DRW, outvalue);
if (swjdp_transaction_endcheck(swjdp) != ERROR_OK)
{
WARNING("Block read error address 0x%x, count 0x%x", address, count);
LOG_WARNING("Block read error address 0x%x, count 0x%x", address, count);
return ERROR_JTAG_DEVICE_ERROR;
}
}
@ -700,7 +700,7 @@ int ahbap_read_buf_u32(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address
if (errorcount > 1)
{
WARNING("Block read error address 0x%x, count 0x%x", address, count);
LOG_WARNING("Block read error address 0x%x, count 0x%x", address, count);
return ERROR_JTAG_DEVICE_ERROR;
}
}
@ -756,7 +756,7 @@ int ahbap_read_buf_packed_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32
ahbap_read_reg_u32(swjdp, AHBAP_DRW, &invalue );
if (swjdp_transaction_endcheck(swjdp) != ERROR_OK)
{
WARNING("Block read error address 0x%x, count 0x%x", address, count);
LOG_WARNING("Block read error address 0x%x, count 0x%x", address, count);
return ERROR_JTAG_DEVICE_ERROR;
}
@ -841,7 +841,7 @@ int ahbap_read_buf_packed_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32 a
ahbap_read_reg_u32(swjdp, AHBAP_DRW, &invalue );
if (swjdp_transaction_endcheck(swjdp) != ERROR_OK)
{
WARNING("Block read error address 0x%x, count 0x%x", address, count);
LOG_WARNING("Block read error address 0x%x, count 0x%x", address, count);
return ERROR_JTAG_DEVICE_ERROR;
}
@ -942,7 +942,7 @@ int ahbap_debugport_init(swjdp_common_t *swjdp)
u32 ctrlstat;
int cnt = 0;
DEBUG(" ");
LOG_DEBUG(" ");
swjdp->ap_csw_value = -1;
swjdp->ap_tar_value = -1;
@ -960,7 +960,7 @@ int ahbap_debugport_init(swjdp_common_t *swjdp)
/* Check that we have debug power domains activated */
while (!(ctrlstat & CDBGPWRUPACK) && (cnt++ < 10))
{
DEBUG("swjdp: wait CDBGPWRUPACK");
LOG_DEBUG("swjdp: wait CDBGPWRUPACK");
swjdp_read_dpacc(swjdp, &ctrlstat, DP_CTRL_STAT);
jtag_execute_queue();
usleep(10000);
@ -968,7 +968,7 @@ int ahbap_debugport_init(swjdp_common_t *swjdp)
while (!(ctrlstat & CSYSPWRUPACK) && (cnt++ < 10))
{
DEBUG("swjdp: wait CSYSPWRUPACK");
LOG_DEBUG("swjdp: wait CSYSPWRUPACK");
swjdp_read_dpacc(swjdp, &ctrlstat, DP_CTRL_STAT);
jtag_execute_queue();
usleep(10000);
@ -983,7 +983,7 @@ int ahbap_debugport_init(swjdp_common_t *swjdp)
ahbap_read_reg_u32(swjdp, 0xFC, &idreg);
ahbap_read_reg_u32(swjdp, 0xF8, &romaddr);
DEBUG("AHB-AP ID Register 0x%x, Debug ROM Address 0x%x", idreg, romaddr);
LOG_DEBUG("AHB-AP ID Register 0x%x, Debug ROM Address 0x%x", idreg, romaddr);
return ERROR_OK;
}

16
src/target/embeddedice.c
View File

@ -149,7 +149,7 @@ reg_cache_t* embeddedice_build_reg_cache(target_t *target, arm7_9_common_t *arm7
arm7_9->has_single_step = 1;
break;
case 3:
ERROR("EmbeddedICE version 3 detected, EmbeddedICE handling might be broken");
LOG_ERROR("EmbeddedICE version 3 detected, EmbeddedICE handling might be broken");
reg_list[EICE_DBG_CTRL].size = 6;
reg_list[EICE_DBG_STAT].size = 5;
arm7_9->has_single_step = 1;
@ -172,13 +172,13 @@ reg_cache_t* embeddedice_build_reg_cache(target_t *target, arm7_9_common_t *arm7
arm7_9->has_monitor_mode = 1;
break;
case 7:
WARNING("EmbeddedICE version 7 detected, EmbeddedICE handling might be broken");
LOG_WARNING("EmbeddedICE version 7 detected, EmbeddedICE handling might be broken");
reg_list[EICE_DBG_CTRL].size = 6;
reg_list[EICE_DBG_STAT].size = 5;
arm7_9->has_monitor_mode = 1;
break;
default:
ERROR("unknown EmbeddedICE version (comms ctrl: 0x%8.8x)", buf_get_u32(reg_list[EICE_COMMS_CTRL].value, 0, 32));
LOG_ERROR("unknown EmbeddedICE version (comms ctrl: 0x%8.8x)", buf_get_u32(reg_list[EICE_COMMS_CTRL].value, 0, 32));
}
/* explicitly disable monitor mode */
@ -197,13 +197,13 @@ int embeddedice_get_reg(reg_t *reg)
{
if (embeddedice_read_reg(reg) != ERROR_OK)
{
ERROR("BUG: error scheduling EmbeddedICE register read");
LOG_ERROR("BUG: error scheduling EmbeddedICE register read");
exit(-1);
}
if (jtag_execute_queue() != ERROR_OK)
{
ERROR("register read failed");
LOG_ERROR("register read failed");
}
return ERROR_OK;
@ -346,7 +346,7 @@ int embeddedice_set_reg(reg_t *reg, u32 value)
{
if (embeddedice_write_reg(reg, value) != ERROR_OK)
{
ERROR("BUG: error scheduling EmbeddedICE register write");
LOG_ERROR("BUG: error scheduling EmbeddedICE register write");
exit(-1);
}
@ -363,7 +363,7 @@ int embeddedice_set_reg_w_exec(reg_t *reg, u8 *buf)
if (jtag_execute_queue() != ERROR_OK)
{
ERROR("register write failed");
LOG_ERROR("register write failed");
exit(-1);
}
return ERROR_OK;
@ -373,7 +373,7 @@ int embeddedice_write_reg(reg_t *reg, u32 value)
{
embeddedice_reg_t *ice_reg = reg->arch_info;
DEBUG("%i: 0x%8.8x", ice_reg->addr, value);
LOG_DEBUG("%i: 0x%8.8x", ice_reg->addr, value);
jtag_add_end_state(TAP_RTI);
arm_jtag_scann(ice_reg->jtag_info, 0x2);

26
src/target/etb.c
View File

@ -162,13 +162,13 @@ int etb_get_reg(reg_t *reg)
{
if (etb_read_reg(reg) != ERROR_OK)
{
ERROR("BUG: error scheduling etm register read");
LOG_ERROR("BUG: error scheduling etm register read");
exit(-1);
}
if (jtag_execute_queue() != ERROR_OK)
{
ERROR("register read failed");
LOG_ERROR("register read failed");
}
return ERROR_OK;
@ -248,7 +248,7 @@ int etb_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
u8 reg_addr = etb_reg->addr & 0x7f;
scan_field_t fields[3];
DEBUG("%i", etb_reg->addr);
LOG_DEBUG("%i", etb_reg->addr);
jtag_add_end_state(TAP_RTI);
etb_scann(etb_reg->etb, 0x0);
@ -313,7 +313,7 @@ int etb_set_reg(reg_t *reg, u32 value)
{
if (etb_write_reg(reg, value) != ERROR_OK)
{
ERROR("BUG: error scheduling etm register write");
LOG_ERROR("BUG: error scheduling etm register write");
exit(-1);
}
@ -330,7 +330,7 @@ int etb_set_reg_w_exec(reg_t *reg, u8 *buf)
if (jtag_execute_queue() != ERROR_OK)
{
ERROR("register write failed");
LOG_ERROR("register write failed");
exit(-1);
}
return ERROR_OK;
@ -342,7 +342,7 @@ int etb_write_reg(reg_t *reg, u32 value)
u8 reg_addr = etb_reg->addr & 0x7f;
scan_field_t fields[3];
DEBUG("%i: 0x%8.8x", etb_reg->addr, value);
LOG_DEBUG("%i: 0x%8.8x", etb_reg->addr, value);
jtag_add_end_state(TAP_RTI);
etb_scann(etb_reg->etb, 0x0);
@ -415,7 +415,7 @@ int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cmd, char
if (argc != 2)
{
ERROR("incomplete 'etb config <target> <chain_pos>' command");
LOG_ERROR("incomplete 'etb config <target> <chain_pos>' command");
exit(-1);
}
@ -423,7 +423,7 @@ int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cmd, char
if (!target)
{
ERROR("target number '%s' not defined", args[0]);
LOG_ERROR("target number '%s' not defined", args[0]);
exit(-1);
}
@ -437,7 +437,7 @@ int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cmd, char
if (!jtag_device)
{
ERROR("jtag device number '%s' not defined", args[1]);
LOG_ERROR("jtag device number '%s' not defined", args[1]);
exit(-1);
}
@ -455,7 +455,7 @@ int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cmd, char
}
else
{
ERROR("target has no ETM defined, ETB left unconfigured");
LOG_ERROR("target has no ETM defined, ETB left unconfigured");
}
return ERROR_OK;
@ -516,13 +516,13 @@ trace_status_t etb_status(etm_context_t *etm_ctx)
if (etb_timeout == 0)
{
ERROR("AcqComp set but DFEmpty won't go high, ETB status: 0x%x",
LOG_ERROR("AcqComp set but DFEmpty won't go high, ETB status: 0x%x",
buf_get_u32(etb_status_reg->value, 0, etb_status_reg->size));
}
if (!(etm_ctx->capture_status && TRACE_TRIGGERED))
{
ERROR("trace completed, but no trigger condition detected");
LOG_ERROR("trace completed, but no trigger condition detected");
}
etm_ctx->capture_status &= ~TRACE_RUNNING;
@ -693,7 +693,7 @@ int etb_start_capture(etm_context_t *etm_ctx)
{
if ((etm_ctx->portmode & ETM_PORT_WIDTH_MASK) != ETM_PORT_8BIT)
{
ERROR("ETB can't run in demultiplexed mode with a 4 or 16 bit port");
LOG_ERROR("ETB can't run in demultiplexed mode with a 4 or 16 bit port");
return ERROR_ETM_PORTMODE_NOT_SUPPORTED;
}
etb_ctrl_value |= 0x2;

38
src/target/etm.c
View File

@ -278,7 +278,7 @@ reg_cache_t* etm_build_reg_cache(target_t *target, arm_jtag_t *jtag_info, etm_co
if (!etb)
{
ERROR("etb selected as etm capture driver, but no ETB configured");
LOG_ERROR("etb selected as etm capture driver, but no ETB configured");
return ERROR_OK;
}
@ -289,7 +289,7 @@ reg_cache_t* etm_build_reg_cache(target_t *target, arm_jtag_t *jtag_info, etm_co
if (etm_ctx->capture_driver->init(etm_ctx) != ERROR_OK)
{
ERROR("ETM capture driver initialization failed");
LOG_ERROR("ETM capture driver initialization failed");
exit(-1);
}
@ -300,13 +300,13 @@ int etm_get_reg(reg_t *reg)
{
if (etm_read_reg(reg) != ERROR_OK)
{
ERROR("BUG: error scheduling etm register read");
LOG_ERROR("BUG: error scheduling etm register read");
exit(-1);
}
if (jtag_execute_queue() != ERROR_OK)
{
ERROR("register read failed");
LOG_ERROR("register read failed");
}
return ERROR_OK;
@ -318,7 +318,7 @@ int etm_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
u8 reg_addr = etm_reg->addr & 0x7f;
scan_field_t fields[3];
DEBUG("%i", etm_reg->addr);
LOG_DEBUG("%i", etm_reg->addr);
jtag_add_end_state(TAP_RTI);
arm_jtag_scann(etm_reg->jtag_info, 0x6);
@ -378,7 +378,7 @@ int etm_set_reg(reg_t *reg, u32 value)
{
if (etm_write_reg(reg, value) != ERROR_OK)
{
ERROR("BUG: error scheduling etm register write");
LOG_ERROR("BUG: error scheduling etm register write");
exit(-1);
}
@ -395,7 +395,7 @@ int etm_set_reg_w_exec(reg_t *reg, u8 *buf)
if (jtag_execute_queue() != ERROR_OK)
{
ERROR("register write failed");
LOG_ERROR("register write failed");
exit(-1);
}
return ERROR_OK;
@ -407,7 +407,7 @@ int etm_write_reg(reg_t *reg, u32 value)
u8 reg_addr = etm_reg->addr & 0x7f;
scan_field_t fields[3];
DEBUG("%i: 0x%8.8x", etm_reg->addr, value);
LOG_DEBUG("%i: 0x%8.8x", etm_reg->addr, value);
jtag_add_end_state(TAP_RTI);
arm_jtag_scann(etm_reg->jtag_info, 0x6);
@ -526,7 +526,7 @@ int etm_read_instruction(etm_context_t *ctx, arm_instruction_t *instruction)
ctx->current_pc - ctx->image->sections[section].base_address,
4, buf, &size_read)) != ERROR_OK)
{
ERROR("error while reading instruction: %i", retval);
LOG_ERROR("error while reading instruction: %i", retval);
return ERROR_TRACE_INSTRUCTION_UNAVAILABLE;
}
opcode = target_buffer_get_u32(ctx->target, buf);
@ -539,7 +539,7 @@ int etm_read_instruction(etm_context_t *ctx, arm_instruction_t *instruction)
ctx->current_pc - ctx->image->sections[section].base_address,
2, buf, &size_read)) != ERROR_OK)
{
ERROR("error while reading instruction: %i", retval);
LOG_ERROR("error while reading instruction: %i", retval);
return ERROR_TRACE_INSTRUCTION_UNAVAILABLE;
}
opcode = target_buffer_get_u16(ctx->target, buf);
@ -547,12 +547,12 @@ int etm_read_instruction(etm_context_t *ctx, arm_instruction_t *instruction)
}
else if (ctx->core_state == ARMV4_5_STATE_JAZELLE)
{
ERROR("BUG: tracing of jazelle code not supported");
LOG_ERROR("BUG: tracing of jazelle code not supported");
exit(-1);
}
else
{
ERROR("BUG: unknown core state encountered");
LOG_ERROR("BUG: unknown core state encountered");
exit(-1);
}
@ -724,7 +724,7 @@ int etmv1_data(etm_context_t *ctx, int size, u32 *data)
if (size == 8)
{
ERROR("TODO: add support for 64-bit values");
LOG_ERROR("TODO: add support for 64-bit values");
return -1;
}
else if (size == 4)
@ -808,7 +808,7 @@ int etmv1_analyze_trace(etm_context_t *ctx, struct command_context_s *cmd_ctx)
/* a positive return values means the current branch was abandoned,
* and a new branch was encountered in cycle ctx->pipe_index + retval;
*/
WARNING("abandoned branch encountered, correctnes of analysis uncertain");
LOG_WARNING("abandoned branch encountered, correctnes of analysis uncertain");
ctx->pipe_index += retval;
continue;
}
@ -853,7 +853,7 @@ int etmv1_analyze_trace(etm_context_t *ctx, struct command_context_s *cmd_ctx)
}
break;
default: /* reserved */
ERROR("BUG: branch reason code 0x%x is reserved", ctx->last_branch_reason);
LOG_ERROR("BUG: branch reason code 0x%x is reserved", ctx->last_branch_reason);
exit(-1);
break;
}
@ -1223,7 +1223,7 @@ int handle_etm_config_command(struct command_context_s *cmd_ctx, char *cmd, char
if (argc != 5)
{
ERROR("incomplete 'etm config <target> <port_width> <port_mode> <clocking> <capture_driver>' command");
LOG_ERROR("incomplete 'etm config <target> <port_width> <port_mode> <clocking> <capture_driver>' command");
exit(-1);
}
@ -1231,7 +1231,7 @@ int handle_etm_config_command(struct command_context_s *cmd_ctx, char *cmd, char
if (!target)
{
ERROR("target number '%s' not defined", args[0]);
LOG_ERROR("target number '%s' not defined", args[0]);
exit(-1);
}
@ -1309,7 +1309,7 @@ int handle_etm_config_command(struct command_context_s *cmd_ctx, char *cmd, char
{
/* no supported capture driver found, don't register an ETM */
free(etm_ctx);
ERROR("trace capture driver '%s' not found", args[4]);
LOG_ERROR("trace capture driver '%s' not found", args[4]);
return ERROR_OK;
}
@ -1393,7 +1393,7 @@ int handle_etm_info_command(struct command_context_s *cmd_ctx, char *cmd, char *
max_port_size = 16;
break;
default:
ERROR("Illegal max_port_size");
LOG_ERROR("Illegal max_port_size");
exit(-1);
}
command_print(cmd_ctx, "max. port size: %i", max_port_size);

4
src/target/etm_dummy.c
View File

@ -46,7 +46,7 @@ int handle_etm_dummy_config_command(struct command_context_s *cmd_ctx, char *cmd
if (!target)
{
ERROR("target number '%s' not defined", args[0]);
LOG_ERROR("target number '%s' not defined", args[0]);
exit(-1);
}
@ -62,7 +62,7 @@ int handle_etm_dummy_config_command(struct command_context_s *cmd_ctx, char *cmd
}
else
{
ERROR("target has no ETM defined, ETM dummy left unconfigured");
LOG_ERROR("target has no ETM defined, ETM dummy left unconfigured");
}
return ERROR_OK;

16
src/target/feroceon.c
View File

@ -229,7 +229,7 @@ void feroceon_write_xpsr(target_t *target, u32 xpsr, int spsr)
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
DEBUG("xpsr: %8.8x, spsr: %i", xpsr, spsr);
LOG_DEBUG("xpsr: %8.8x, spsr: %i", xpsr, spsr);
arm9tdmi_clock_out(jtag_info, ARMV4_5_MSR_IM(xpsr & 0xff, 0, 1, spsr), 0, NULL, 0);
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
@ -270,7 +270,7 @@ void feroceon_write_xpsr_im8(target_t *target, u8 xpsr_im, int rot, int spsr)
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
DEBUG("xpsr_im: %2.2x, rot: %i, spsr: %i", xpsr_im, rot, spsr);
LOG_DEBUG("xpsr_im: %2.2x, rot: %i, spsr: %i", xpsr_im, rot, spsr);
arm9tdmi_clock_out(jtag_info, ARMV4_5_MSR_IM(xpsr_im, rot, 1, spsr), 0, NULL, 0);
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
@ -320,7 +320,7 @@ void feroceon_branch_resume(target_t *target)
void feroceon_branch_resume_thumb(target_t *target)
{
DEBUG("-");
LOG_DEBUG("-");
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
@ -415,7 +415,7 @@ void feroceon_enable_single_step(target_t *target)
u32 current_pc, current_opcode;
current_pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32);
target_read_u32(target, current_pc, &current_opcode);
ERROR("BUG: couldn't calculate PC of next instruction, "
LOG_ERROR("BUG: couldn't calculate PC of next instruction, "
"current opcode is 0x%8.8x", current_opcode);
next_pc = current_pc;
}
@ -501,7 +501,7 @@ int feroceon_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buf
/* make sure we have a working area */
if (target_alloc_working_area(target, dcc_size, &arm7_9->dcc_working_area) != ERROR_OK)
{
INFO("no working area available, falling back to memory writes");
LOG_INFO("no working area available, falling back to memory writes");
return target->type->write_memory(target, address, 4, count, buffer);
}
@ -578,7 +578,7 @@ int feroceon_init_target(struct command_context_s *cmd_ctx, struct target_s *tar
/* the COMMS_CTRL bits are all contiguous */
if (buf_get_u32(arm7_9->eice_cache->reg_list[EICE_COMMS_CTRL].value, 2, 4) != 6)
ERROR("unexpected Feroceon EICE version signature");
LOG_ERROR("unexpected Feroceon EICE version signature");
arm7_9->eice_cache->reg_list[EICE_DBG_CTRL].size = 6;
arm7_9->eice_cache->reg_list[EICE_DBG_STAT].size = 5;
@ -613,7 +613,7 @@ int feroceon_target_command(struct command_context_s *cmd_ctx, char *cmd, char *
if (argc < 4)
{
ERROR("'target arm926ejs' requires at least one additional argument");
LOG_ERROR("'target arm926ejs' requires at least one additional argument");
exit(-1);
}
@ -622,7 +622,7 @@ int feroceon_target_command(struct command_context_s *cmd_ctx, char *cmd, char *
if (argc >= 5)
variant = args[4];
DEBUG("chain_pos: %i, variant: %s", chain_pos, variant);
LOG_DEBUG("chain_pos: %i, variant: %s", chain_pos, variant);
arm926ejs_init_arch_info(target, arm926ejs, chain_pos, variant);

50
src/target/image.c
View File

@ -70,7 +70,7 @@ static int autodetect_image_type(image_t *image, char *url)
/* check header against known signatures */
if (strncmp((char*)buffer,ELFMAG,SELFMAG)==0)
{
DEBUG("ELF image detected.");
LOG_DEBUG("ELF image detected.");
image->type = IMAGE_ELF;
}
else if ((buffer[0]==':') /* record start byte */
@ -83,7 +83,7 @@ static int autodetect_image_type(image_t *image, char *url)
&&(buffer[7]=='0') /* record type : 00 -> 05 */
&&(buffer[8]>='0')&&(buffer[8]<'6'))
{
DEBUG("IHEX image detected.");
LOG_DEBUG("IHEX image detected.");
image->type = IMAGE_IHEX;
}
else if ((buffer[0] == 'S') /* record start byte */
@ -92,7 +92,7 @@ static int autodetect_image_type(image_t *image, char *url)
&&(isxdigit(buffer[3]))
&&(buffer[1] >= '0') && (buffer[1] < '9'))
{
DEBUG("S19 image detected.");
LOG_DEBUG("S19 image detected.");
image->type = IMAGE_SRECORD;
}
else
@ -315,7 +315,7 @@ int image_ihex_buffer_complete(image_t *image)
}
else
{
ERROR("unhandled IHEX record type: %i", record_type);
LOG_ERROR("unhandled IHEX record type: %i", record_type);
return ERROR_IMAGE_FORMAT_ERROR;
}
@ -325,12 +325,12 @@ int image_ihex_buffer_complete(image_t *image)
if ((u8)checksum != (u8)(~cal_checksum + 1))
{
/* checksum failed */
ERROR("incorrect record checksum found in IHEX file");
LOG_ERROR("incorrect record checksum found in IHEX file");
return ERROR_IMAGE_CHECKSUM;
}
}
ERROR("premature end of IHEX file, no end-of-file record found");
LOG_ERROR("premature end of IHEX file, no end-of-file record found");
return ERROR_IMAGE_FORMAT_ERROR;
}
@ -345,23 +345,23 @@ int image_elf_read_headers(image_t *image)
if ((retval = fileio_read(&elf->fileio, sizeof(Elf32_Ehdr), (u8*)elf->header, &read_bytes)) != ERROR_OK)
{
ERROR("cannot read ELF file header, read failed");
LOG_ERROR("cannot read ELF file header, read failed");
return ERROR_FILEIO_OPERATION_FAILED;
}
if (read_bytes != sizeof(Elf32_Ehdr))
{
ERROR("cannot read ELF file header, only partially read");
LOG_ERROR("cannot read ELF file header, only partially read");
return ERROR_FILEIO_OPERATION_FAILED;
}
if (strncmp((char*)elf->header->e_ident,ELFMAG,SELFMAG)!=0)
{
ERROR("invalid ELF file, bad magic number");
LOG_ERROR("invalid ELF file, bad magic number");
return ERROR_IMAGE_FORMAT_ERROR;
}
if (elf->header->e_ident[EI_CLASS]!=ELFCLASS32)
{
ERROR("invalid ELF file, only 32bits files are supported");
LOG_ERROR("invalid ELF file, only 32bits files are supported");
return ERROR_IMAGE_FORMAT_ERROR;
}
@ -370,20 +370,20 @@ int image_elf_read_headers(image_t *image)
if ((elf->endianness!=ELFDATA2LSB)
&&(elf->endianness!=ELFDATA2MSB))
{
ERROR("invalid ELF file, unknown endianess setting");
LOG_ERROR("invalid ELF file, unknown endianess setting");
return ERROR_IMAGE_FORMAT_ERROR;
}
elf->segment_count = field16(elf,elf->header->e_phnum);
if (elf->segment_count==0)
{
ERROR("invalid ELF file, no program headers");
LOG_ERROR("invalid ELF file, no program headers");
return ERROR_IMAGE_FORMAT_ERROR;
}
if ((retval = fileio_seek(&elf->fileio, field32(elf,elf->header->e_phoff))) != ERROR_OK)
{
ERROR("cannot seek to ELF program header table, read failed");
LOG_ERROR("cannot seek to ELF program header table, read failed");
return retval;
}
@ -391,12 +391,12 @@ int image_elf_read_headers(image_t *image)
if ((retval = fileio_read(&elf->fileio, elf->segment_count*sizeof(Elf32_Phdr), (u8*)elf->segments, &read_bytes)) != ERROR_OK)
{
ERROR("cannot read ELF segment headers, read failed");
LOG_ERROR("cannot read ELF segment headers, read failed");
return retval;
}
if (read_bytes != elf->segment_count*sizeof(Elf32_Phdr))
{
ERROR("cannot read ELF segment headers, only partially read");
LOG_ERROR("cannot read ELF segment headers, only partially read");
return ERROR_FILEIO_OPERATION_FAILED;
}
@ -434,24 +434,24 @@ int image_elf_read_section(image_t *image, int section, u32 offset, u32 size, u8
*size_read = 0;
DEBUG("load segment %d at 0x%x (sz=0x%x)",section,offset,size);
LOG_DEBUG("load segment %d at 0x%x (sz=0x%x)",section,offset,size);
/* read initialized data in current segment if any */
if (offset<field32(elf,segment->p_filesz))
{
/* maximal size present in file for the current segment */
read_size = MIN(size, field32(elf,segment->p_filesz)-offset);
DEBUG("read elf: size = 0x%x at 0x%x",read_size,
LOG_DEBUG("read elf: size = 0x%x at 0x%x",read_size,
field32(elf,segment->p_offset)+offset);
/* read initialized area of the segment */
if ((retval = fileio_seek(&elf->fileio, field32(elf,segment->p_offset)+offset)) != ERROR_OK)
{
ERROR("cannot find ELF segment content, seek failed");
LOG_ERROR("cannot find ELF segment content, seek failed");
return retval;
}
if ((retval = fileio_read(&elf->fileio, read_size, buffer, &really_read)) != ERROR_OK)
{
ERROR("cannot read ELF segment content, read failed");
LOG_ERROR("cannot read ELF segment content, read failed");
return retval;
}
buffer += read_size;
@ -613,7 +613,7 @@ int image_mot_buffer_complete(image_t *image)
}
else
{
ERROR("unhandled S19 record type: %i", record_type);
LOG_ERROR("unhandled S19 record type: %i", record_type);
return ERROR_IMAGE_FORMAT_ERROR;
}
@ -625,12 +625,12 @@ int image_mot_buffer_complete(image_t *image)
if( cal_checksum != 0xFF )
{
/* checksum failed */
ERROR("incorrect record checksum found in S19 file");
LOG_ERROR("incorrect record checksum found in S19 file");
return ERROR_IMAGE_CHECKSUM;
}
}
ERROR("premature end of S19 file, no end-of-file record found");
LOG_ERROR("premature end of S19 file, no end-of-file record found");
return ERROR_IMAGE_FORMAT_ERROR;
}
@ -673,7 +673,7 @@ int image_open(image_t *image, char *url, char *type_string)
if ((retval = image_ihex_buffer_complete(image)) != ERROR_OK)
{
ERROR("failed buffering IHEX image, check daemon output for additional information");
LOG_ERROR("failed buffering IHEX image, check daemon output for additional information");
fileio_close(&image_ihex->fileio);
return retval;
}
@ -724,7 +724,7 @@ int image_open(image_t *image, char *url, char *type_string)
if ((retval = image_mot_buffer_complete(image)) != ERROR_OK)
{
ERROR("failed buffering S19 image, check daemon output for additional information");
LOG_ERROR("failed buffering S19 image, check daemon output for additional information");
fileio_close(&image_mot->fileio);
return retval;
}
@ -761,7 +761,7 @@ int image_read_section(image_t *image, int section, u32 offset, u32 size, u8 *bu
/* don't read past the end of a section */
if (offset + size > image->sections[section].size)
{
DEBUG("read past end of section: 0x%8.8x + 0x%8.8x > 0x%8.8x",
LOG_DEBUG("read past end of section: 0x%8.8x + 0x%8.8x > 0x%8.8x",
offset, size, image->sections[section].size);
return ERROR_INVALID_ARGUMENTS;
}

18
src/target/oocd_trace.c
View File

@ -54,7 +54,7 @@ int oocd_trace_read_reg(oocd_trace_t *oocd_trace, int reg, u32 *value)
bytes_to_read -= bytes_read;
}
DEBUG("reg #%i: 0x%8.8x\n", reg, *value);
LOG_DEBUG("reg #%i: 0x%8.8x\n", reg, *value);
return ERROR_OK;
}
@ -71,7 +71,7 @@ int oocd_trace_write_reg(oocd_trace_t *oocd_trace, int reg, u32 value)
data[4] = (value & 0xff000000) >> 24;
bytes_written = write(oocd_trace->tty_fd, data, 5);
DEBUG("reg #%i: 0x%8.8x\n", reg, value);
LOG_DEBUG("reg #%i: 0x%8.8x\n", reg, value);
return ERROR_OK;
}
@ -93,7 +93,7 @@ int oocd_trace_read_memory(oocd_trace_t *oocd_trace, u8 *data, u32 address, u32
if ((bytes_read = read(oocd_trace->tty_fd,
((u8*)data) + (size * 16) - bytes_to_read, bytes_to_read)) < 0)
{
DEBUG("read() returned %i (%s)", bytes_read, strerror(errno));
LOG_DEBUG("read() returned %i (%s)", bytes_read, strerror(errno));
}
else
bytes_to_read -= bytes_read;
@ -112,7 +112,7 @@ int oocd_trace_init(etm_context_t *etm_ctx)
if(oocd_trace->tty_fd < 0)
{
ERROR("can't open tty");
LOG_ERROR("can't open tty");
return ERROR_ETM_CAPTURE_INIT_FAILED;
}
@ -143,7 +143,7 @@ int oocd_trace_init(etm_context_t *etm_ctx)
* read up any leftover characters to ensure communication is in sync */
while ((bytes_read = read(oocd_trace->tty_fd, trash, sizeof(trash))) > 0)
{
DEBUG("%i bytes read\n", bytes_read);
LOG_DEBUG("%i bytes read\n", bytes_read);
};
return ERROR_OK;
@ -248,7 +248,7 @@ int oocd_trace_start_capture(etm_context_t *etm_ctx)
if (((etm_ctx->portmode & ETM_PORT_MODE_MASK) != ETM_PORT_NORMAL)
|| ((etm_ctx->portmode & ETM_PORT_WIDTH_MASK) != ETM_PORT_4BIT))
{
DEBUG("OpenOCD+trace only supports normal 4-bit ETM mode");
LOG_DEBUG("OpenOCD+trace only supports normal 4-bit ETM mode");
return ERROR_ETM_PORTMODE_NOT_SUPPORTED;
}
@ -303,7 +303,7 @@ int handle_oocd_trace_config_command(struct command_context_s *cmd_ctx, char *cm
if (argc != 2)
{
ERROR("incomplete 'oocd_trace config <target> <tty>' command");
LOG_ERROR("incomplete 'oocd_trace config <target> <tty>' command");
exit(-1);
}
@ -327,7 +327,7 @@ int handle_oocd_trace_config_command(struct command_context_s *cmd_ctx, char *cm
}
else
{
ERROR("target has no ETM defined, OpenOCD+trace left unconfigured");
LOG_ERROR("target has no ETM defined, OpenOCD+trace left unconfigured");
}
return ERROR_OK;
@ -409,7 +409,7 @@ int handle_oocd_trace_resync_command(struct command_context_s *cmd_ctx, char *cm
bytes_written = write(oocd_trace->tty_fd, cmd_array, 1);
command_print(cmd_ctx, "requesting traceclock resync");
DEBUG("resyncing traceclk pll");
LOG_DEBUG("resyncing traceclk pll");
return ERROR_OK;
}

100
src/target/target.c
View File

@ -211,7 +211,7 @@ target_t* get_current_target(command_context_t *cmd_ctx)
if (target == NULL)
{
ERROR("BUG: current_target out of bounds");
LOG_ERROR("BUG: current_target out of bounds");
exit(-1);
}
@ -233,11 +233,11 @@ int target_init_handler(struct target_s *target, enum target_event event, void *
script = open_file_from_path(target->reset_script, "r");
if (!script)
{
ERROR("couldn't open script file %s", target->reset_script);
LOG_ERROR("couldn't open script file %s", target->reset_script);
return ERROR_OK;
}
INFO("executing reset script '%s'", target->reset_script);
LOG_INFO("executing reset script '%s'", target->reset_script);
command_run_file(cmd_ctx, script, COMMAND_EXEC);
fclose(script);
@ -330,7 +330,7 @@ int target_process_reset(struct command_context_s *cmd_ctx)
target_register_event_callback(target_init_handler, cmd_ctx);
break;
default:
ERROR("BUG: unknown target->reset_mode");
LOG_ERROR("BUG: unknown target->reset_mode");
}
target = target->next;
}
@ -362,12 +362,12 @@ int target_process_reset(struct command_context_s *cmd_ctx)
{
if ((now.tv_sec > timeout.tv_sec) || ((now.tv_sec == timeout.tv_sec) && (now.tv_usec >= timeout.tv_usec)))
{
USER("Timed out waiting for reset");
LOG_USER("Timed out waiting for reset");
goto done;
}
/* this will send alive messages on e.g. GDB remote protocol. */
usleep(500*1000);
USER_N("%s", ""); /* avoid warning about zero length formatting message*/
LOG_USER_N("%s", ""); /* avoid warning about zero length formatting message*/
goto again;
}
}
@ -409,7 +409,7 @@ int target_init(struct command_context_s *cmd_ctx)
{
if (target->type->init_target(cmd_ctx, target) != ERROR_OK)
{
ERROR("target '%s' init failed", target->type->name);
LOG_ERROR("target '%s' init failed", target->type->name);
exit(-1);
}
@ -563,7 +563,7 @@ int target_call_event_callbacks(target_t *target, enum target_event event)
target_event_callback_t *callback = target_event_callbacks;
target_event_callback_t *next_callback;
DEBUG("target event %i", event);
LOG_DEBUG("target event %i", event);
while (callback)
{
@ -651,7 +651,7 @@ int target_alloc_working_area(struct target_s *target, u32 size, working_area_t
/* only allocate multiples of 4 byte */
if (size % 4)
{
ERROR("BUG: code tried to allocate unaligned number of bytes, padding");
LOG_ERROR("BUG: code tried to allocate unaligned number of bytes, padding");
size = CEIL(size, 4);
}
@ -673,7 +673,7 @@ int target_alloc_working_area(struct target_s *target, u32 size, working_area_t
u32 first_free = target->working_area;
u32 free_size = target->working_area_size;
DEBUG("allocating new working area");
LOG_DEBUG("allocating new working area");
c = target->working_areas;
while (c)
@ -686,7 +686,7 @@ int target_alloc_working_area(struct target_s *target, u32 size, working_area_t
if (free_size < size)
{
WARNING("not enough working area available(requested %d, free %d)", size, free_size);
LOG_WARNING("not enough working area available(requested %d, free %d)", size, free_size);
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
@ -777,11 +777,11 @@ int target_arch_state(struct target_s *target)
int retval;
if (target==NULL)
{
USER("No target has been configured");
LOG_USER("No target has been configured");
return ERROR_OK;
}
USER("target state: %s", target_state_strings[target->state]);
LOG_USER("target state: %s", target_state_strings[target->state]);
if (target->state!=TARGET_HALTED)
return ERROR_OK;
@ -798,7 +798,7 @@ int target_write_buffer(struct target_s *target, u32 address, u32 size, u8 *buff
{
int retval;
DEBUG("writing buffer of %i byte at 0x%8.8x", size, address);
LOG_DEBUG("writing buffer of %i byte at 0x%8.8x", size, address);
if (((address % 2) == 0) && (size == 2))
{
@ -862,7 +862,7 @@ int target_read_buffer(struct target_s *target, u32 address, u32 size, u8 *buffe
{
int retval;
DEBUG("reading buffer of %i byte at 0x%8.8x", size, address);
LOG_DEBUG("reading buffer of %i byte at 0x%8.8x", size, address);
if (((address % 2) == 0) && (size == 2))
{
@ -921,7 +921,7 @@ int target_checksum_memory(struct target_s *target, u32 address, u32 size, u32*
buffer = malloc(size);
if (buffer == NULL)
{
ERROR("error allocating buffer for section (%d bytes)", size);
LOG_ERROR("error allocating buffer for section (%d bytes)", size);
return ERROR_INVALID_ARGUMENTS;
}
retval = target_read_buffer(target, address, size, buffer);
@ -957,12 +957,12 @@ int target_read_u32(struct target_s *target, u32 address, u32 *value)
if (retval == ERROR_OK)
{
*value = target_buffer_get_u32(target, value_buf);
DEBUG("address: 0x%8.8x, value: 0x%8.8x", address, *value);
LOG_DEBUG("address: 0x%8.8x, value: 0x%8.8x", address, *value);
}
else
{
*value = 0x0;
DEBUG("address: 0x%8.8x failed", address);
LOG_DEBUG("address: 0x%8.8x failed", address);
}
return retval;
@ -977,12 +977,12 @@ int target_read_u16(struct target_s *target, u32 address, u16 *value)
if (retval == ERROR_OK)
{
*value = target_buffer_get_u16(target, value_buf);
DEBUG("address: 0x%8.8x, value: 0x%4.4x", address, *value);
LOG_DEBUG("address: 0x%8.8x, value: 0x%4.4x", address, *value);
}
else
{
*value = 0x0;
DEBUG("address: 0x%8.8x failed", address);
LOG_DEBUG("address: 0x%8.8x failed", address);
}
return retval;
@ -994,12 +994,12 @@ int target_read_u8(struct target_s *target, u32 address, u8 *value)
if (retval == ERROR_OK)
{
DEBUG("address: 0x%8.8x, value: 0x%2.2x", address, *value);
LOG_DEBUG("address: 0x%8.8x, value: 0x%2.2x", address, *value);
}
else
{
*value = 0x0;
DEBUG("address: 0x%8.8x failed", address);
LOG_DEBUG("address: 0x%8.8x failed", address);
}
return retval;
@ -1010,12 +1010,12 @@ int target_write_u32(struct target_s *target, u32 address, u32 value)
int retval;
u8 value_buf[4];
DEBUG("address: 0x%8.8x, value: 0x%8.8x", address, value);
LOG_DEBUG("address: 0x%8.8x, value: 0x%8.8x", address, value);
target_buffer_set_u32(target, value_buf, value);
if ((retval = target->type->write_memory(target, address, 4, 1, value_buf)) != ERROR_OK)
{
DEBUG("failed: %i", retval);
LOG_DEBUG("failed: %i", retval);
}
return retval;
@ -1026,12 +1026,12 @@ int target_write_u16(struct target_s *target, u32 address, u16 value)
int retval;
u8 value_buf[2];
DEBUG("address: 0x%8.8x, value: 0x%8.8x", address, value);
LOG_DEBUG("address: 0x%8.8x, value: 0x%8.8x", address, value);
target_buffer_set_u16(target, value_buf, value);
if ((retval = target->type->write_memory(target, address, 2, 1, value_buf)) != ERROR_OK)
{
DEBUG("failed: %i", retval);
LOG_DEBUG("failed: %i", retval);
}
return retval;
@ -1041,11 +1041,11 @@ int target_write_u8(struct target_s *target, u32 address, u8 value)
{
int retval;
DEBUG("address: 0x%8.8x, value: 0x%2.2x", address, value);
LOG_DEBUG("address: 0x%8.8x, value: 0x%2.2x", address, value);
if ((retval = target->type->read_memory(target, address, 1, 1, &value)) != ERROR_OK)
{
DEBUG("failed: %i", retval);
LOG_DEBUG("failed: %i", retval);
}
return retval;
@ -1141,7 +1141,7 @@ int handle_target_command(struct command_context_s *cmd_ctx, char *cmd, char **a
/* register target specific commands */
if (target_types[i]->register_commands(cmd_ctx) != ERROR_OK)
{
ERROR("couldn't register '%s' commands", args[0]);
LOG_ERROR("couldn't register '%s' commands", args[0]);
exit(-1);
}
@ -1162,7 +1162,7 @@ int handle_target_command(struct command_context_s *cmd_ctx, char *cmd, char **a
(*last_target_p)->endianness = TARGET_LITTLE_ENDIAN;
else
{
ERROR("endianness must be either 'little' or 'big', not '%s'", args[1]);
LOG_ERROR("endianness must be either 'little' or 'big', not '%s'", args[1]);
return ERROR_COMMAND_SYNTAX_ERROR;
}
@ -1179,7 +1179,7 @@ int handle_target_command(struct command_context_s *cmd_ctx, char *cmd, char **a
(*last_target_p)->reset_mode = RESET_RUN_AND_INIT;
else
{
ERROR("unknown target startup mode %s", args[2]);
LOG_ERROR("unknown target startup mode %s", args[2]);
return ERROR_COMMAND_SYNTAX_ERROR;
}
(*last_target_p)->run_and_halt_time = 1000; /* default 1s */
@ -1226,7 +1226,7 @@ int handle_target_command(struct command_context_s *cmd_ctx, char *cmd, char **a
/* no matching target found */
if (!found)
{
ERROR("target '%s' not found", args[0]);
LOG_ERROR("target '%s' not found", args[0]);
return ERROR_COMMAND_SYNTAX_ERROR;
}
@ -1240,7 +1240,7 @@ int handle_target_script_command(struct command_context_s *cmd_ctx, char *cmd, c
if (argc < 3)
{
ERROR("incomplete target_script command");
LOG_ERROR("incomplete target_script command");
return ERROR_COMMAND_SYNTAX_ERROR;
}
@ -1277,7 +1277,7 @@ int handle_target_script_command(struct command_context_s *cmd_ctx, char *cmd, c
}
else
{
ERROR("unknown event type: '%s", args[1]);
LOG_ERROR("unknown event type: '%s", args[1]);
return ERROR_COMMAND_SYNTAX_ERROR;
}
@ -1337,7 +1337,7 @@ int handle_working_area_command(struct command_context_s *cmd_ctx, char *cmd, ch
}
else
{
ERROR("unrecognized <backup|nobackup> argument (%s)", args[3]);
LOG_ERROR("unrecognized <backup|nobackup> argument (%s)", args[3]);
return ERROR_COMMAND_SYNTAX_ERROR;
}
@ -1359,7 +1359,7 @@ int handle_target(void *priv)
if (target_continous_poll)
if ((retval = target->type->poll(target)) != ERROR_OK)
{
ERROR("couldn't poll target(%d). It's due for a reset.", retval);
LOG_ERROR("couldn't poll target(%d). It's due for a reset.", retval);
}
}
@ -1376,7 +1376,7 @@ int handle_reg_command(struct command_context_s *cmd_ctx, char *cmd, char **args
int count = 0;
char *value;
DEBUG("-");
LOG_DEBUG("-");
target = get_current_target(cmd_ctx);
@ -1451,7 +1451,7 @@ int handle_reg_command(struct command_context_s *cmd_ctx, char *cmd, char **args
reg_arch_type_t *arch_type = register_get_arch_type(reg->arch_type);
if (arch_type == NULL)
{
ERROR("BUG: encountered unregistered arch type");
LOG_ERROR("BUG: encountered unregistered arch type");
return ERROR_OK;
}
arch_type->get(reg);
@ -1471,7 +1471,7 @@ int handle_reg_command(struct command_context_s *cmd_ctx, char *cmd, char **args
reg_arch_type_t *arch_type = register_get_arch_type(reg->arch_type);
if (arch_type == NULL)
{
ERROR("BUG: encountered unregistered arch type");
LOG_ERROR("BUG: encountered unregistered arch type");
return ERROR_OK;
}
@ -1575,7 +1575,7 @@ static int wait_state(struct command_context_s *cmd_ctx, char *cmd, enum target_
gettimeofday(&now, NULL);
if ((now.tv_sec > timeout.tv_sec) || ((now.tv_sec == timeout.tv_sec) && (now.tv_usec >= timeout.tv_usec)))
{
ERROR("timed out while waiting for target %s", target_state_strings[state]);
LOG_ERROR("timed out while waiting for target %s", target_state_strings[state]);
break;
}
}
@ -1588,7 +1588,7 @@ int handle_halt_command(struct command_context_s *cmd_ctx, char *cmd, char **arg
int retval;
target_t *target = get_current_target(cmd_ctx);
DEBUG("-");
LOG_DEBUG("-");
if ((retval = target->type->halt(target)) != ERROR_OK)
{
@ -1615,7 +1615,7 @@ int handle_daemon_startup_command(struct command_context_s *cmd_ctx, char *cmd,
}
}
WARNING("invalid daemon_startup configuration directive: %s", args[0]);
LOG_WARNING("invalid daemon_startup configuration directive: %s", args[0]);
return ERROR_OK;
}
@ -1624,7 +1624,7 @@ int handle_soft_reset_halt_command(struct command_context_s *cmd_ctx, char *cmd,
{
target_t *target = get_current_target(cmd_ctx);
USER("requesting target halt and executing a soft reset");
LOG_USER("requesting target halt and executing a soft reset");
target->type->soft_reset_halt(target);
@ -1637,7 +1637,7 @@ int handle_reset_command(struct command_context_s *cmd_ctx, char *cmd, char **ar
enum target_reset_mode reset_mode = target->reset_mode;
enum target_reset_mode save = target->reset_mode;
DEBUG("-");
LOG_DEBUG("-");
if (argc >= 1)
{
@ -1705,7 +1705,7 @@ int handle_step_command(struct command_context_s *cmd_ctx, char *cmd, char **arg
{
target_t *target = get_current_target(cmd_ctx);
DEBUG("-");
LOG_DEBUG("-");
if (argc == 0)
target->type->step(target, 1, 0, 1); /* current pc, addr = 0, handle breakpoints */
@ -1789,7 +1789,7 @@ int handle_md_command(struct command_context_s *cmd_ctx, char *cmd, char **args,
}
} else
{
ERROR("Failure examining memory");
LOG_ERROR("Failure examining memory");
}
free(buffer);
@ -1830,7 +1830,7 @@ int handle_mw_command(struct command_context_s *cmd_ctx, char *cmd, char **args,
}
if (retval!=ERROR_OK)
{
ERROR("Failure examining memory");
LOG_ERROR("Failure examining memory");
}
return ERROR_OK;
@ -2012,7 +2012,7 @@ int handle_verify_image_command(struct command_context_s *cmd_ctx, char *cmd, ch
if (!target)
{
ERROR("no target selected");
LOG_ERROR("no target selected");
return ERROR_OK;
}
@ -2152,7 +2152,7 @@ int handle_bp_command(struct command_context_s *cmd_ctx, char *cmd, char **args,
if ((retval = breakpoint_add(target, strtoul(args[0], NULL, 0), length, hw)) != ERROR_OK)
{
ERROR("Failure setting breakpoints");
LOG_ERROR("Failure setting breakpoints");
}
else
{
@ -2228,7 +2228,7 @@ int handle_wp_command(struct command_context_s *cmd_ctx, char *cmd, char **args,
if ((retval = watchpoint_add(target, strtoul(args[0], NULL, 0),
strtoul(args[1], NULL, 0), type, data_value, data_mask)) != ERROR_OK)
{
ERROR("Failure setting breakpoints");
LOG_ERROR("Failure setting breakpoints");
}
}
else

10
src/target/target_request.c
View File

@ -42,7 +42,7 @@ int target_asciimsg(target_t *target, u32 length)
target->type->target_request_data(target, CEIL(length, 4), (u8*)msg);
msg[length] = 0;
DEBUG("%s", msg);
LOG_DEBUG("%s", msg);
while (c)
{
@ -55,7 +55,7 @@ int target_asciimsg(target_t *target, u32 length)
int target_charmsg(target_t *target, u8 msg)
{
USER_N("%c", msg);
LOG_USER_N("%c", msg);
return ERROR_OK;
}
@ -68,7 +68,7 @@ int target_hexmsg(target_t *target, int size, u32 length)
debug_msg_receiver_t *c = target->dbgmsg;
int i;
DEBUG("size: %i, length: %i", size, length);
LOG_DEBUG("size: %i, length: %i", size, length);
target->type->target_request_data(target, CEIL(length * size, 4), (u8*)data);
@ -90,7 +90,7 @@ int target_hexmsg(target_t *target, int size, u32 length)
if ((i%8 == 7) || (i == length - 1))
{
DEBUG("%s", line);
LOG_DEBUG("%s", line);
while (c)
{
@ -136,7 +136,7 @@ int target_request(target_t *target, u32 request)
* break;
*/
default:
ERROR("unknown target request: %2.2x", target_req_cmd);
LOG_ERROR("unknown target request: %2.2x", target_req_cmd);
break;
}

2
src/target/trace.c
View File

@ -35,7 +35,7 @@ int trace_point(target_t *target, int number)
{
trace_t *trace = target->trace_info;
DEBUG("tracepoint: %i", number);
LOG_DEBUG("tracepoint: %i", number);
if (number < trace->num_trace_points)
trace->trace_points[number].hit_counter++;

204
src/target/xscale.c
View File

@ -194,13 +194,13 @@ int xscale_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, xsc
if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
{
ERROR("target isn't an XScale target");
LOG_ERROR("target isn't an XScale target");
return -1;
}
if (xscale->common_magic != XSCALE_COMMON_MAGIC)
{
ERROR("target isn't an XScale target");
LOG_ERROR("target isn't an XScale target");
return -1;
}
@ -283,7 +283,7 @@ int xscale_read_dcsr(target_t *target)
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
ERROR("JTAG error while reading DCSR");
LOG_ERROR("JTAG error while reading DCSR");
return retval;
}
@ -382,7 +382,7 @@ int xscale_receive(target_t *target, u32 *buffer, int num_words)
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
ERROR("JTAG error while receiving data from debug handler");
LOG_ERROR("JTAG error while receiving data from debug handler");
break;
}
@ -405,7 +405,7 @@ int xscale_receive(target_t *target, u32 *buffer, int num_words)
{
if (attempts++==1000)
{
ERROR("Failed to receiving data from debug handler after 1000 attempts");
LOG_ERROR("Failed to receiving data from debug handler after 1000 attempts");
retval=ERROR_TARGET_TIMEOUT;
break;
}
@ -503,14 +503,14 @@ int xscale_read_tx(target_t *target, int consume)
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
ERROR("JTAG error while reading TX");
LOG_ERROR("JTAG error while reading TX");
return ERROR_TARGET_TIMEOUT;
}
gettimeofday(&now, NULL);
if ((now.tv_sec > timeout.tv_sec) || ((now.tv_sec == timeout.tv_sec)&& (now.tv_usec > timeout.tv_usec)))
{
ERROR("time out reading TX register");
LOG_ERROR("time out reading TX register");
return ERROR_TARGET_TIMEOUT;
}
if (!((!(field0_in & 1)) && consume))
@ -518,7 +518,7 @@ int xscale_read_tx(target_t *target, int consume)
goto done;
}
}
DEBUG("waiting 10ms");
LOG_DEBUG("waiting 10ms");
usleep(10*1000); /* avoid flooding the logs */
}
done:
@ -580,7 +580,7 @@ int xscale_write_rx(target_t *target)
timeval_add_time(&timeout, 1, 0);
/* poll until rx_read is low */
DEBUG("polling RX");
LOG_DEBUG("polling RX");
for (;;)
{
int i;
@ -590,20 +590,20 @@ int xscale_write_rx(target_t *target)
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
ERROR("JTAG error while writing RX");
LOG_ERROR("JTAG error while writing RX");
return retval;
}
gettimeofday(&now, NULL);
if ((now.tv_sec > timeout.tv_sec) || ((now.tv_sec == timeout.tv_sec)&& (now.tv_usec > timeout.tv_usec)))
{
ERROR("time out writing RX register");
LOG_ERROR("time out writing RX register");
return ERROR_TARGET_TIMEOUT;
}
if (!(field0_in & 1))
goto done;
}
DEBUG("waiting 10ms");
LOG_DEBUG("waiting 10ms");
usleep(10*1000); /* wait 10ms to avoid flooding the logs */
}
done:
@ -614,7 +614,7 @@ int xscale_write_rx(target_t *target)
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
ERROR("JTAG error while writing RX");
LOG_ERROR("JTAG error while writing RX");
return retval;
}
@ -716,7 +716,7 @@ int xscale_send(target_t *target, u8 *buffer, int count, int size)
output[0] = *buffer;
break;
default:
ERROR("BUG: size neither 4, 2 nor 1");
LOG_ERROR("BUG: size neither 4, 2 nor 1");
exit(-1);
}
@ -728,7 +728,7 @@ int xscale_send(target_t *target, u8 *buffer, int count, int size)
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
ERROR("JTAG error while sending data to debug handler");
LOG_ERROR("JTAG error while sending data to debug handler");
return retval;
}
@ -801,7 +801,7 @@ int xscale_write_dcsr(target_t *target, int hold_rst, int ext_dbg_brk)
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
ERROR("JTAG error while writing DCSR");
LOG_ERROR("JTAG error while writing DCSR");
return retval;
}
@ -819,7 +819,7 @@ unsigned int parity (unsigned int v)
v ^= v >> 8;
v ^= v >> 4;
v &= 0xf;
DEBUG("parity of 0x%x is %i", ov, (0x6996 >> v) & 1);
LOG_DEBUG("parity of 0x%x is %i", ov, (0x6996 >> v) & 1);
return (0x6996 >> v) & 1;
}
@ -833,7 +833,7 @@ int xscale_load_ic(target_t *target, int mini, u32 va, u32 buffer[8])
scan_field_t fields[2];
DEBUG("loading miniIC at 0x%8.8x", va);
LOG_DEBUG("loading miniIC at 0x%8.8x", va);
jtag_add_end_state(TAP_RTI);
xscale_jtag_set_instr(xscale->jtag_info.chain_pos, xscale->jtag_info.ldic); /* LDIC */
@ -1014,11 +1014,11 @@ int xscale_arch_state(struct target_s *target)
if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
{
ERROR("BUG: called for a non-ARMv4/5 target");
LOG_ERROR("BUG: called for a non-ARMv4/5 target");
exit(-1);
}
USER("target halted in %s state due to %s, current mode: %s\n"
LOG_USER("target halted in %s state due to %s, current mode: %s\n"
"cpsr: 0x%8.8x pc: 0x%8.8x\n"
"MMU: %s, D-Cache: %s, I-Cache: %s"
"%s",
@ -1057,7 +1057,7 @@ int xscale_poll(target_t *target)
}
else if (retval != ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
{
USER("error while polling TX register, reset CPU");
LOG_USER("error while polling TX register, reset CPU");
/* here we "lie" so GDB won't get stuck and a reset can be perfomed */
target->state = TARGET_HALTED;
}
@ -1103,13 +1103,13 @@ int xscale_debug_entry(target_t *target)
buf_set_u32(armv4_5->core_cache->reg_list[0].value, 0, 32, buffer[0]);
armv4_5->core_cache->reg_list[15].dirty = 1;
armv4_5->core_cache->reg_list[15].valid = 1;
DEBUG("r0: 0x%8.8x", buffer[0]);
LOG_DEBUG("r0: 0x%8.8x", buffer[0]);
/* move pc from buffer to register cache */
buf_set_u32(armv4_5->core_cache->reg_list[15].value, 0, 32, buffer[1]);
armv4_5->core_cache->reg_list[15].dirty = 1;
armv4_5->core_cache->reg_list[15].valid = 1;
DEBUG("pc: 0x%8.8x", buffer[1]);
LOG_DEBUG("pc: 0x%8.8x", buffer[1]);
/* move data from buffer to register cache */
for (i = 1; i <= 7; i++)
@ -1117,22 +1117,22 @@ int xscale_debug_entry(target_t *target)
buf_set_u32(armv4_5->core_cache->reg_list[i].value, 0, 32, buffer[1 + i]);
armv4_5->core_cache->reg_list[i].dirty = 1;
armv4_5->core_cache->reg_list[i].valid = 1;
DEBUG("r%i: 0x%8.8x", i, buffer[i + 1]);
LOG_DEBUG("r%i: 0x%8.8x", i, buffer[i + 1]);
}
buf_set_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32, buffer[9]);
armv4_5->core_cache->reg_list[ARMV4_5_CPSR].dirty = 1;
armv4_5->core_cache->reg_list[ARMV4_5_CPSR].valid = 1;
DEBUG("cpsr: 0x%8.8x", buffer[9]);
LOG_DEBUG("cpsr: 0x%8.8x", buffer[9]);
armv4_5->core_mode = buffer[9] & 0x1f;
if (armv4_5_mode_to_number(armv4_5->core_mode) == -1)
{
target->state = TARGET_UNKNOWN;
ERROR("cpsr contains invalid mode value - communication failure");
LOG_ERROR("cpsr contains invalid mode value - communication failure");
return ERROR_TARGET_FAILURE;
}
DEBUG("target entered debug state in %s mode", armv4_5_mode_strings[armv4_5_mode_to_number(armv4_5->core_mode)]);
LOG_DEBUG("target entered debug state in %s mode", armv4_5_mode_strings[armv4_5_mode_to_number(armv4_5->core_mode)]);
if (buffer[9] & 0x20)
armv4_5->core_state = ARMV4_5_STATE_THUMB;
@ -1207,7 +1207,7 @@ int xscale_debug_entry(target_t *target)
break;
case 0x7: /* Reserved */
default:
ERROR("Method of Entry is 'Reserved'");
LOG_ERROR("Method of Entry is 'Reserved'");
exit(-1);
break;
}
@ -1261,22 +1261,22 @@ int xscale_halt(target_t *target)
armv4_5_common_t *armv4_5 = target->arch_info;
xscale_common_t *xscale = armv4_5->arch_info;
DEBUG("target->state: %s", target_state_strings[target->state]);
LOG_DEBUG("target->state: %s", target_state_strings[target->state]);
if (target->state == TARGET_HALTED)
{
WARNING("target was already halted");
LOG_WARNING("target was already halted");
return ERROR_OK;
}
else if (target->state == TARGET_UNKNOWN)
{
/* this must not happen for a xscale target */
ERROR("target was in unknown state when halt was requested");
LOG_ERROR("target was in unknown state when halt was requested");
return ERROR_TARGET_INVALID;
}
else if (target->state == TARGET_RESET)
{
DEBUG("target->state == TARGET_RESET");
LOG_DEBUG("target->state == TARGET_RESET");
}
else
{
@ -1306,7 +1306,7 @@ int xscale_enable_single_step(struct target_s *target, u32 next_pc)
}
else
{
ERROR("BUG: xscale->ibcr0_used is set, but no breakpoint with that address found");
LOG_ERROR("BUG: xscale->ibcr0_used is set, but no breakpoint with that address found");
exit(-1);
}
}
@ -1338,11 +1338,11 @@ int xscale_resume(struct target_s *target, int current, u32 address, int handle_
int retval;
int i;
DEBUG("-");
LOG_DEBUG("-");
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -1376,7 +1376,7 @@ int xscale_resume(struct target_s *target, int current, u32 address, int handle_
u32 next_pc;
/* there's a breakpoint at the current PC, we have to step over it */
DEBUG("unset breakpoint at 0x%8.8x", breakpoint->address);
LOG_DEBUG("unset breakpoint at 0x%8.8x", breakpoint->address);
xscale_unset_breakpoint(target, breakpoint);
/* calculate PC of next instruction */
@ -1384,10 +1384,10 @@ int xscale_resume(struct target_s *target, int current, u32 address, int handle_
{
u32 current_opcode;
target_read_u32(target, current_pc, &current_opcode);
ERROR("BUG: couldn't calculate PC of next instruction, current opcode was 0x%8.8x", current_opcode);
LOG_ERROR("BUG: couldn't calculate PC of next instruction, current opcode was 0x%8.8x", current_opcode);
}
DEBUG("enable single-step");
LOG_DEBUG("enable single-step");
xscale_enable_single_step(target, next_pc);
/* restore banked registers */
@ -1405,26 +1405,26 @@ int xscale_resume(struct target_s *target, int current, u32 address, int handle_
/* send CPSR */
xscale_send_u32(target, buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32));
DEBUG("writing cpsr with value 0x%8.8x", buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32));
LOG_DEBUG("writing cpsr with value 0x%8.8x", buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32));
for (i = 7; i >= 0; i--)
{
/* send register */
xscale_send_u32(target, buf_get_u32(armv4_5->core_cache->reg_list[i].value, 0, 32));
DEBUG("writing r%i with value 0x%8.8x", i, buf_get_u32(armv4_5->core_cache->reg_list[i].value, 0, 32));
LOG_DEBUG("writing r%i with value 0x%8.8x", i, buf_get_u32(armv4_5->core_cache->reg_list[i].value, 0, 32));
}
/* send PC */
xscale_send_u32(target, buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
DEBUG("writing PC with value 0x%8.8x", buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
LOG_DEBUG("writing PC with value 0x%8.8x", buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
/* wait for and process debug entry */
xscale_debug_entry(target);
DEBUG("disable single-step");
LOG_DEBUG("disable single-step");
xscale_disable_single_step(target);
DEBUG("set breakpoint at 0x%8.8x", breakpoint->address);
LOG_DEBUG("set breakpoint at 0x%8.8x", breakpoint->address);
xscale_set_breakpoint(target, breakpoint);
}
}
@ -1448,18 +1448,18 @@ int xscale_resume(struct target_s *target, int current, u32 address, int handle_
/* send CPSR */
xscale_send_u32(target, buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32));
DEBUG("writing cpsr with value 0x%8.8x", buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32));
LOG_DEBUG("writing cpsr with value 0x%8.8x", buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32));
for (i = 7; i >= 0; i--)
{
/* send register */
xscale_send_u32(target, buf_get_u32(armv4_5->core_cache->reg_list[i].value, 0, 32));
DEBUG("writing r%i with value 0x%8.8x", i, buf_get_u32(armv4_5->core_cache->reg_list[i].value, 0, 32));
LOG_DEBUG("writing r%i with value 0x%8.8x", i, buf_get_u32(armv4_5->core_cache->reg_list[i].value, 0, 32));
}
/* send PC */
xscale_send_u32(target, buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
DEBUG("writing PC with value 0x%8.8x", buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
LOG_DEBUG("writing PC with value 0x%8.8x", buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
target->debug_reason = DBG_REASON_NOTHALTED;
@ -1476,7 +1476,7 @@ int xscale_resume(struct target_s *target, int current, u32 address, int handle_
target_call_event_callbacks(target, TARGET_EVENT_DEBUG_RESUMED);
}
DEBUG("target resumed");
LOG_DEBUG("target resumed");
xscale->handler_running = 1;
@ -1495,7 +1495,7 @@ int xscale_step(struct target_s *target, int current, u32 address, int handle_br
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -1531,10 +1531,10 @@ int xscale_step(struct target_s *target, int current, u32 address, int handle_br
{
u32 current_opcode;
target_read_u32(target, current_pc, &current_opcode);
ERROR("BUG: couldn't calculate PC of next instruction, current opcode was 0x%8.8x", current_opcode);
LOG_ERROR("BUG: couldn't calculate PC of next instruction, current opcode was 0x%8.8x", current_opcode);
}
DEBUG("enable single-step");
LOG_DEBUG("enable single-step");
xscale_enable_single_step(target, next_pc);
/* restore banked registers */
@ -1552,18 +1552,18 @@ int xscale_step(struct target_s *target, int current, u32 address, int handle_br
/* send CPSR */
xscale_send_u32(target, buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32));
DEBUG("writing cpsr with value 0x%8.8x", buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32));
LOG_DEBUG("writing cpsr with value 0x%8.8x", buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32));
for (i = 7; i >= 0; i--)
{
/* send register */
xscale_send_u32(target, buf_get_u32(armv4_5->core_cache->reg_list[i].value, 0, 32));
DEBUG("writing r%i with value 0x%8.8x", i, buf_get_u32(armv4_5->core_cache->reg_list[i].value, 0, 32));
LOG_DEBUG("writing r%i with value 0x%8.8x", i, buf_get_u32(armv4_5->core_cache->reg_list[i].value, 0, 32));
}
/* send PC */
xscale_send_u32(target, buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
DEBUG("writing PC with value 0x%8.8x", buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
LOG_DEBUG("writing PC with value 0x%8.8x", buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
target_call_event_callbacks(target, TARGET_EVENT_RESUMED);
@ -1573,7 +1573,7 @@ int xscale_step(struct target_s *target, int current, u32 address, int handle_br
/* wait for and process debug entry */
xscale_debug_entry(target);
DEBUG("disable single-step");
LOG_DEBUG("disable single-step");
xscale_disable_single_step(target);
target_call_event_callbacks(target, TARGET_EVENT_HALTED);
@ -1583,7 +1583,7 @@ int xscale_step(struct target_s *target, int current, u32 address, int handle_br
xscale_set_breakpoint(target, breakpoint);
}
DEBUG("target stepped");
LOG_DEBUG("target stepped");
return ERROR_OK;
@ -1594,7 +1594,7 @@ int xscale_assert_reset(target_t *target)
armv4_5_common_t *armv4_5 = target->arch_info;
xscale_common_t *xscale = armv4_5->arch_info;
DEBUG("target->state: %s", target_state_strings[target->state]);
LOG_DEBUG("target->state: %s", target_state_strings[target->state]);
/* TRST every time. We want to be able to support daemon_startup attach */
jtag_add_reset(1, 0);
@ -1647,7 +1647,7 @@ int xscale_deassert_reset(target_t *target)
breakpoint_t *breakpoint = target->breakpoints;
DEBUG("-");
LOG_DEBUG("-");
xscale->ibcr_available = 2;
xscale->ibcr0_used = 0;
@ -1691,13 +1691,13 @@ int xscale_deassert_reset(target_t *target)
if ((binary_size = debug_handler.size) % 4)
{
ERROR("debug_handler.bin: size not a multiple of 4");
LOG_ERROR("debug_handler.bin: size not a multiple of 4");
exit(-1);
}
if (binary_size > 0x800)
{
ERROR("debug_handler.bin: larger than 2kb");
LOG_ERROR("debug_handler.bin: larger than 2kb");
exit(-1);
}
@ -1808,11 +1808,11 @@ int xscale_full_context(target_t *target)
int i, j;
DEBUG("-");
LOG_DEBUG("-");
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -1882,11 +1882,11 @@ int xscale_restore_context(target_t *target)
int i, j;
DEBUG("-");
LOG_DEBUG("-");
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -1953,11 +1953,11 @@ int xscale_read_memory(struct target_s *target, u32 address, u32 size, u32 count
int i;
int retval;
DEBUG("address: 0x%8.8x, size: 0x%8.8x, count: 0x%8.8x", address, size, count);
LOG_DEBUG("address: 0x%8.8x, size: 0x%8.8x, count: 0x%8.8x", address, size, count);
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -2002,7 +2002,7 @@ int xscale_read_memory(struct target_s *target, u32 address, u32 size, u32 count
*buffer++ = buf32[i] & 0xff;
break;
default:
ERROR("should never get here");
LOG_ERROR("should never get here");
exit(-1);
}
}
@ -2030,11 +2030,11 @@ int xscale_write_memory(struct target_s *target, u32 address, u32 size, u32 coun
xscale_common_t *xscale = armv4_5->arch_info;
int retval;
DEBUG("address: 0x%8.8x, size: 0x%8.8x, count: 0x%8.8x", address, size, count);
LOG_DEBUG("address: 0x%8.8x, size: 0x%8.8x, count: 0x%8.8x", address, size, count);
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -2079,7 +2079,7 @@ int xscale_write_memory(struct target_s *target, u32 address, u32 size, u32 coun
buffer += 1;
break;
default:
ERROR("should never get here");
LOG_ERROR("should never get here");
exit(-1);
}
}
@ -2196,7 +2196,7 @@ int xscale_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -2205,7 +2205,7 @@ int xscale_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
if (breakpoint->set)
{
WARNING("breakpoint already set");
LOG_WARNING("breakpoint already set");
return ERROR_OK;
}
@ -2226,7 +2226,7 @@ int xscale_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
}
else
{
ERROR("BUG: no hardware comparator available");
LOG_ERROR("BUG: no hardware comparator available");
return ERROR_OK;
}
}
@ -2260,19 +2260,19 @@ int xscale_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
if (xscale->force_hw_bkpts)
{
DEBUG("forcing use of hardware breakpoint at address 0x%8.8x", breakpoint->address);
LOG_DEBUG("forcing use of hardware breakpoint at address 0x%8.8x", breakpoint->address);
breakpoint->type = BKPT_HARD;
}
if ((breakpoint->type == BKPT_HARD) && (xscale->ibcr_available < 1))
{
INFO("no breakpoint unit available for hardware breakpoint");
LOG_INFO("no breakpoint unit available for hardware breakpoint");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
else
@ -2282,7 +2282,7 @@ int xscale_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
if ((breakpoint->length != 2) && (breakpoint->length != 4))
{
INFO("only breakpoints of two (Thumb) or four (ARM) bytes length supported");
LOG_INFO("only breakpoints of two (Thumb) or four (ARM) bytes length supported");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
@ -2296,13 +2296,13 @@ int xscale_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
if (!breakpoint->set)
{
WARNING("breakpoint not set");
LOG_WARNING("breakpoint not set");
return ERROR_OK;
}
@ -2344,7 +2344,7 @@ int xscale_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -2369,7 +2369,7 @@ int xscale_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -2387,7 +2387,7 @@ int xscale_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
enable = 0x1;
break;
default:
ERROR("BUG: watchpoint->rw neither read, write nor access");
LOG_ERROR("BUG: watchpoint->rw neither read, write nor access");
}
if (!xscale->dbr0_used)
@ -2408,7 +2408,7 @@ int xscale_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
}
else
{
ERROR("BUG: no hardware comparator available");
LOG_ERROR("BUG: no hardware comparator available");
return ERROR_OK;
}
@ -2422,7 +2422,7 @@ int xscale_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -2450,13 +2450,13 @@ int xscale_unset_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
if (!watchpoint->set)
{
WARNING("breakpoint not set");
LOG_WARNING("breakpoint not set");
return ERROR_OK;
}
@ -2484,7 +2484,7 @@ int xscale_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
if (target->state != TARGET_HALTED)
{
WARNING("target not halted");
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -2662,7 +2662,7 @@ int xscale_read_trace(target_t *target)
if (target->state != TARGET_HALTED)
{
WARNING("target must be stopped to read trace data");
LOG_WARNING("target must be stopped to read trace data");
return ERROR_TARGET_NOT_HALTED;
}
@ -2697,7 +2697,7 @@ int xscale_read_trace(target_t *target)
if (j == 256)
{
DEBUG("no trace data collected");
LOG_DEBUG("no trace data collected");
return ERROR_XSCALE_NO_TRACE_DATA;
}
@ -2762,7 +2762,7 @@ int xscale_read_instruction(target_t *target, arm_instruction_t *instruction)
xscale->trace.current_pc - xscale->trace.image->sections[section].base_address,
4, buf, &size_read)) != ERROR_OK)
{
ERROR("error while reading instruction: %i", retval);
LOG_ERROR("error while reading instruction: %i", retval);
return ERROR_TRACE_INSTRUCTION_UNAVAILABLE;
}
opcode = target_buffer_get_u32(target, buf);
@ -2775,7 +2775,7 @@ int xscale_read_instruction(target_t *target, arm_instruction_t *instruction)
xscale->trace.current_pc - xscale->trace.image->sections[section].base_address,
2, buf, &size_read)) != ERROR_OK)
{
ERROR("error while reading instruction: %i", retval);
LOG_ERROR("error while reading instruction: %i", retval);
return ERROR_TRACE_INSTRUCTION_UNAVAILABLE;
}
opcode = target_buffer_get_u16(target, buf);
@ -2783,7 +2783,7 @@ int xscale_read_instruction(target_t *target, arm_instruction_t *instruction)
}
else
{
ERROR("BUG: unknown core state encountered");
LOG_ERROR("BUG: unknown core state encountered");
exit(-1);
}
@ -2866,7 +2866,7 @@ int xscale_analyze_trace(target_t *target, command_context_t *cmd_ctx)
next_pc_ok = 1;
if (((chkpt == 0) && (next_pc != trace_data->chkpt0))
|| ((chkpt == 1) && (next_pc != trace_data->chkpt1)))
WARNING("checkpointed indirect branch target address doesn't match checkpoint");
LOG_WARNING("checkpointed indirect branch target address doesn't match checkpoint");
}
/* explicit fall-through */
case 12: /* Checkpointed Direct Branch */
@ -2885,7 +2885,7 @@ int xscale_analyze_trace(target_t *target, command_context_t *cmd_ctx)
}
else
{
WARNING("more than two checkpointed branches encountered");
LOG_WARNING("more than two checkpointed branches encountered");
}
break;
case 15: /* Roll-over */
@ -2893,7 +2893,7 @@ int xscale_analyze_trace(target_t *target, command_context_t *cmd_ctx)
continue;
default: /* Reserved */
command_print(cmd_ctx, "--- reserved trace message ---");
ERROR("BUG: trace message %i is reserved", (trace_data->entries[i].data & 0xf0) >> 4);
LOG_ERROR("BUG: trace message %i is reserved", (trace_data->entries[i].data & 0xf0) >> 4);
return ERROR_OK;
}
@ -3172,7 +3172,7 @@ int xscale_target_command(struct command_context_s *cmd_ctx, char *cmd, char **a
if (argc < 5)
{
ERROR("'target xscale' requires four arguments: <endianess> <startup_mode> <chain_pos> <variant>");
LOG_ERROR("'target xscale' requires four arguments: <endianess> <startup_mode> <chain_pos> <variant>");
return ERROR_OK;
}
@ -3196,13 +3196,13 @@ int xscale_handle_debug_handler_command(struct command_context_s *cmd_ctx, char
if (argc < 2)
{
ERROR("'xscale debug_handler <target#> <address>' command takes two required operands");
LOG_ERROR("'xscale debug_handler <target#> <address>' command takes two required operands");
return ERROR_OK;
}
if ((target = get_target_by_num(strtoul(args[0], NULL, 0))) == NULL)
{
ERROR("no target '%s' configured", args[0]);
LOG_ERROR("no target '%s' configured", args[0]);
return ERROR_OK;
}
@ -3220,7 +3220,7 @@ int xscale_handle_debug_handler_command(struct command_context_s *cmd_ctx, char
}
else
{
ERROR("xscale debug_handler <address> must be between 0x800 and 0x1fef800 or between 0xfe000800 and 0xfffff800");
LOG_ERROR("xscale debug_handler <address> must be between 0x800 and 0x1fef800 or between 0xfe000800 and 0xfffff800");
}
return ERROR_OK;
@ -3236,13 +3236,13 @@ int xscale_handle_cache_clean_address_command(struct command_context_s *cmd_ctx,
if (argc < 2)
{
ERROR("'xscale cache_clean_address <target#> <address>' command takes two required operands");
LOG_ERROR("'xscale cache_clean_address <target#> <address>' command takes two required operands");
return ERROR_OK;
}
if ((target = get_target_by_num(strtoul(args[0], NULL, 0))) == NULL)
{
ERROR("no target '%s' configured", args[0]);
LOG_ERROR("no target '%s' configured", args[0]);
return ERROR_OK;
}
@ -3255,7 +3255,7 @@ int xscale_handle_cache_clean_address_command(struct command_context_s *cmd_ctx,
if (cache_clean_address & 0xffff)
{
ERROR("xscale cache_clean_address <address> must be 64kb aligned");
LOG_ERROR("xscale cache_clean_address <address> must be 64kb aligned");
}
else
{
@ -3310,7 +3310,7 @@ static int xscale_mmu(struct target_s *target, int *enabled)
if (target->state != TARGET_HALTED)
{
ERROR("Target not halted");
LOG_ERROR("Target not halted");
return ERROR_TARGET_INVALID;
}
*enabled = xscale->armv4_5_mmu.mmu_enabled;

38
src/xsvf/xsvf.c
View File

@ -96,7 +96,7 @@ int xsvf_read_xstates(int fd, enum tap_state *path, int max_path, int *path_len)
{
if (*path_len > max_path)
{
WARNING("XSTATE path longer than max_path");
LOG_WARNING("XSTATE path longer than max_path");
break;
}
if (read(fd, &uc, 1) < 0)
@ -154,7 +154,7 @@ int handle_xsvf_command(struct command_context_s *cmd_ctx, char *cmd, char **arg
switch (c)
{
case 0x00: /* XCOMPLETE */
DEBUG("XCOMPLETE");
LOG_DEBUG("XCOMPLETE");
if (jtag_execute_queue() != ERROR_OK)
{
tdo_mismatch = 1;
@ -162,12 +162,12 @@ int handle_xsvf_command(struct command_context_s *cmd_ctx, char *cmd, char **arg
}
break;
case 0x01: /* XTDOMASK */
DEBUG("XTDOMASK");
LOG_DEBUG("XTDOMASK");
if (dr_in_mask && (xsvf_read_buffer(xsdrsize, xsvf_fd, dr_in_mask) != ERROR_OK))
do_abort = 1;
break;
case 0x02: /* XSIR */
DEBUG("XSIR");
LOG_DEBUG("XSIR");
if (read(xsvf_fd, &c, 1) < 0)
do_abort = 1;
else
@ -215,7 +215,7 @@ int handle_xsvf_command(struct command_context_s *cmd_ctx, char *cmd, char **arg
}
break;
case 0x03: /* XSDR */
DEBUG("XSDR");
LOG_DEBUG("XSDR");
if (xsvf_read_buffer(xsdrsize, xsvf_fd, dr_out_buf) != ERROR_OK)
do_abort = 1;
else
@ -252,7 +252,7 @@ int handle_xsvf_command(struct command_context_s *cmd_ctx, char *cmd, char **arg
}
break;
case 0x04: /* XRUNTEST */
DEBUG("XRUNTEST");
LOG_DEBUG("XRUNTEST");
if (read(xsvf_fd, buf4, 4) < 0)
do_abort = 1;
else
@ -261,7 +261,7 @@ int handle_xsvf_command(struct command_context_s *cmd_ctx, char *cmd, char **arg
}
break;
case 0x07: /* XREPEAT */
DEBUG("XREPEAT");
LOG_DEBUG("XREPEAT");
if (read(xsvf_fd, &c, 1) < 0)
do_abort = 1;
else
@ -270,7 +270,7 @@ int handle_xsvf_command(struct command_context_s *cmd_ctx, char *cmd, char **arg
}
break;
case 0x08: /* XSDRSIZE */
DEBUG("XSDRSIZE");
LOG_DEBUG("XSDRSIZE");
if (read(xsvf_fd, buf4, 4) < 0)
do_abort = 1;
else
@ -285,7 +285,7 @@ int handle_xsvf_command(struct command_context_s *cmd_ctx, char *cmd, char **arg
}
break;
case 0x09: /* XSDRTDO */
DEBUG("XSDRTDO");
LOG_DEBUG("XSDRTDO");
if (xsvf_read_buffer(xsdrsize, xsvf_fd, dr_out_buf) != ERROR_OK)
do_abort = 1;
else
@ -327,11 +327,11 @@ int handle_xsvf_command(struct command_context_s *cmd_ctx, char *cmd, char **arg
}
break;
case 0x0a: /* XSETDRMASKS */
ERROR("unsupported XSETSDRMASKS\n");
LOG_ERROR("unsupported XSETSDRMASKS\n");
unsupported = 1;
break;
case 0x0b: /* XSDRINC */
ERROR("unsupported XSDRINC\n");
LOG_ERROR("unsupported XSDRINC\n");
unsupported = 1;
break;
case 0x0c: /* XSDRB */
@ -353,7 +353,7 @@ int handle_xsvf_command(struct command_context_s *cmd_ctx, char *cmd, char **arg
unsupported = 1;
break;
case 0x12: /* XSTATE */
DEBUG("XSTATE");
LOG_DEBUG("XSTATE");
if (read(xsvf_fd, &uc, 1) < 0)
do_abort = 1;
else
@ -371,7 +371,7 @@ int handle_xsvf_command(struct command_context_s *cmd_ctx, char *cmd, char **arg
}
break;
case 0x13: /* XENDIR */
DEBUG("XENDIR");
LOG_DEBUG("XENDIR");
if (read(xsvf_fd, &c, 1) < 0)
do_abort = 1;
else
@ -382,13 +382,13 @@ int handle_xsvf_command(struct command_context_s *cmd_ctx, char *cmd, char **arg
xendir = 0xd;
else
{
ERROR("unknown XENDIR endstate");
LOG_ERROR("unknown XENDIR endstate");
unsupported = 1;
}
}
break;
case 0x14: /* XENDDR */
DEBUG("XENDDR");
LOG_DEBUG("XENDDR");
if (read(xsvf_fd, &c, 1) < 0)
do_abort = 1;
else
@ -399,13 +399,13 @@ int handle_xsvf_command(struct command_context_s *cmd_ctx, char *cmd, char **arg
xenddr = 0x6;
else
{
ERROR("unknown XENDDR endstate");
LOG_ERROR("unknown XENDDR endstate");
unsupported = 1;
}
}
break;
case 0x15: /* XSIR2 */
DEBUG("XSIR2");
LOG_DEBUG("XSIR2");
if (read(xsvf_fd, buf2, 2) < 0)
do_abort = 1;
else
@ -446,7 +446,7 @@ int handle_xsvf_command(struct command_context_s *cmd_ctx, char *cmd, char **arg
} while (c != 0);
break;
case 0x17: /* XWAIT */
DEBUG("XWAIT");
LOG_DEBUG("XWAIT");
if ((read(xsvf_fd, &uc, 1) < 0) || (read(xsvf_fd, &uc2, 1) < 0) || (read(xsvf_fd, buf4, 4) < 0))
do_abort = 1;
else
@ -458,7 +458,7 @@ int handle_xsvf_command(struct command_context_s *cmd_ctx, char *cmd, char **arg
}
break;
default:
ERROR("unknown xsvf command (0x%2.2x)\n", c);
LOG_ERROR("unknown xsvf command (0x%2.2x)\n", c);
unsupported = 1;
}