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cortex_m: use the new enum ARMV7M_REGSEL_name 

Register xPSR is indexed directly with its value 16 or with the
incorrect enum ARMV7M_xPSR.

Replace them with the new enum ARMV7M_REGSEL_xPSR.

Change-Id: I86600e7f78e39002ce45f66d4792d5067c1f541b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5873
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
This commit is contained in:
Antonio Borneo 2020-10-21 16:12:27 +02:00
parent 4d336e8ffb
commit d811d2838b
2 changed files with 2 additions and 2 deletions
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2
src/flash/nor/psoc6.c
View File

@ -153,7 +153,7 @@ static int sromalgo_prepare(struct target *target)
/* Restore THUMB bit in xPSR register */
const struct armv7m_common *cm = target_to_armv7m(target);
hr = cm->store_core_reg_u32(target, ARMV7M_xPSR, 0x01000000);
hr = cm->store_core_reg_u32(target, ARMV7M_REGSEL_xPSR, 0x01000000);
if (hr != ERROR_OK)
return hr;

2
src/target/cortex_m.c
View File

@ -530,7 +530,7 @@ static int cortex_m_debug_entry(struct target *target)
/* For IT instructions xPSR must be reloaded on resume and clear on debug exec */
if (xPSR & 0xf00) {
r->dirty = r->valid;
cortex_m_store_core_reg_u32(target, 16, xPSR & ~0xff);
cortex_m_store_core_reg_u32(target, ARMV7M_REGSEL_xPSR, xPSR & ~0xff);
}
/* Are we in an exception handler */