tcl: Support for the miniSpartan6+ board.

* https://www.scarabhardware.com/minispartan6/
 * https://github.com/scarabhardware/miniSpartan6-plus/raw/master/miniSpartan6%2B_Rev_B.pdf

The miniSpartan6+ board is wired identically to the Pipistrello device but
sadly doesn't have a custom device description.

Change-Id: I07fd57b1ec87d72edf68860684928a3781e2f08a
Signed-off-by: Tim 'mithro' Ansell <mithro@mithis.com>
Reviewed-on: http://openocd.zylin.com/3117
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This commit is contained in:
Tim 'mithro' Ansell 2015-11-16 19:17:53 +10:30 committed by Spencer Oliver
parent 822e6f43e4
commit db56a3b870
2 changed files with 39 additions and 0 deletions

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# https://www.scarabhardware.com/minispartan6/
source [find interface/ftdi/minispartan6.cfg]
source [find cpld/xilinx-xc6s.cfg]
source [find cpld/jtagspi.cfg]
# example command to read the device dna of the FPGA on the board;
# openocd -f board/minispartan6.cfg -c "init;xc6s_print_dna xc6s.tap;shutdown"
# example command to write bitstream
# openocd -f board/minispartan6.cfg -c "init;\
# jtagspi_init 0 bscan_spi_xc6slx??.bit;\
# jtagspi_program bitstream.bin 0;\
# xc6s_program xc6s.tap;\
# shutdown"
#
# jtagspi flash procies can be found in the contrib/loaders/flash/fpga/
# directory, with prebuilt versions available at
# https://github.com/jordens/bscan_spi_bitstreams
#
# For the SLX25 variant, use
# - https://github.com/jordens/bscan_spi_bitstreams/raw/master/bscan_spi_xc6slx25.bit
# For the SLX9 variant, use
# - https://github.com/jordens/bscan_spi_bitstreams/raw/master/bscan_spi_xc6slx9.bit

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# https://www.scarabhardware.com/minispartan6/
# https://github.com/scarabhardware/miniSpartan6-plus/raw/master/miniSpartan6%2B_Rev_B.pdf
interface ftdi
# The miniSpartan6+ sadly doesn't have a custom device description, so we just
# have to hope you got it right.
#ftdi_device_desc "Dual RS232-HS"
ftdi_vid_pid 0x0403 0x6010
# interface 1 is the uart
ftdi_channel 0
# just TCK TDI TDO TMS, no reset
ftdi_layout_init 0x0008 0x000b
reset_config none
# this generally works fast: the fpga can handle 30MHz, the spi flash can handle
# 54MHz with simple read, no dummy cycles, and wait-for-write-completion
adapter_khz 30000