board: Add NXP LS1088ARDB

This adds a board file for the NXP LS1088ARDB. This only covers the
"primary" JTAG header J55, and not the PCIe header (J91). The only
oddity is that the LS1088A and CPLD are muxed by adding/removing a
jumper from J48. Unfortunately, it doesn't look like OpenOCD supports
this CPLD beyond determining the irlen, so it's not very useful. Those
who are interested in experimenting can define CWTAP to access the CPLD,
but the default is to access the CPU.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Change-Id: Ia07436a534f86bd907aa5fe2a78a326a27855a24
Reviewed-on: https://review.openocd.org/c/openocd/+/6849
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This commit is contained in:
Sean Anderson 2022-02-11 17:50:09 -05:00 committed by Antonio Borneo
parent d1278660af
commit e84be7088d
1 changed files with 14 additions and 0 deletions

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# SPDX-License-Identifier: GPL-2.0-or-later
# NXP LS1088ARDB (Reference Design Board)
# This is for the "main" JTAG connector J55
transport select jtag
reset_config srst_only
# To access the CPLD, populate J48 and add `-c 'set CWTAP 1'` to your command
# line. At the time of this writing, programming is unsupported.
if { [info exists CWTAP] } {
source [find cpld/altera-epm240.cfg]
} else {
source [find target/ls1088a.cfg]
}