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mips_ejtag.c|h: use version specific IMPs

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and make version specific debug log

Change-Id: I17f7ff757cfa1264a1dadbfe20c5e21de62ef87a
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/1929
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This commit is contained in:
Oleksij Rempel 2014-08-14 22:10:33 +01:00 committed by Spencer Oliver
parent 1fa24ebe39
commit ed085f379e
2 changed files with 78 additions and 14 deletions
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57
src/target/mips_ejtag.c
View File

@ -341,6 +341,54 @@ static void mips_ejtag_init_mmr(struct mips_ejtag *ejtag_info)
}
}
static void ejtag_v20_print_imp(struct mips_ejtag *ejtag_info)
{
LOG_DEBUG("EJTAG v2.0: features:%s%s%s%s%s%s%s%s",
EJTAG_IMP_HAS(EJTAG_V20_IMP_SDBBP) ? " SDBBP_SPECIAL2" : " SDBBP",
EJTAG_IMP_HAS(EJTAG_V20_IMP_EADDR_NO32BIT) ? " EADDR>32bit" : " EADDR=32bit",
EJTAG_IMP_HAS(EJTAG_V20_IMP_COMPLEX_BREAK) ? " COMPLEX_BREAK" : "",
EJTAG_IMP_HAS(EJTAG_V20_IMP_DCACHE_COH) ? " DCACHE_COH" : " DCACHE_NOT_COH",
EJTAG_IMP_HAS(EJTAG_V20_IMP_ICACHE_COH) ? " ICACHE_COH" : " ICACHE_NOT_COH",
EJTAG_IMP_HAS(EJTAG_V20_IMP_NOPB) ? " noPB" : " PB",
EJTAG_IMP_HAS(EJTAG_V20_IMP_NODB) ? " noDB" : " DB",
EJTAG_IMP_HAS(EJTAG_V20_IMP_NOIB) ? " noIB" : " IB");
LOG_DEBUG("EJTAG v2.0: Break Channels: %i",
(ejtag_info->impcode >> EJTAG_V20_IMP_BCHANNELS_SHIFT) &
EJTAG_V20_IMP_BCHANNELS_MASK);
}
static void ejtag_v26_print_imp(struct mips_ejtag *ejtag_info)
{
LOG_DEBUG("EJTAG v2.6: features:%s%s",
EJTAG_IMP_HAS(EJTAG_V26_IMP_R3K) ? " R3k" : " R4k",
EJTAG_IMP_HAS(EJTAG_V26_IMP_DINT) ? " DINT" : "");
}
static void ejtag_main_print_imp(struct mips_ejtag *ejtag_info)
{
LOG_DEBUG("EJTAG main: features:%s%s%s%s%s",
EJTAG_IMP_HAS(EJTAG_IMP_ASID8) ? " ASID_8" : "",
EJTAG_IMP_HAS(EJTAG_IMP_ASID6) ? " ASID_6" : "",
EJTAG_IMP_HAS(EJTAG_IMP_MIPS16) ? " MIPS16" : "",
EJTAG_IMP_HAS(EJTAG_IMP_NODMA) ? " noDMA" : " DMA",
EJTAG_IMP_HAS(EJTAG_DCR_MIPS64) ? " MIPS64" : " MIPS32");
switch (ejtag_info->ejtag_version) {
case EJTAG_VERSION_20:
ejtag_v20_print_imp(ejtag_info);
break;
case EJTAG_VERSION_25:
case EJTAG_VERSION_26:
case EJTAG_VERSION_31:
case EJTAG_VERSION_41:
case EJTAG_VERSION_51:
ejtag_v26_print_imp(ejtag_info);
break;
default:
break;
}
}
int mips_ejtag_init(struct mips_ejtag *ejtag_info)
{
int retval;
@ -376,14 +424,7 @@ int mips_ejtag_init(struct mips_ejtag *ejtag_info)
LOG_DEBUG("EJTAG: Unknown Version Detected");
break;
}
LOG_DEBUG("EJTAG: features:%s%s%s%s%s%s%s",
ejtag_info->impcode & EJTAG_IMP_R3K ? " R3k" : " R4k",
ejtag_info->impcode & EJTAG_IMP_DINT ? " DINT" : "",
ejtag_info->impcode & (1 << 22) ? " ASID_8" : "",
ejtag_info->impcode & (1 << 21) ? " ASID_6" : "",
ejtag_info->impcode & EJTAG_IMP_MIPS16 ? " MIPS16" : "",
ejtag_info->impcode & EJTAG_IMP_NODMA ? " noDMA" : " DMA",
ejtag_info->impcode & EJTAG_DCR_MIPS64 ? " MIPS64" : " MIPS32");
ejtag_main_print_imp(ejtag_info);
if ((ejtag_info->impcode & EJTAG_IMP_NODMA) == 0) {
LOG_DEBUG("EJTAG: DMA Access Mode detected. Disabling to "

35
src/target/mips_ejtag.h
View File

@ -97,11 +97,35 @@
#define EJTAG_DEBUG_DM (1 << 30)
#define EJTAG_DEBUG_DBD (1 << 31)
/* implementaion register bits */
#define EJTAG_IMP_R3K (1 << 28)
#define EJTAG_IMP_DINT (1 << 24)
#define EJTAG_IMP_NODMA (1 << 14)
/* implementation MIPS register bits.
* Bits marked with V20 or v2.0 mean that, this registers supported only
* by EJTAG v2.0. Bits marked with Lexra or BMIPS are different from the
* official EJATG.
* NOTE: Lexra or BMIPS use EJTAG v2.0 */
#define EJTAG_IMP_HAS(x) (ejtag_info->impcode & (x))
/* v2.0(Lexra) 29 - 1’b1 - Lexra Internal Trace Buffer implemented. This bit
* overlaps with version bit of MIPS EJTAG specification. */
#define EJTAG_V26_IMP_R3K (1 << 28)
/* v2.0 - 24:25 - 2’b00- No profiling support */
#define EJTAG_V26_IMP_DINT (1 << 24)
#define EJTAG_V20_IMP_SDBBP (1 << 23) /* 1’b1 - sdbbp is Special2 Opcode */
#define EJTAG_IMP_ASID8 (1 << 22)
#define EJTAG_IMP_ASID6 (1 << 21)
#define EJTAG_V20_IMP_COMPLEX_BREAK (1 << 20) /* Complex Breaks supported*/
#define EJTAG_V20_IMP_EADDR_NO32BIT (1 << 19) /* EJTAG_ADDR > 32 bits wide */
#define EJTAG_V20_IMP_DCACHE_COH (1 << 18) /* DCache does keep DMA coherent */
#define EJTAG_V20_IMP_ICACHE_COH (1 << 17) /* DCache does keep DMA coherent */
#define EJTAG_IMP_MIPS16 (1 << 16)
#define EJTAG_IMP_NODMA (1 << 14)
/* v2.0 - 11:13 external PC trace. Trace PC Width. */
/* v2.0 - 8:10 external PC trace. PCST Width and DCLK Division Factor */
#define EJTAG_V20_IMP_NOPB (1 << 7) /* no processor breaks */
#define EJTAG_V20_IMP_NODB (1 << 6) /* no data breaks */
#define EJTAG_V20_IMP_NOIB (1 << 5) /* no instruction breaks implemented */
/* v2.0 - 1:4 Number of Break Channels. */
#define EJTAG_V20_IMP_BCHANNELS_MASK 0xf
#define EJTAG_V20_IMP_BCHANNELS_SHIFT 1
#define EJTAG_DCR_MIPS64 (1 << 0)
/* Debug Control Register DCR */
@ -184,8 +208,7 @@ struct mips_ejtag {
uint32_t ejtag_dbasid_offs; /* DAB ASID (4Kc) */
uint32_t ejtag_iba_step_size;
uint32_t ejtag_dba_step_size; /* siez of step till next
* *DBAn register. */
uint32_t ejtag_dba_step_size; /* size of step till next *DBAn register. */
};
void mips_ejtag_set_instr(struct mips_ejtag *ejtag_info,