unsik Kim <donari75@gmail.com>:
Add mflash configuration code, updating relevant documentation. git-svn-id: svn://svn.berlios.de/openocd/trunk@1930 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
zwelch
parent
d2089dbae0
commit
ee9766f1db
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@ -2393,15 +2393,29 @@ if the @option{erase} parameter is given.
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@itemize @bullet
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@item @b{mflash probe}
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@cindex mflash probe
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Probe mflash.
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@*Probe mflash.
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@item @b{mflash write} <@var{num}> <@var{file}> <@var{offset}>
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@cindex mflash write
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Write the binary <@var{file}> to mflash bank <@var{num}>, starting at
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@*Write the binary <@var{file}> to mflash bank <@var{num}>, starting at
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<@var{offset}> bytes from the beginning of the bank.
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@item @b{mflash dump} <@var{num}> <@var{file}> <@var{offset}> <@var{size}>
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@cindex mflash dump
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Dump <size> bytes, starting at <@var{offset}> bytes from the beginning of the <@var{num}> bank
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@*Dump <size> bytes, starting at <@var{offset}> bytes from the beginning of the <@var{num}> bank
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to a <@var{file}>.
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@item @b{mflash config pll} <@var{frequency}>
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@cindex mflash config pll
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@*Configure mflash pll. <@var{frequency}> is input frequency of mflash. The order is Hz.
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Issuing this command will erase mflash's whole internal nand and write new pll.
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After this command, mflash needs power-on-reset for normal operation.
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If pll was newly configured, storage and boot(optional) info also need to be update.
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@item @b{mflash config boot}
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@cindex mflash config boot
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@*Configure bootable option. If bootable option is set, mflash offer the first 8 sectors
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(4kB) for boot.
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@item @b{mflash config storage}
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@cindex mflash config storage
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@*Configure storage information. For the normal storage operation, this information must be
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written.
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@end itemize
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@section flash bank command
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@ -356,12 +356,10 @@ static int mg_dsk_drv_info(void)
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return ERROR_OK;
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}
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static int mg_mflash_probe(void)
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static int mg_mflash_rst(void)
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{
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mg_init_gpio();
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LOG_INFO("reset mflash");
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mg_hdrst(0);
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if (mg_dsk_wait(mg_io_wait_bsy, MG_OEM_DISK_WAIT_TIME_LONG) != ERROR_OK)
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@ -382,6 +380,16 @@ static int mg_mflash_probe(void)
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if (mg_dsk_wait(mg_io_wait_not_bsy, MG_OEM_DISK_WAIT_TIME_LONG) != ERROR_OK)
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return ERROR_FAIL;
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LOG_INFO("mflash: reset ok");
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return ERROR_OK;
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}
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static int mg_mflash_probe(void)
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{
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if (mg_mflash_rst() != ERROR_OK)
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return ERROR_FAIL;
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if (mg_dsk_drv_info() != ERROR_OK)
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return ERROR_FAIL;
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@ -465,7 +473,8 @@ static int mg_mflash_read_sects(void *buff, u32 sect_num, u32 sect_cnt)
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return ERROR_OK;
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}
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static int mg_mflash_do_write_sects(void *buff, u32 sect_num, u32 sect_cnt)
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static int mg_mflash_do_write_sects(void *buff, u32 sect_num, u32 sect_cnt,
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mg_io_type_cmd cmd)
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{
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u32 i, address;
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int ret;
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@ -473,10 +482,8 @@ static int mg_mflash_do_write_sects(void *buff, u32 sect_num, u32 sect_cnt)
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u8 *buff_ptr = buff;
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duration_t duration;
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if ( mg_dsk_io_cmd(sect_num, sect_cnt, mg_io_cmd_write) != ERROR_OK ) {
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LOG_ERROR("mg_io_cmd_write fail");
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if ( mg_dsk_io_cmd(sect_num, sect_cnt, cmd) != ERROR_OK )
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return ERROR_FAIL;
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}
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address = mflash_bank->base + MG_BUFFER_OFFSET;
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@ -506,7 +513,10 @@ static int mg_mflash_do_write_sects(void *buff, u32 sect_num, u32 sect_cnt)
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}
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}
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ret = mg_dsk_wait(mg_io_wait_rdy, MG_OEM_DISK_WAIT_TIME_NORMAL);
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if (cmd == mg_io_cmd_write)
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ret = mg_dsk_wait(mg_io_wait_rdy, MG_OEM_DISK_WAIT_TIME_NORMAL);
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else
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ret = mg_dsk_wait(mg_io_wait_rdy, MG_OEM_DISK_WAIT_TIME_LONG);
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return ret;
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}
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@ -522,7 +532,7 @@ static int mg_mflash_write_sects(void *buff, u32 sect_num, u32 sect_cnt)
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for (i = 0; i < quotient; i++) {
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LOG_DEBUG("sect num : %u buff : %0lx", sect_num,
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(unsigned long)buff_ptr);
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mg_mflash_do_write_sects(buff_ptr, sect_num, 256);
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mg_mflash_do_write_sects(buff_ptr, sect_num, 256, mg_io_cmd_write);
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sect_num += 256;
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buff_ptr += 256 * MG_MFLASH_SECTOR_SIZE;
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}
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@ -530,7 +540,7 @@ static int mg_mflash_write_sects(void *buff, u32 sect_num, u32 sect_cnt)
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if (residue) {
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LOG_DEBUG("sect num : %u buff : %0lx", sect_num,
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(unsigned long)buff_ptr);
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mg_mflash_do_write_sects(buff_ptr, sect_num, residue);
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mg_mflash_do_write_sects(buff_ptr, sect_num, residue, mg_io_cmd_write);
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}
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return ERROR_OK;
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@ -749,6 +759,433 @@ static int mg_dump_cmd(struct command_context_s *cmd_ctx, char *cmd, char **args
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return ERROR_OK;
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}
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static int mg_set_feature(mg_feature_id feature, mg_feature_val config)
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{
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target_t *target = mflash_bank->target;
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u32 mg_task_reg = mflash_bank->base + MG_REG_OFFSET;
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if (mg_dsk_wait(mg_io_wait_rdy_noerr, MG_OEM_DISK_WAIT_TIME_NORMAL)
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!= ERROR_OK)
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return ERROR_FAIL;
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target_write_u8(target, mg_task_reg + MG_REG_FEATURE, feature);
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target_write_u8(target, mg_task_reg + MG_REG_SECT_CNT, config);
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target_write_u8(target, mg_task_reg + MG_REG_COMMAND,
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mg_io_cmd_set_feature);
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return ERROR_OK;
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}
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static int mg_is_valid_pll(double XIN, int N, double CLK_OUT, int NO)
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{
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double v1 = XIN / N;
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double v2 = CLK_OUT * NO;
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if (v1 <1000000 || v1 > 15000000 || v2 < 100000000 || v2 > 500000000)
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return ERROR_FAIL;
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return ERROR_OK;
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}
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static int mg_pll_get_M(unsigned short feedback_div)
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{
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int i, M;
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for (i = 1, M=0; i < 512; i <<= 1, feedback_div >>= 1)
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M += (feedback_div & 1) * i;
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return M + 2;
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}
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static int mg_pll_get_N(unsigned char input_div)
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{
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int i, N;
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for (i = 1, N = 0; i < 32; i <<= 1, input_div >>= 1)
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N += (input_div & 1) * i;
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return N + 2;
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}
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static int mg_pll_get_NO(unsigned char output_div)
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{
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int i, NO;
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for (i = 0, NO = 1; i < 2; ++i, output_div >>= 1)
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if(output_div & 1)
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NO = NO << 1;
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return NO;
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}
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static double mg_do_calc_pll(double XIN, mg_pll_t * p_pll_val, int is_approximate)
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{
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unsigned short i;
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unsigned char j, k;
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int M, N, NO;
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double CLK_OUT;
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double DIV = 1;
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double ROUND = 0;
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if (is_approximate) {
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DIV = 1000000;
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ROUND = 500000;
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}
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for (i = 0; i < MG_PLL_MAX_FEEDBACKDIV_VAL ; ++i) {
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M = mg_pll_get_M(i);
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for (j = 0; j < MG_PLL_MAX_INPUTDIV_VAL ; ++j) {
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N = mg_pll_get_N(j);
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for (k = 0; k < MG_PLL_MAX_OUTPUTDIV_VAL ; ++k) {
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NO = mg_pll_get_NO(k);
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CLK_OUT = XIN * ((double)M / N) / NO;
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if ((int)((CLK_OUT+ROUND) / DIV)
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== (int)(MG_PLL_CLK_OUT / DIV)) {
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if (mg_is_valid_pll(XIN, N, CLK_OUT, NO) == ERROR_OK)
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{
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p_pll_val->lock_cyc = (int)(XIN * MG_PLL_STD_LOCKCYCLE / MG_PLL_STD_INPUTCLK);
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p_pll_val->feedback_div = i;
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p_pll_val->input_div = j;
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p_pll_val->output_div = k;
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return CLK_OUT;
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}
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}
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}
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}
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}
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return 0;
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}
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static double mg_calc_pll(double XIN, mg_pll_t *p_pll_val)
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{
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double CLK_OUT;
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CLK_OUT = mg_do_calc_pll(XIN, p_pll_val, 0);
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if (!CLK_OUT)
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return mg_do_calc_pll(XIN, p_pll_val, 1);
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else
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return CLK_OUT;
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}
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static int mg_verify_interface(void)
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{
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u16 buff[MG_MFLASH_SECTOR_SIZE >> 1];
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u16 i, j;
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u32 address = mflash_bank->base + MG_BUFFER_OFFSET;
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target_t *target = mflash_bank->target;
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for (j = 0; j < 10; j++) {
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for (i = 0; i < MG_MFLASH_SECTOR_SIZE >> 1; i++)
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buff[i] = i;
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target->type->write_memory(target, address, 2,
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MG_MFLASH_SECTOR_SIZE / 2, (u8 *)buff);
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memset(buff, 0xff, MG_MFLASH_SECTOR_SIZE);
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target->type->read_memory(target, address, 2,
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MG_MFLASH_SECTOR_SIZE / 2, (u8 *)buff);
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for (i = 0; i < MG_MFLASH_SECTOR_SIZE >> 1; i++) {
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if (buff[i] != i) {
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LOG_ERROR("mflash: verify interface fail");
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return ERROR_FAIL;
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}
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}
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}
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LOG_INFO("mflash: verify interface ok");
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return ERROR_OK;
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}
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static const char g_strSEG_SerialNum[20] = {
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'G','m','n','i','-','e','e','S','g','a','e','l',
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0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20
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};
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static const char g_strSEG_FWRev[8] = {
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'F','X','L','T','2','v','0','.'
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};
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static const char g_strSEG_ModelNum[40] = {
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'F','X','A','L','H','S','2',0x20,'0','0','s','7',
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0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,
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0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,
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0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20
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};
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static void mg_gen_ataid(mg_io_type_drv_info *pSegIdDrvInfo)
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{
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/* b15 is ATA device(0) , b7 is Removable Media Device */
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pSegIdDrvInfo->general_configuration = 0x045A;
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/* 128MB : Cylinder=> 977 , Heads=> 8 , Sectors=> 32
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* 256MB : Cylinder=> 980 , Heads=> 16 , Sectors=> 32
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* 384MB : Cylinder=> 745 , Heads=> 16 , Sectors=> 63
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*/
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pSegIdDrvInfo->number_of_cylinders = 0x02E9;
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pSegIdDrvInfo->reserved1 = 0x0;
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pSegIdDrvInfo->number_of_heads = 0x10;
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pSegIdDrvInfo->unformatted_bytes_per_track = 0x0;
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pSegIdDrvInfo->unformatted_bytes_per_sector = 0x0;
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pSegIdDrvInfo->sectors_per_track = 0x3F;
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pSegIdDrvInfo->vendor_unique1[0] = 0x000B;
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pSegIdDrvInfo->vendor_unique1[1] = 0x7570;
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pSegIdDrvInfo->vendor_unique1[2] = 0x8888;
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memcpy(pSegIdDrvInfo->serial_number, (void *)g_strSEG_SerialNum,20);
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/* 0x2 : dual buffer */
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pSegIdDrvInfo->buffer_type = 0x2;
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/* buffer size : 2KB */
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pSegIdDrvInfo->buffer_sector_size = 0x800;
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pSegIdDrvInfo->number_of_ecc_bytes = 0;
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memcpy(pSegIdDrvInfo->firmware_revision, (void *)g_strSEG_FWRev,8);
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memcpy(pSegIdDrvInfo->model_number, (void *)g_strSEG_ModelNum,40);
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pSegIdDrvInfo->maximum_block_transfer = 0x4;
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pSegIdDrvInfo->vendor_unique2 = 0x0;
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pSegIdDrvInfo->dword_io = 0x00;
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/* b11 : IORDY support(PIO Mode 4), b10 : Disable/Enbale IORDY
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* b9 : LBA support, b8 : DMA mode support
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*/
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pSegIdDrvInfo->capabilities = 0x1 << 9;
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pSegIdDrvInfo->reserved2 = 0x4000;
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pSegIdDrvInfo->vendor_unique3 = 0x00;
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/* PIOMode-2 support */
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pSegIdDrvInfo->pio_cycle_timing_mode = 0x02;
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pSegIdDrvInfo->vendor_unique4 = 0x00;
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/* MultiWord-2 support */
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pSegIdDrvInfo->dma_cycle_timing_mode = 0x00;
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/* b1 : word64~70 is valid
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* b0 : word54~58 are valid and reflect the current numofcyls,heads,sectors
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* b2 : If device supports Ultra DMA , set to one to vaildate word88
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*/
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pSegIdDrvInfo->translation_fields_valid = (0x1 << 1) | (0x1 << 0);
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pSegIdDrvInfo->number_of_current_cylinders = 0x02E9;
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pSegIdDrvInfo->number_of_current_heads = 0x10;
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pSegIdDrvInfo->current_sectors_per_track = 0x3F;
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pSegIdDrvInfo->current_sector_capacity_lo = 0x7570;
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pSegIdDrvInfo->current_sector_capacity_hi = 0x000B;
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pSegIdDrvInfo->multi_sector_count = 0x04;
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/* b8 : Multiple secotr setting valid , b[7:0] num of secotrs per block */
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pSegIdDrvInfo->multi_sector_setting_valid = 0x01;
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pSegIdDrvInfo->total_user_addressable_sectors_lo = 0x7570;
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pSegIdDrvInfo->total_user_addressable_sectors_hi = 0x000B;
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pSegIdDrvInfo->single_dma_modes_supported = 0x00;
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pSegIdDrvInfo->single_dma_transfer_active = 0x00;
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/* b2 :Multi-word DMA mode 2, b1 : Multi-word DMA mode 1 */
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pSegIdDrvInfo->multi_dma_modes_supported = (0x1 << 0);
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/* b2 :Multi-word DMA mode 2, b1 : Multi-word DMA mode 1 */
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pSegIdDrvInfo->multi_dma_transfer_active = (0x1 << 0);
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/* b0 : PIO Mode-3 support, b1 : PIO Mode-4 support */
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pSegIdDrvInfo->adv_pio_mode = 0x00;
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/* 480(0x1E0)nsec for Multi-word DMA mode0
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* 150(0x96) nsec for Multi-word DMA mode1
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* 120(0x78) nsec for Multi-word DMA mode2
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*/
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pSegIdDrvInfo->min_dma_cyc = 0x1E0;
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pSegIdDrvInfo->recommend_dma_cyc = 0x1E0;
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pSegIdDrvInfo->min_pio_cyc_no_iordy = 0x1E0;
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pSegIdDrvInfo->min_pio_cyc_with_iordy = 0x1E0;
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memset((void *)pSegIdDrvInfo->reserved3, 0x00, 22);
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/* b7 : ATA/ATAPI-7 ,b6 : ATA/ATAPI-6 ,b5 : ATA/ATAPI-5,b4 : ATA/ATAPI-4 */
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pSegIdDrvInfo->major_ver_num = 0x7E;
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/* 0x1C : ATA/ATAPI-6 T13 1532D revision1 */
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pSegIdDrvInfo->minor_ver_num = 0x19;
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/* NOP/READ BUFFER/WRITE BUFFER/Power management feature set support */
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pSegIdDrvInfo->feature_cmd_set_suprt0 = 0x7068;
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/* Features/command set is valid/Advanced Pwr management/CFA feature set
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* not support
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*/
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pSegIdDrvInfo->feature_cmd_set_suprt1 = 0x400C;
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pSegIdDrvInfo->feature_cmd_set_suprt2 = 0x4000;
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/* READ/WRITE BUFFER/PWR Management enable */
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pSegIdDrvInfo->feature_cmd_set_en0 = 0x7000;
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/* CFA feature is disabled / Advancde power management disable */
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pSegIdDrvInfo->feature_cmd_set_en1 = 0x0;
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pSegIdDrvInfo->feature_cmd_set_en2 = 0x4000;
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pSegIdDrvInfo->reserved4 = 0x0;
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/* 0x1 * 2minutes */
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pSegIdDrvInfo->req_time_for_security_er_done = 0x19;
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pSegIdDrvInfo->req_time_for_enhan_security_er_done = 0x19;
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/* Advanced power management level 1 */
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pSegIdDrvInfo->adv_pwr_mgm_lvl_val = 0x0;
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pSegIdDrvInfo->reserved5 = 0x0;
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memset((void *)pSegIdDrvInfo->reserved6, 0x00, 68);
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/* Security mode feature is disabled */
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pSegIdDrvInfo->security_stas = 0x0;
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memset((void *)pSegIdDrvInfo->vendor_uniq_bytes, 0x00, 62);
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/* CFA power mode 1 support in maximum 200mA */
|
||||
pSegIdDrvInfo->cfa_pwr_mode = 0x0100;
|
||||
memset((void *)pSegIdDrvInfo->reserved7, 0x00, 190);
|
||||
}
|
||||
|
||||
static int mg_storage_config(void)
|
||||
{
|
||||
u8 buff[512];
|
||||
|
||||
if (mg_set_feature(mg_feature_id_transmode, mg_feature_val_trans_vcmd)
|
||||
!= ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
|
||||
mg_gen_ataid((mg_io_type_drv_info *)buff);
|
||||
|
||||
if (mg_mflash_do_write_sects(buff, 0, 1, mg_vcmd_update_stgdrvinfo)
|
||||
!= ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
|
||||
if (mg_set_feature(mg_feature_id_transmode, mg_feature_val_trans_default)
|
||||
!= ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
|
||||
LOG_INFO("mflash: storage config ok");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
static int mg_boot_config(void)
|
||||
{
|
||||
u8 buff[512];
|
||||
|
||||
if (mg_set_feature(mg_feature_id_transmode, mg_feature_val_trans_vcmd)
|
||||
!= ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
|
||||
memset(buff, 0xff, 512);
|
||||
|
||||
buff[0] = mg_op_mode_snd; /* operation mode */
|
||||
buff[1] = MG_UNLOCK_OTP_AREA;
|
||||
buff[2] = 4; /* boot size */
|
||||
*((u32 *)(buff + 4)) = 0; /* XIP size */
|
||||
|
||||
if (mg_mflash_do_write_sects(buff, 0, 1, mg_vcmd_update_xipinfo)
|
||||
!= ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
|
||||
if (mg_set_feature(mg_feature_id_transmode, mg_feature_val_trans_default)
|
||||
!= ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
|
||||
LOG_INFO("mflash: boot config ok");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
static int mg_set_pll(mg_pll_t *pll)
|
||||
{
|
||||
u8 buff[512];
|
||||
|
||||
memset(buff, 0xff, 512);
|
||||
*((u32 *)&buff[0]) = pll->lock_cyc; /* PLL Lock cycle */
|
||||
*((u16 *)&buff[4]) = pll->feedback_div; /* PLL Feedback 9bit Divider */
|
||||
buff[6] = pll->input_div; /* PLL Input 5bit Divider */
|
||||
buff[7] = pll->output_div; /* PLL Output Divider */
|
||||
|
||||
if (mg_set_feature(mg_feature_id_transmode, mg_feature_val_trans_vcmd)
|
||||
!= ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
|
||||
if (mg_mflash_do_write_sects(buff, 0, 1, mg_vcmd_wr_pll)
|
||||
!= ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
|
||||
if (mg_set_feature(mg_feature_id_transmode, mg_feature_val_trans_default)
|
||||
!= ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
|
||||
LOG_INFO("mflash: set pll ok");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
static int mg_erase_nand(void)
|
||||
{
|
||||
if (mg_set_feature(mg_feature_id_transmode, mg_feature_val_trans_vcmd)
|
||||
!= ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
|
||||
if (mg_mflash_do_write_sects(NULL, 0, 0, mg_vcmd_purge_nand)
|
||||
!= ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
|
||||
if (mg_set_feature(mg_feature_id_transmode, mg_feature_val_trans_default)
|
||||
!= ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
|
||||
LOG_INFO("mflash: erase nand ok");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int mg_config_cmd(struct command_context_s *cmd_ctx, char *cmd,
|
||||
char **args, int argc)
|
||||
{
|
||||
double fin, fout;
|
||||
mg_pll_t pll;
|
||||
|
||||
if (mg_verify_interface() != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
|
||||
if (mg_mflash_rst() != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
|
||||
switch (argc) {
|
||||
case 2:
|
||||
if (!strcmp(args[1], "boot")) {
|
||||
if (mg_boot_config() != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
|
||||
return ERROR_OK;
|
||||
} else if (!strcmp(args[1], "storage")) {
|
||||
if (mg_storage_config() != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
|
||||
return ERROR_OK;
|
||||
} else
|
||||
return ERROR_COMMAND_NOTFOUND;
|
||||
break;
|
||||
case 3:
|
||||
if (!strcmp(args[1], "pll")) {
|
||||
fin = strtoul(args[2], NULL, 0);
|
||||
|
||||
if (fin > MG_PLL_CLK_OUT)
|
||||
return ERROR_FAIL;
|
||||
|
||||
fout = mg_calc_pll(fin, &pll);
|
||||
|
||||
if (!fout)
|
||||
return ERROR_FAIL;
|
||||
|
||||
LOG_INFO("mflash: Fout=%u Hz, feedback=%u,"
|
||||
"indiv=%u, outdiv=%u, lock=%u",
|
||||
(u32)fout, pll.feedback_div,
|
||||
pll.input_div, pll.output_div,
|
||||
pll.lock_cyc);
|
||||
|
||||
if (mg_erase_nand() != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
|
||||
if (mg_set_pll(&pll) != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
|
||||
return ERROR_OK;
|
||||
} else
|
||||
return ERROR_COMMAND_NOTFOUND;
|
||||
break;
|
||||
default:
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int mflash_init_drivers(struct command_context_s *cmd_ctx)
|
||||
{
|
||||
if (mflash_bank) {
|
||||
|
|
@ -757,6 +1194,8 @@ int mflash_init_drivers(struct command_context_s *cmd_ctx)
|
|||
"mflash write <num> <file> <address>");
|
||||
register_command(cmd_ctx, mflash_cmd, "dump", mg_dump_cmd, COMMAND_EXEC,
|
||||
"mflash dump <num> <file> <address> <size>");
|
||||
register_command(cmd_ctx, mflash_cmd, "config", mg_config_cmd,
|
||||
COMMAND_EXEC, "mflash config <num> <stage>");
|
||||
}
|
||||
|
||||
return ERROR_OK;
|
||||
|
|
|
|||
|
|
@ -48,7 +48,7 @@ typedef struct _mg_io_type_drv_info {
|
|||
mg_io_uint16 unformatted_bytes_per_track; /* 04 */
|
||||
mg_io_uint16 unformatted_bytes_per_sector; /* 05 */
|
||||
mg_io_uint16 sectors_per_track; /* 06 */
|
||||
mg_io_uint8 vendor_unique1[6]; /* 07/08/09 */
|
||||
mg_io_uint16 vendor_unique1[3]; /* 07/08/09 */
|
||||
|
||||
mg_io_uint8 serial_number[20]; /* 10~19 */
|
||||
|
||||
|
|
@ -117,6 +117,14 @@ typedef struct _mg_io_type_drv_info {
|
|||
|
||||
} mg_io_type_drv_info;
|
||||
|
||||
typedef struct _mg_pll_t
|
||||
{
|
||||
unsigned int lock_cyc;
|
||||
unsigned short feedback_div; /* 9bit divider */
|
||||
unsigned char input_div; /* 5bit divider */
|
||||
unsigned char output_div; /* 2bit divider */
|
||||
} mg_pll_t;
|
||||
|
||||
typedef struct mg_drv_info_s {
|
||||
mg_io_type_drv_info drv_id;
|
||||
u32 tot_sects;
|
||||
|
|
@ -158,6 +166,16 @@ extern int mflash_init_drivers(struct command_context_s *cmd_ctx);
|
|||
#define MG_OEM_DISK_WAIT_TIME_NORMAL 3000 /* msec */
|
||||
#define MG_OEM_DISK_WAIT_TIME_SHORT 1000 /* msec */
|
||||
|
||||
#define MG_PLL_CLK_OUT 66000000.0 /* 66Mhz */
|
||||
#define MG_PLL_MAX_FEEDBACKDIV_VAL 512
|
||||
#define MG_PLL_MAX_INPUTDIV_VAL 32
|
||||
#define MG_PLL_MAX_OUTPUTDIV_VAL 4
|
||||
|
||||
#define MG_PLL_STD_INPUTCLK 12000000.0 /* 12Mhz */
|
||||
#define MG_PLL_STD_LOCKCYCLE 10000
|
||||
|
||||
#define MG_UNLOCK_OTP_AREA 0xFF
|
||||
|
||||
typedef enum _mg_io_type_wait{
|
||||
|
||||
mg_io_wait_bsy = 1,
|
||||
|
|
@ -238,4 +256,37 @@ typedef enum _mg_io_type_cmd
|
|||
|
||||
} mg_io_type_cmd;
|
||||
|
||||
typedef enum _mg_feature_id
|
||||
{
|
||||
mg_feature_id_transmode = 0x3
|
||||
} mg_feature_id;
|
||||
|
||||
typedef enum _mg_feature_val
|
||||
{
|
||||
mg_feature_val_trans_default = 0x0,
|
||||
mg_feature_val_trans_vcmd = 0x3,
|
||||
mg_feature_val_trand_vcmds = 0x2
|
||||
} mg_feature_val;
|
||||
|
||||
typedef enum _mg_vcmd
|
||||
{
|
||||
mg_vcmd_update_xipinfo = 0xFA, /* FWPATCH commmand through IOM I/O */
|
||||
mg_vcmd_verify_fwpatch = 0xFB, /* FWPATCH commmand through IOM I/O */
|
||||
mg_vcmd_update_stgdrvinfo = 0xFC, /* IOM identificatin info program command */
|
||||
mg_vcmd_prep_fwpatch = 0xFD, /* FWPATCH commmand through IOM I/O */
|
||||
mg_vcmd_exe_fwpatch = 0xFE, /* FWPATCH commmand through IOM I/O */
|
||||
mg_vcmd_wr_pll = 0x8B,
|
||||
mg_vcmd_purge_nand = 0x8C, /* Only for Seagle */
|
||||
mg_vcmd_lock_otp = 0x8D,
|
||||
mg_vcmd_rd_otp = 0x8E,
|
||||
mg_vcmd_wr_otp = 0x8F
|
||||
} mg_vcmd;
|
||||
|
||||
typedef enum _mg_opmode
|
||||
{
|
||||
mg_op_mode_xip = 1, /* TRUE XIP */
|
||||
mg_op_mode_snd = 2, /* BOOT+Storage */
|
||||
mg_op_mode_stg = 0 /* Only Storage */
|
||||
} mg_opmode;
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user