diff --git a/src/target/arc.c b/src/target/arc.c index 694ac6f85..e11cd7d79 100644 --- a/src/target/arc.c +++ b/src/target/arc.c @@ -1467,7 +1467,7 @@ static int arc_configure_actionpoint(struct target *target, uint32_t ap_num, if (control_tt != AP_AC_TT_DISABLE) { if (arc->actionpoints_num_avail < 1) { - LOG_ERROR("No free actionpoints, maximim amount is %u", + LOG_ERROR("No free actionpoints, maximum amount is %u", arc->actionpoints_num); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } diff --git a/src/target/arc.h b/src/target/arc.h index 8d44bfa41..f0351bdf3 100644 --- a/src/target/arc.h +++ b/src/target/arc.h @@ -206,7 +206,7 @@ struct arc_common { bool dcache_invalidated; bool l2cache_invalidated; - /* Indicate if cach was built (for deinit function) */ + /* Indicate if cache was built (for deinit function) */ bool core_aux_cache_built; bool bcr_cache_built; /* Closely Coupled memory(CCM) regions for performance-critical diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c index 8f5ad59c3..6569fccfd 100644 --- a/src/target/arm_adi_v5.c +++ b/src/target/arm_adi_v5.c @@ -32,7 +32,7 @@ * This file implements support for the ARM Debug Interface version 5 (ADIv5) * debugging architecture. Compared with previous versions, this includes * a low pin-count Serial Wire Debug (SWD) alternative to JTAG for message - * transport, and focusses on memory mapped resources as defined by the + * transport, and focuses on memory mapped resources as defined by the * CoreSight architecture. * * A key concept in ADIv5 is the Debug Access Port, or DAP. A DAP has two diff --git a/src/target/avr32_mem.c b/src/target/avr32_mem.c index 71ec0b431..8f38a1844 100644 --- a/src/target/avr32_mem.c +++ b/src/target/avr32_mem.c @@ -176,7 +176,7 @@ int avr32_jtag_write_memory16(struct avr32_jtag *jtag_info, */ if (addr & 3) { /* - * mwa_read will read whole world, no nead to fiddle + * mwa_read will read whole world, no need to fiddle * with address. It will be truncated in set_addr */ retval = avr32_jtag_mwa_read(jtag_info, SLAVE_HSB_UNCACHED, @@ -248,7 +248,7 @@ int avr32_jtag_write_memory8(struct avr32_jtag *jtag_info, */ if (addr & 3) { /* - * mwa_read will read whole world, no nead to fiddle + * mwa_read will read whole world, no need to fiddle * with address. It will be truncated in set_addr */ retval = avr32_jtag_mwa_read(jtag_info, SLAVE_HSB_UNCACHED, diff --git a/src/target/embeddedice.h b/src/target/embeddedice.h index 4b5c816a6..4a62cefaa 100644 --- a/src/target/embeddedice.h +++ b/src/target/embeddedice.h @@ -106,7 +106,7 @@ int embeddedice_send(struct arm_jtag *jtag_info, uint32_t *data, uint32_t size); int embeddedice_handshake(struct arm_jtag *jtag_info, int hsbit, uint32_t timeout); -/* If many embeddedice_write_reg() follow eachother, then the >1 invocations can be +/* If many embeddedice_write_reg() follow each other, then the >1 invocations can be * this faster version of embeddedice_write_reg */ static inline void embeddedice_write_reg_inner(struct jtag_tap *tap, int reg_addr, uint32_t value) diff --git a/src/target/target.c b/src/target/target.c index e9d67702e..d60e642c9 100644 --- a/src/target/target.c +++ b/src/target/target.c @@ -5173,7 +5173,7 @@ no_params: if (goi->isconfigure) { struct command_context *cmd_ctx = current_command_context(goi->interp); if (cmd_ctx->mode != COMMAND_CONFIG) { - Jim_SetResultString(goi->interp, "-gdb-max-conenctions must be configured before 'init'", -1); + Jim_SetResultString(goi->interp, "-gdb-max-connections must be configured before 'init'", -1); return JIM_ERR; } diff --git a/src/target/target_type.h b/src/target/target_type.h index 0f3df0002..1948121fa 100644 --- a/src/target/target_type.h +++ b/src/target/target_type.h @@ -79,7 +79,7 @@ struct target_type { * state correctly. * * Otherwise the following would fail, as there will not - * be any "poll" invoked inbetween the "reset run" and + * be any "poll" invoked between the "reset run" and * "halt". * * reset run; halt