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- add cortex_m3 variant luminary to fix reset issue with asserting SRST

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- https://lists.berlios.de/pipermail/openocd-development/2008-April/002022.html for details

git-svn-id: svn://svn.berlios.de/openocd/trunk@624 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
ntfreak 2008-04-28 20:05:17 +00:00
parent cab29a63de
commit f2e10a6050
4 changed files with 34 additions and 6 deletions
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28
src/target/cortex_m3.c
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@ -706,13 +706,26 @@ int cortex_m3_assert_reset(target_t *target)
ahbap_write_system_atomic_u32(swjdp, DCB_DEMCR, TRCENA | VC_HARDERR | VC_BUSERR | VC_CORERESET );
}
if (jtag_reset_config & RESET_SRST_PULLS_TRST)
/* following hack is to handle luminary reset
* when srst is asserted the luminary device seesm to also clear the debug registers
* which does not match the armv7 debug TRM */
if (strcmp(cortex_m3->variant, "luminary") == 0)
{
jtag_add_reset(1, 1);
/* this causes the luminary device to reset using the watchdog */
ahbap_write_system_atomic_u32(swjdp, NVIC_AIRCR, AIRCR_VECTKEY | AIRCR_SYSRESETREQ );
LOG_DEBUG("Using Luminary Reset: SYSRESETREQ");
}
else
{
jtag_add_reset(0, 1);
if (jtag_reset_config & RESET_SRST_PULLS_TRST)
{
jtag_add_reset(1, 1);
}
else
{
jtag_add_reset(0, 1);
}
}
target->state = TARGET_RESET;
@ -1438,6 +1451,15 @@ int cortex_m3_init_arch_info(target_t *target, cortex_m3_common_t *cortex_m3, in
armv7m->pre_restore_context = NULL;
armv7m->post_restore_context = NULL;
if (variant)
{
cortex_m3->variant = strdup(variant);
}
else
{
cortex_m3->variant = strdup("");
}
armv7m_init_arch_info(target, armv7m);
armv7m->arch_info = cortex_m3;
armv7m->load_core_reg_u32 = cortex_m3_load_core_reg_u32;

2
src/target/cortex_m3.h
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@ -134,8 +134,8 @@ typedef struct cortex_m3_dwt_comparator_s
typedef struct cortex_m3_common_s
{
int common_magic;
arm_jtag_t jtag_info;
char *variant;
/* Context information */
u32 dcb_dhcsr;

5
src/target/target/lm3s6965.cfg
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@ -8,7 +8,10 @@ reset_config srst_only
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
target cortex_m3 little run_and_halt 0
# the luminary variant causes a software reset rather than asserting SRST
# this stops the debug registers from being cleared
# this will be fixed in later revisions of silicon
target cortex_m3 little reset_halt 0 luminary
# 4k working area at base of ram
working_area 0 0x20000000 0x4000 nobackup

5
src/target/target/lm3s811.cfg
View File

@ -8,7 +8,10 @@ reset_config srst_only
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
target cortex_m3 little run_and_halt 0
# the luminary variant causes a software reset rather than asserting SRST
# this stops the debug registers from being cleared
# this will be fixed in later revisions of silicon
target cortex_m3 little reset_halt 0 luminary
# 2k working area at base of ram
working_area 0 0x20000000 0x2000 nobackup