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no longer use jtag_add_xxx() to set end state to TAP_IDLE. Same must be done for TAP_DRPAUSE

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git-svn-id: svn://svn.berlios.de/openocd/trunk@2044 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
oharboe 2009-06-04 12:06:31 +00:00
parent f86f2ab3f8
commit f499341558
7 changed files with 25 additions and 25 deletions
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16
src/flash/str9xpec.c
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@ -137,7 +137,7 @@ static u8 str9xpec_isc_status(jtag_tap_t *tap)
field.in_value = &status;
jtag_add_dr_scan(1, &field, TAP_IDLE);
jtag_add_dr_scan(1, &field, jtag_add_end_state(TAP_IDLE));
jtag_execute_queue();
LOG_DEBUG("status: 0x%2.2x", status);
@ -225,7 +225,7 @@ static int str9xpec_read_config(struct flash_bank_s *bank)
field.in_value = str9xpec_info->options;
jtag_add_dr_scan(1, &field, TAP_IDLE);
jtag_add_dr_scan(1, &field, jtag_add_end_state(TAP_IDLE));
jtag_execute_queue();
status = str9xpec_isc_status(tap);
@ -372,7 +372,7 @@ static int str9xpec_blank_check(struct flash_bank_s *bank, int first, int last)
field.out_value = buffer;
field.in_value = NULL;
jtag_add_dr_scan(1, &field, TAP_IDLE);
jtag_add_dr_scan(1, &field, jtag_add_end_state(TAP_IDLE));
jtag_add_sleep(40000);
/* read blank check result */
@ -478,7 +478,7 @@ static int str9xpec_erase_area(struct flash_bank_s *bank, int first, int last)
field.out_value = buffer;
field.in_value = NULL;
jtag_add_dr_scan(1, &field, TAP_IDLE);
jtag_add_dr_scan(1, &field, jtag_add_end_state(TAP_IDLE));
jtag_execute_queue();
jtag_add_sleep(10);
@ -704,7 +704,7 @@ static int str9xpec_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32
field.out_value = (buffer + bytes_written);
field.in_value = NULL;
jtag_add_dr_scan(1, &field, TAP_IDLE);
jtag_add_dr_scan(1, &field, jtag_add_end_state(TAP_IDLE));
/* small delay before polling */
jtag_add_sleep(50);
@ -754,7 +754,7 @@ static int str9xpec_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32
field.out_value = last_dword;
field.in_value = NULL;
jtag_add_dr_scan(1, &field, TAP_IDLE);
jtag_add_dr_scan(1, &field, jtag_add_end_state(TAP_IDLE));
/* small delay before polling */
jtag_add_sleep(50);
@ -826,7 +826,7 @@ static int str9xpec_handle_part_id_command(struct command_context_s *cmd_ctx, ch
field.out_value = NULL;
field.in_value = buffer;
jtag_add_dr_scan(1, &field, TAP_IDLE);
jtag_add_dr_scan(1, &field, jtag_add_end_state(TAP_IDLE));
jtag_execute_queue();
idcode = buf_get_u32(buffer, 0, 32);
@ -946,7 +946,7 @@ static int str9xpec_write_options(struct flash_bank_s *bank)
field.out_value = str9xpec_info->options;
field.in_value = NULL;
jtag_add_dr_scan(1, &field, TAP_IDLE);
jtag_add_dr_scan(1, &field, jtag_add_end_state(TAP_IDLE));
/* small delay before polling */
jtag_add_sleep(50);

6
src/pld/virtex2.c
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@ -58,7 +58,7 @@ int virtex2_set_instr(jtag_tap_t *tap, u32 new_instr)
jtag_add_ir_scan(1, &field, TAP_IDLE);
jtag_add_ir_scan(1, &field, jtag_add_end_state(TAP_IDLE));
free(field.out_value);
}
@ -186,11 +186,11 @@ int virtex2_load(struct pld_device_s *pld_device, char *filename)
jtag_add_end_state(TAP_IDLE);
virtex2_set_instr(virtex2_info->tap, 0xc); /* JSTART */
jtag_add_runtest(13, TAP_IDLE);
jtag_add_runtest(13, jtag_add_end_state(TAP_IDLE));
virtex2_set_instr(virtex2_info->tap, 0x3f); /* BYPASS */
virtex2_set_instr(virtex2_info->tap, 0x3f); /* BYPASS */
virtex2_set_instr(virtex2_info->tap, 0xc); /* JSTART */
jtag_add_runtest(13, TAP_IDLE);
jtag_add_runtest(13, jtag_add_end_state(TAP_IDLE));
virtex2_set_instr(virtex2_info->tap, 0x3f); /* BYPASS */
jtag_execute_queue();

4
src/target/arm11_dbgtap.c
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@ -439,7 +439,7 @@ int arm11_run_instr_data_to_core(arm11_common_t * arm11, u32 opcode, u32 * data,
{
Data = *data;
arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, TAP_IDLE);
arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, jtag_add_end_state(TAP_IDLE));
CHECK_RETVAL(jtag_execute_queue());
@ -532,7 +532,7 @@ int arm11_run_instr_data_to_core_noack(arm11_common_t * arm11, u32 opcode, u32 *
}
else
{
jtag_add_dr_scan(asizeof(chain5_fields), chain5_fields, TAP_IDLE);
jtag_add_dr_scan(asizeof(chain5_fields), chain5_fields, jtag_add_end_state(TAP_IDLE));
}
}

2
src/target/arm7_9_common.c
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@ -1731,7 +1731,7 @@ int arm7_9_restart_core(struct target_s *target)
}
arm_jtag_set_instr(jtag_info, 0x4, NULL);
jtag_add_runtest(1, TAP_IDLE);
jtag_add_runtest(1, jtag_add_end_state(TAP_IDLE));
return jtag_execute_queue();
}

4
src/target/arm_adi_v5.c
View File

@ -70,7 +70,7 @@ int adi_jtag_dp_scan(swjdp_common_t *swjdp, u8 instr, u8 reg_addr, u8 RnW, u8 *o
/* Add specified number of tck clocks before accessing memory bus */
if ((instr == DAP_IR_APACC) && ((reg_addr == AP_REG_DRW)||((reg_addr&0xF0) == AP_REG_BD0) )&& (swjdp->memaccess_tck != 0))
jtag_add_runtest(swjdp->memaccess_tck, TAP_IDLE);
jtag_add_runtest(swjdp->memaccess_tck, jtag_add_end_state(TAP_IDLE));
fields[0].tap = jtag_info->tap;
fields[0].num_bits = 3;
@ -101,7 +101,7 @@ int adi_jtag_dp_scan_u32(swjdp_common_t *swjdp, u8 instr, u8 reg_addr, u8 RnW, u
/* Add specified number of tck clocks before accessing memory bus */
if ((instr == DAP_IR_APACC) && ((reg_addr == AP_REG_DRW)||((reg_addr&0xF0) == AP_REG_BD0) )&& (swjdp->memaccess_tck != 0))
jtag_add_runtest(swjdp->memaccess_tck, TAP_IDLE);
jtag_add_runtest(swjdp->memaccess_tck, jtag_add_end_state(TAP_IDLE));
fields[0].tap = jtag_info->tap;
fields[0].num_bits = 3;

4
src/target/avrt.c
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@ -218,7 +218,7 @@ int mcu_write_ir(jtag_tap_t *tap, u8 *ir_in, u8 *ir_out, int ir_len, int rti)
field[0].num_bits = tap->ir_length;
field[0].out_value = ir_out;
field[0].in_value = ir_in;
jtag_add_plain_ir_scan(sizeof(field) / sizeof(field[0]), field, TAP_IDLE);
jtag_add_plain_ir_scan(sizeof(field) / sizeof(field[0]), field, jtag_add_end_state(TAP_IDLE));
}
return ERROR_OK;
@ -239,7 +239,7 @@ int mcu_write_dr(jtag_tap_t *tap, u8 *dr_in, u8 *dr_out, int dr_len, int rti)
field[0].num_bits = dr_len;
field[0].out_value = dr_out;
field[0].in_value = dr_in;
jtag_add_plain_dr_scan(sizeof(field) / sizeof(field[0]), field, TAP_IDLE);
jtag_add_plain_dr_scan(sizeof(field) / sizeof(field[0]), field, jtag_add_end_state(TAP_IDLE));
}
return ERROR_OK;

14
src/target/xscale.c
View File

@ -363,7 +363,7 @@ int xscale_receive(target_t *target, u32 *buffer, int num_words)
fields[1].in_value = (u8 *)(field1+i);
jtag_add_dr_scan_check(3, fields, TAP_IDLE);
jtag_add_dr_scan_check(3, fields, jtag_add_end_state(TAP_IDLE));
jtag_add_callback(xscale_getbuf, (u8 *)(field1+i));
@ -477,7 +477,7 @@ int xscale_read_tx(target_t *target, int consume)
jtag_add_pathmove(sizeof(noconsume_path)/sizeof(*noconsume_path), noconsume_path);
}
jtag_add_dr_scan(3, fields, TAP_IDLE);
jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_IDLE));
jtag_check_value_mask(fields+0, &field0_check_value, &field0_check_mask);
jtag_check_value_mask(fields+2, &field2_check_value, &field2_check_mask);
@ -560,7 +560,7 @@ int xscale_write_rx(target_t *target)
LOG_DEBUG("polling RX");
for (;;)
{
jtag_add_dr_scan(3, fields, TAP_IDLE);
jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_IDLE));
jtag_check_value_mask(fields+0, &field0_check_value, &field0_check_mask);
jtag_check_value_mask(fields+2, &field2_check_value, &field2_check_mask);
@ -592,7 +592,7 @@ int xscale_write_rx(target_t *target)
/* set rx_valid */
field2 = 0x1;
jtag_add_dr_scan(3, fields, TAP_IDLE);
jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_IDLE));
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
@ -658,7 +658,7 @@ int xscale_send(target_t *target, u8 *buffer, int count, int size)
3,
bits,
t,
TAP_IDLE);
jtag_add_end_state(TAP_IDLE));
buffer += size;
}
@ -1646,7 +1646,7 @@ int xscale_deassert_reset(target_t *target)
/* wait 300ms; 150 and 100ms were not enough */
jtag_add_sleep(300*1000);
jtag_add_runtest(2030, TAP_IDLE);
jtag_add_runtest(2030, jtag_add_end_state(TAP_IDLE));
jtag_execute_queue();
/* set Hold reset, Halt mode and Trap Reset */
@ -1709,7 +1709,7 @@ int xscale_deassert_reset(target_t *target)
xscale_load_ic(target, 1, 0x0, xscale->low_vectors);
xscale_load_ic(target, 1, 0xffff0000, xscale->high_vectors);
jtag_add_runtest(30, TAP_IDLE);
jtag_add_runtest(30, jtag_add_end_state(TAP_IDLE));
jtag_add_sleep(100000);