diff --git a/src/target/board/ti_beagleboard.cfg b/src/target/board/ti_beagleboard.cfg
new file mode 100644
index 000000000..97251bdcd
--- /dev/null
+++ b/src/target/board/ti_beagleboard.cfg
@@ -0,0 +1,11 @@
+
+source [find target/omap3530.cfg]
+
+reset_config trst_and_srst
+jtag_reset 1 1
+sleep 10
+runtest 10
+jtag_reset 0 0
+
+endstate IDLE
+
diff --git a/src/target/target/omap3530.cfg b/src/target/target/omap3530.cfg
new file mode 100644
index 000000000..e17fe9e75
--- /dev/null
+++ b/src/target/target/omap3530.cfg
@@ -0,0 +1,40 @@
+#File omap3530.cfg - as found on the BEAGLEBOARD
+#  Assumption is it is generic for all OMAP3530 
+
+#TI OMAP3 processor - http://www.ti.com 
+
+if { [info exists CHIPNAME] } {	
+   set  _CHIPNAME $CHIPNAME    
+} else {	 
+   set  _CHIPNAME omap3
+}
+
+if { [info exists ENDIAN] } {	
+   set  _ENDIAN $ENDIAN    
+} else {	 
+  # this defaults to a little endianness
+  set  _ENDIAN little
+}
+
+if { [info exists CPUTAPID ] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+  # force an error till we get a good number
+  set _CPUTAPID 0x0B6D602F
+}
+
+#jtag scan chain
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0 -expected-id $_CPUTAPID -disable
+jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0xf -expected-id 0x0b7ae02f
+
+jtag configure $_CHIPNAME.cpu -event tap-enable {
+	puts "Enabling Cortex-A8 @ OMAP3"
+	irscan omap3.jrc 7 -endstate IRPAUSE
+	drscan omap3.jrc 8 0x89 -endstate DRPAUSE
+	irscan omap3.jrc 2 -endstate IRPAUSE
+	drscan omap3.jrc 32 0xa3002108  -endstate IDLE
+	irscan omap3.jrc 0x3F -endstate IDLE
+	runtest 10
+	puts "Cortex-A8 @ OMAP3 enabled"
+}
+