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tcl: [2/3] prepare for jimtcl 0.81 'expr' syntax change 

Jimtcl commit 1843b79a03dd ("expr: TIP 526, only support a single
arg") drops the support for multi-argument syntax for the TCL
command 'expr'.

Enclose within double quote the argument of 'expr' when there is
the need to concatenate strings.

Change-Id: Ic0ea990ed37337a7e6c3a99670583685b570b8b1
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6160
Tested-by: jenkins
This commit is contained in:
Antonio Borneo 2021-04-10 17:37:04 +02:00
parent f5657aa76e
commit f855fdcf0d
4 changed files with 12 additions and 12 deletions
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2
tcl/chip/atmel/at91/rtt.tcl
View File

@ -17,7 +17,7 @@ proc show_RTTC_RTMR_helper { NAME ADDR VAL } {
global AT91C_SLOWOSC_FREQ
# Nasty hack, make this a float by tacking a .0 on the end
# otherwise, jim makes the value an integer
set f [expr $AT91C_SLOWOSC_FREQ.0 / $rtpres.0]
set f [expr "$AT91C_SLOWOSC_FREQ.0 / $rtpres.0"]
echo [format "\tPrescale value: 0x%04x (%5d) => %f Hz" $rtpres $rtpres $f]
if { $VAL & $BIT16 } {
echo "\tBit16 -> Alarm IRQ Enabled"

2
tcl/chip/atmel/at91/usarts.tcl
View File

@ -89,7 +89,7 @@ foreach WHO { US0 US1 US2 US3 US4 US5 US6 US7 US8 US9 } {
set vn [set WHO]_[set REG]
# vn = USx_IER
# vv = variable value
set vv [expr $$n + [set USx_[set REG]]]
set vv [expr "$$n + [set USx_[set REG]]"]
# And VV is the address in memory of that register

2
tcl/fpga/xilinx-xadc.cfg
View File

@ -101,7 +101,7 @@ proc xadc_select {tap} {
proc xadc_xfer {tap cmd addr data} {
set ret [drscan $tap 32 [xadc_cmd $cmd $addr $data]]
runtest 10
return [expr 0x$ret]
return [expr "0x$ret"]
}
# XADC register write

18
tcl/target/u8500.cfg
View File

@ -52,9 +52,9 @@ proc pwrsts { } {
irscan $_CHIPNAME.jrc 0x3a
drscan $_CHIPNAME.jrc 4 0
set pwrsts [drscan $_CHIPNAME.jrc 16 0]
echo "pwrsts ="$pwrsts
set a9 [expr (0x$pwrsts & 0xc)]
set ape [expr (0x$pwrsts & 0x3)]
echo "pwrsts ="$pwrsts
set a9 [expr "0x$pwrsts & 0xc"]
set ape [expr "0x$pwrsts & 0x3"]
if {[string equal "0" $ape]} {
echo "ape off"
} else {
@ -81,12 +81,12 @@ proc poll_pwrsts { } {
irscan $_CHIPNAME.jrc 0x3a
drscan $_CHIPNAME.jrc 4 0
set pwrsts [drscan $_CHIPNAME.jrc 16 0]
set pwrsts [expr (0x$pwrsts & 0xc)]
set pwrsts [expr "0x$pwrsts & 0xc"]
while {[string equal "4" $pwrsts] && $i<20} {
irscan $_CHIPNAME.jrc 0x3a
drscan $_CHIPNAME.jrc 4 0;
set pwrsts [drscan $_CHIPNAME.jrc 16 0]
set pwrsts [expr (0x$pwrsts & 0xc)]
set pwrsts [expr "0x$pwrsts & 0xc"]
if {![string equal "4" $pwrsts]} {
set result 1
} else {
@ -239,7 +239,7 @@ proc secsts1 { } {
drscan $_CHIPNAME.jrc 4 4
set secsts1 [drscan $_CHIPNAME.jrc 16 0]
echo "secsts1 ="$secsts1
set secsts1 [expr (0x$secsts1 & 0x4)]
set secsts1 [expr "0x$secsts1 & 0x4"]
if {![string equal "4" $secsts1]} {
echo "APE target secured"
} else {
@ -254,7 +254,7 @@ proc att { } {
drscan $_CHIPNAME.jrc 4 4
set secsts1 [drscan $_CHIPNAME.jrc 16 0]
echo "secsts1 ="$secsts1
set secsts1 [expr (0x$secsts1 & 0x4)]
set secsts1 [expr "0x$secsts1 & 0x4"]
if {[string equal "4" $secsts1]} {
if {[poll_pwrsts]==1} {
enable_apetap
@ -291,13 +291,13 @@ proc rst_run { } {
drscan $_CHIPNAME.jrc 4 4
set secsts1 [drscan $_CHIPNAME.jrc 16 0]
echo "secsts1 ="$secsts1
set secsts1 [expr (0x$secsts1 & 0x4)]
set secsts1 [expr "0x$secsts1 & 0x4"]
while {![string equal "4" $secsts1]} {
irscan u8500.jrc 0x3a
drscan u8500.jrc 4 4
set secsts1 [drscan $_CHIPNAME.jrc 16 0]
echo "secsts1 ="$secsts1
set secsts1 [expr (0x$secsts1 & 0x4)]
set secsts1 [expr "0x$secsts1 & 0x4"]
}
echo "ape debugable"
enable_apetap