diff --git a/tcl/board/asus-rt-n16.cfg b/tcl/board/asus-rt-n16.cfg
new file mode 100644
index 000000000..78f111d38
--- /dev/null
+++ b/tcl/board/asus-rt-n16.cfg
@@ -0,0 +1,15 @@
+#
+# http://wikidevi.com/wiki/ASUS_RT-N16
+#
+
+set partition_list {
+    CFE		{ Bootloader			0xbc000000 0x00040000 }
+    firmware	{ "Kernel+rootfs"		0xbc040000 0x01fa0000 }
+    nvram	{ "Config space"		0xbdfe0000 0x00020000 }
+}
+
+source [find target/bcm4718.cfg]
+
+# External 32MB NOR Flash (Macronix MX29GL256EHTI2I-90Q)
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cfi 0xbc000000 0x02000000 1 1 $_TARGETNAME x16_as_x8
diff --git a/tcl/target/bcm4718.cfg b/tcl/target/bcm4718.cfg
new file mode 100644
index 000000000..8193914a3
--- /dev/null
+++ b/tcl/target/bcm4718.cfg
@@ -0,0 +1,5 @@
+set _CHIPNAME bcm4718
+set _LVTAPID 0x1471617f
+set _CPUID 0x0008c17f
+
+source [find target/bcm47xx.cfg]
diff --git a/tcl/target/bcm47xx.cfg b/tcl/target/bcm47xx.cfg
new file mode 100644
index 000000000..0132bb802
--- /dev/null
+++ b/tcl/target/bcm47xx.cfg
@@ -0,0 +1,21 @@
+echo "Forcing reset_config to none to prevent OpenOCD from pulling SRST after the switch from LV is already performed"
+reset_config none
+
+jtag newtap $_CHIPNAME-lv tap -irlen 32 -ircapture 0x1 -irmask 0x1f -expected-id $_LVTAPID -expected-id $_CPUID
+jtag configure $_CHIPNAME-lv.tap -event setup "jtag tapenable $_CHIPNAME.cpu"
+jtag configure $_CHIPNAME-lv.tap -event tap-disable {}
+
+jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUID -disable
+jtag configure $_CHIPNAME.cpu -event tap-enable "switch_lv_to_ejtag"
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME mips_m4k -endian little -chain-position $_TARGETNAME
+
+proc switch_lv_to_ejtag {} {
+    global _CHIPNAME
+    poll 0
+    irscan $_CHIPNAME-lv.tap 0x143ff3a
+    drscan $_CHIPNAME-lv.tap 32 1
+    jtag tapdisable $_CHIPNAME-lv.tap
+    poll 1
+}