target/armv7m: minor fixes of target algo exit point check

Introduce a new ERROR_TARGET_ALGO_EXIT as currently used
ERROR_TARGET_TIMEOUT should be reserved for the timeout only.

Do not load PC directly from CPU HW as the register value
has already been cached.

Change-Id: I0d3630da41fd021676789dc12b52545cc0432ba8
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5329
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
This commit is contained in:
Tomas Vanek 2019-10-20 15:03:44 +02:00
parent 6e86ad6166
commit ff9ee132e5
2 changed files with 9 additions and 7 deletions

View File

@ -462,7 +462,6 @@ int armv7m_wait_algorithm(struct target *target,
struct armv7m_common *armv7m = target_to_armv7m(target);
struct armv7m_algorithm *armv7m_algorithm_info = arch_info;
int retval = ERROR_OK;
uint32_t pc;
/* NOTE: armv7m_run_algorithm requires that each algorithm uses a software breakpoint
* at the exit point */
@ -484,12 +483,14 @@ int armv7m_wait_algorithm(struct target *target,
return ERROR_TARGET_TIMEOUT;
}
armv7m->load_core_reg_u32(target, 15, &pc);
if (exit_point && (pc != exit_point)) {
LOG_DEBUG("failed algorithm halted at 0x%" PRIx32 ", expected 0x%" TARGET_PRIxADDR,
pc,
exit_point);
return ERROR_TARGET_TIMEOUT;
if (exit_point) {
/* PC value has been cached in cortex_m_debug_entry() */
uint32_t pc = buf_get_u32(armv7m->arm.pc->value, 0, 32);
if (pc != exit_point) {
LOG_DEBUG("failed algorithm halted at 0x%" PRIx32 ", expected 0x%" TARGET_PRIxADDR,
pc, exit_point);
return ERROR_TARGET_ALGO_EXIT;
}
}
/* Read memory values to mem_params[] */

View File

@ -759,6 +759,7 @@ void target_handle_md_output(struct command_invocation *cmd,
#define ERROR_TARGET_NOT_RUNNING (-310)
#define ERROR_TARGET_NOT_EXAMINED (-311)
#define ERROR_TARGET_DUPLICATE_BREAKPOINT (-312)
#define ERROR_TARGET_ALGO_EXIT (-313)
extern bool get_target_reset_nag(void);