Commit Graph

5245 Commits

Author SHA1 Message Date
Spencer Oliver 7fe05ff330 jim: add missing jim license
Change-Id: Ib8e34739d92cd54655b9b47d07b856a82ff25f3c
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/39
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-21 09:29:44 +00:00
Andreas Fritiofson 6b209e7489 rtos: remove broken code for handling the deprecated qP packet
Change-Id: Icca522c1e2a2877abb20665b171c61079b1d8f48
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/37
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2011-10-20 01:45:25 +00:00
Andreas Fritiofson 3d2305f2e6 rtos: return the correct value if the T or H packets are handled
Change-Id: Iea31e20ee4e35c1a9cb7b93424c92b3f38081067
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/38
Tested-by: jenkins
Reviewed-by: Evan Hunter <evan@ozhiker.com>
Reviewed-by: Peter Stuge <peter@stuge.se>
2011-10-20 01:45:06 +00:00
Freddie Chopin 1c1771ef6c Unused variables
Fix a few errors with set and unused variables detected by GCC 4.7.0

Change-Id: I59b748e18e514ee9f0cde7883b4ed5116198bd4a
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/36
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-10-19 19:53:00 +00:00
Marc Willam / Holger Wech 9ddb94c1f3 Updated fm3.c, added Flash type 2 support, error handling improved
Change-Id: I684aca11c4554290d0e57c6d3318d8082980c1ef
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Reviewed-on: http://openocd.zylin.com/10
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-10-19 11:05:27 +00:00
Uwe Hermann 36e3009ff9 TMPA900/910 MCUs are always little endian.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Change-Id: I8839f2cf0faf1b5ba9f99901c5ee028b199fabd2
Reviewed-on: http://openocd.zylin.com/35
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2011-10-19 00:24:40 +00:00
Uwe Hermann 4f2655c28b Toshiba TMPA900 config: Fix incorrect working area.
The Toshiba TMPA900 series (TMPA900/901) only has internal RAM regions
RAM-0 (16kB) and RAM-1 (8kB) which we can use as working area.

This is probably a copy-paste error from tmpa910.cfg, which has the
correct values and sizes for the TMPA910 series (TMPA910/911/912/913):
there are RAM-0, RAM-1, and RAM-2 (each 16kB).

Also, change "built-in RAM" to "internal RAM" to match what the
datasheet uses.

Change-Id: I993cd6b7fadc28cf34e5cc18426bb2bb42597670
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reviewed-on: http://openocd.zylin.com/34
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2011-10-19 00:24:40 +00:00
Matt Reimer 4eca579a6e xscale: fix bug in xscale_receive()
The code in xscale_receive() that tries to skip invalid reads (i.e.
reads that don't have the DBG_SR[0] 'valid' bit set) seems to be
wrong, as it only looks at the first word's valid flag rather than
each word's own valid flag. Am I reading the code correctly? If so,
the attached patch should fix it.

If this looks correct, I'll generate a proper patch and commit message.

Matt

Change-Id: I74ebe2ad7a36d340a9dd3b8487578b6ea7f3cf1e
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/32
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-18 20:32:36 +00:00
Spencer Oliver 0dac042a10 luminary: add new targets
update target support from latest SW-DRL 8049

Change-Id: I40aba4d30fe2b79fd955f466c64d99a1dfd63ecf
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/31
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Tested-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-18 06:36:11 +00:00
Spencer Oliver af37d5f196 luminary: add peripheral reset script
some luminary device classes require a reset script
to emulate a hardware reset.

Change-Id: Id505c92451244b48b0238c2130aebab2df8d208b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/30
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Tested-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-18 06:35:42 +00:00
Karl Kurbjun 59beb93752 AM/DM37x: Use ICEPick warm reset and include halt when gdb connects.
Using the ICEPick reset seems to allow the processor to be halted sooner
and the halt on gdb connection makes the connect process more robust.

Change-Id: I0586f6e6becc60a729030509ef58907a19d545ec
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/23
Tested-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-17 19:36:09 +00:00
Karl Kurbjun 70143a96c5 ICEPick-C: Add support for warm reset through JTAG controller and provide finer detail functions.
This sets up simple functions that can later be used to provide additional
ICEPick Operations.

Change-Id: I313b8679267696fad87d23f3692963e513f2fe21
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/22
Tested-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-17 19:35:37 +00:00
Attila Kinali 2f6bdac60a Add the SAM3N familly to the chip_details table
Change-Id: Ic122d324eacf6e667ed6008ebb84708be944222c
Signed-off-by: Attila Kinali <attila@kinali.ch>
Reviewed-on: http://openocd.zylin.com/29
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Tested-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-17 17:40:25 +00:00
Øyvind Harboe 80c20a186b target_request: add target_got_message() that can be used to improve DCC performance
API change to allow implementing a back-off algorithm for
polling hardware.

Change-Id: I6cbe8b4534c8dfeb8442305171ea96b5481c1f17
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/26
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Tested-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-17 12:32:38 +00:00
Øyvind Harboe ea295bd694 target: DCC / target message backoff algorithm
by immediately polling again when we have received a message from
the target instead of waiting 100ms, we can hope for much better
performance. More than 100x? :-)

Change-Id: Ieaf0c6c8b6e5addc482895670ffbf9a743e07a29
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/27
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Tested-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-17 12:32:11 +00:00
Jim Norris 2d4bdb9fe0 Add some more detail for setting up Gerrit account.
1) Add a couple more steps when setting up the Gerrit account.

Change-Id: I5d81feac4650d4d28653d14cfc0baf14270424c1
Signed-off-by: Jim Norris <u17263@att.net>
Reviewed-on: http://openocd.zylin.com/28
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: Peter Stuge <peter@stuge.se>
2011-10-15 00:00:19 +00:00
Spencer Oliver 3828b5827d arm-jtag-ew: whitespace cleanup
Change-Id: I8861e825f9c84525e0c09c3adaa3fe300640770d
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Reviewed-on: http://openocd.zylin.com/21
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-10-14 13:01:52 +00:00
Spencer Oliver 8c3c5e53e3 flash: fix lpc2000 driver typo
Change-Id: I3a759ed98a27fd186c12355b846d5e97dba86c5b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-10-14 14:18:56 +02:00
Uwe Hermann 498662e2e5 Add an interface file for DLP Design DLP-USB1232H.
The DLP Design DLP-USB1232H UART/SPI/JTAG module is based on an FTDI FT2232H
chip. Among other things, it can used as JTAG programmer if connected to
the JTAG target properly. I have successfully wired the module to an
Olimex STM32-H103 eval board and flashed a firmware onto that using OpenOCD.

The setup details and schematics are documented at:
http://randomprojects.org/wiki/DLP-USB1232H_and_OpenOCD_based_JTAG_adapter

Change-Id: I5eb9255a61eeece233009bee77d7dc3b5d1afb8b
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reviewed-on: http://openocd.zylin.com/20
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-10-13 22:29:28 +00:00
Uwe Hermann d4599b8b3f Add a board file for the Glyn Tonga2.
This is a Toshiba TMPA900CMXBG (ARM9) based SO-DIMM CPU module with 64MB
DDR SDRAM, 256MB NAND flash, and on-board Ethernet.

The board file provides a tonga2_init function which sets up the
PLL/clocks and memory (SDRAM and SRAM), which allows writing a boot-loader
into RAM via JTAG.

Change-Id: I60522b97997bdf50e1f25aebab910d93a98522fb
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reviewed-on: http://openocd.zylin.com/19
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-10-13 22:28:16 +00:00
Spencer Oliver 8cd3832e2b target: whitespace cleanup
Change-Id: I1453f4f3dc0add529da20577e38b8b82d7d00366
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Reviewed-on: http://openocd.zylin.com/18
Reviewed-by: Alex Austin <alex.austin@spectrumdsi.com>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-10-13 20:18:43 +00:00
Michel Jaouen 5a7cff26a5 breakpoint : smp software breakpoint issue
Change-Id: Iefe78bad71d4fdb38ae412ab8fe2f6282836c22e
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/14
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-10-13 18:54:04 +00:00
Peter Stuge 2c6d312ec9 Merge "docs: update HACKING to point to Gerrit" 2011-10-12 18:48:21 +00:00
Øyvind Harboe 4e80a9128e docs: update HACKING to point to Gerrit
Change-Id: If79e86c731ac06aaefca1aebde40e7cb3de68e4d
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-10-12 20:23:18 +02:00
Spencer Oliver 24f82100f8 docs: update more url's
Change-Id: I476078f32910579fed55777c3b0e6da3ef3363b7
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-10-12 12:25:59 +01:00
Spencer Oliver ca0cc39f5f docs: update project url's
Change-Id: I54fc3aff722ed25143aad85e58d19b72fcecbba0
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-10-12 09:32:59 +01:00
Michel Jaouen 3ab7855d1a breakpoint : indentation
Change-Id: Icdb8f72dbb516cd0dfc612c3d61b6801f6382be6
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-10-11 22:04:24 +02:00
Spencer Oliver cf692abe83 replace berlios url's with sourceforge url's
Change-Id: I1c9957bb64df87cee7c5e832f21453eb8934a5fb
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-10-11 17:18:05 +01:00
Spencer Oliver 43689d3371 contrib: remove extra lf
Change-Id: I6e16010e13ad2ea0cdff99b2e8805c74bcd0eb56
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-10-11 13:01:22 +01:00
Andreas Fritiofson 92b14f8ca9 stm32f1x: use async algorithm in flash programming routine
Let the target algorithm be running in the background and buffer data
continuously through a FIFO. This reduces or removes the effect of latency
because only a very small number of queue executions needs to be done per
buffer fill. Previously, the many repeated target state changes, register
accesses (really inefficient) and algorithm uploads caused the flash
programming to be latency bound in many cases. Now it should scale better
with increased throughput.

Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-10-09 00:00:53 +02:00
Andreas Fritiofson a147563ac1 stm32f1x: use register base instead of register offset
Access the different flash banks' registers using a bank specific register
base and a register specific offset. This is equivalent but feels more
natural.

Some accesses were discovered that maybe should not be hard coded to bank0
registers. Add a note about that.

Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-10-09 00:00:52 +02:00
Andreas Fritiofson 1163435e19 cortex_m3: use armv7m's async algorithm implementation
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-10-09 00:00:52 +02:00
Andreas Fritiofson 9d4c466c21 armv7m: implement async algorithm functions
Split armv7m_run_algorithm into two pieces and use them to reimplement it.
The arch_info parameter is used to keep context between the two calls, so
both calls must refer to the same armv7m_algorithm struct. Ugly but works
for a proof-of-concept.

Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-10-09 00:00:52 +02:00
Andreas Fritiofson 3f6ef7a40b target: add async algorithm entries to the target type
On supported targets, this may be used to start a long running algorithm in
the background so the target may be interacted with during execution and
later wait for its completion.

The most obvious use case is a double buffered flash algorithm that can
upload the next block of data while the algorithm is flashing the current.

Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-10-09 00:00:52 +02:00
Simon Barner e56e5a3929 arm-jtag-ew: Send GDB keep_alive() messages when logging USB communication
- Ticket: #35
2011-10-08 23:10:20 +02:00
Simon Barner 830e76fecd arm-jtag-ew: Formatting 2011-10-08 23:10:11 +02:00
Simon Barner 028d9aa9ed arm-jtag-ew: In armjtagew_init(), set initial JTAG speed to 32 kHz (before TAP initialization).
This prevents rare communication errors during startup.
2011-10-08 23:09:42 +02:00
Simon Barner b1c74747b6 arm-jtag-ew: Emit a warning if interface firmware version != 1.6 2011-10-08 23:09:30 +02:00
Simon Barner e4590dad08 arm-jtag-ew: Declare interface as `jtag_only' 2011-10-08 23:09:21 +02:00
Simon Barner 07bf5f443a arm-jtag-ew: Provide armjtagew_speed_div() in order to fix interactive use of `adapter_khz' 2011-10-08 23:09:05 +02:00
Simon Barner 8b61ed2e95 arm-jtag-ew: Fix setting interface speed (2/2)
Interface expects speed in Hz, not kHz

- Ticket #34
2011-10-08 23:08:46 +02:00
Simon Barner 3977c5169b arm-jtag-ew: Fix setting interface speed (1/2)
CMD_SET_TCK_FREQUENCY message length is 5, not 4

- Ticket: #34
2011-10-08 23:08:15 +02:00
Eugeniy Meshcheryakov e42363c0f6 Add udev rules for openmoko neo1973 debug board 2011-10-08 23:04:27 +02:00
Clément Burin des Roziers da8ce5f2e1 STM32L: Added flash driver and target
Added the flash driver for the STM32L family, which highly differ from the STM32F family.
Added the TCL target file for JTAG access.
2011-10-03 18:42:39 +02:00
Ash Charles a17adf0601 Verdex: Add support for Gumstix Verdex boards.
Gumstix Verdex is a PXA270-based series of computer-on-modules. This
configuration file is based off the voipac.cfg configuration with
a different flash memory configuration. This has been tested flyswatter
adapter to reflash a Gumstix Verdex XL6P board.
2011-10-01 13:11:02 +02:00
Michel Jaouen ac49e24149 u8500 : config for L2 cache 2011-09-30 09:45:29 +02:00
Michel Jaouen 00ded4eb01 armv7a ,cortex a : add L1, L2 cache support, va to pa support 2011-09-30 09:45:26 +02:00
Steve Bennett ef885d3b2a jim-nvp is moving from jimtcl to openocd
The jim-nvp code is specific to openocd, so it belongs in openocd,
not in the core jimtcl.

Signed-off-by: Steve Bennett <steveb@workware.net.au>
2011-09-30 09:38:22 +02:00
Vladimir Zapolskiy 05b12e6c5e AM/DM37x: add ES1.2 silicon type into account
The missing value for ES1.2 silicon revision is mentioned in
sprugn4m.pdf, and the recent TI Beagleboard XM is powered by it,
so let support the revision.
2011-09-30 09:37:04 +02:00
Mathias K daa41473ab add target events, run algorithm and default r/w buffer api
Target events are added to get better gdb support. The run
algorithm functionality are implemented to support feature
fast flash write functionality. The new r/w buffer api is now
used to support the special memory address handling. The output
of the md command was fixed.
2011-09-23 15:32:49 +02:00