L0 is cortex m0+, so different id codes, SWD only, different addresses
for the clock speedup. It has no endian options, no boundary scan.
Removed all L0 specific portions from L1 files, and renamed files to clarify
their purpose. The deprecated stm32lx_stlink.cfg is kept as is, as it is only
around for backwards compatibility with prior releases.
Tested on STM32L053 Discovery and STM32L151 Discovery.
Has _not_ been tested with jtag on L1.
Change-Id: I8eea890d2f92a302d9e9c8a8832d218ee1b6bcfc
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2405
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Juha Niskanen <juha.niskanen@haltian.com>
Fix script parse error, when using JTAG, introduced in
commit 0187ced9ed
Add several BS TAPIDs with comments about ST documentation.
Change-Id: I8d0370b244ccaf7ea0dbe1919bfad1915f7317d4
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
Reviewed-on: http://openocd.zylin.com/2376
Tested-by: jenkins
Reviewed-by: Rémi PRUD'HOMME <prudhomme.remi@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Since all F4 parts have an internal HSI providing 16MHz, it's safe to
use 2MHz JTAG frequency by default.
Change-Id: I2702d5a1d642d4acd4af2db54c028949132c6900
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2383
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The IAP firmware won't return a proper status with some versions. This
happens on my CCC r0ket board and others have seen it as well [1]. So
just ignore the status code and do a (weak) consistency check instead.
[1] http://www.lpcware.com/content/forum/lpc1343-iap-read-part-identification-command
Change-Id: I0daa779d520a540629677c56857bbc20d6db422d
Signed-off-by: Grigori Goronzy <greg@chown.ath.cx>
Reviewed-on: http://openocd.zylin.com/2364
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This check code is imported from Linux v3.17 checkpatch.pl.
Change-Id: If39d834ee9b6131bccc92de38fd7c108650bd2f1
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Reviewed-on: http://openocd.zylin.com/2341
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
The FSF address has changed; The FSF site says that
address is
Free Software Foundation
51 Franklin Street, Fifth Floor
Boston, MA 02110-1301
USA
(see http://www.fsf.org/about/contact/)
Instead of updating it each time the address changes,
just drop it completely treewide.
Change-Id: I27199f7625901f677d8105d1e8876cff00147b71
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Reviewed-on: http://openocd.zylin.com/2340
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
checkpatch.pl looks for linux kernel specific paths and files
to check source tree. As openocd misses kernel files it ends
with this error message:
Must be run from the top-level dir. of a kernel tree
This patch also renames 'kernel' -> 'openocd'
in source tree-related messages.
Due to checkpatch checking modifications on itself, lift the
restriction on having no spaces at the start of a line for Perl
scripts. This can be readded back later.
Change-Id: I89b7ca976bef5e13785bd3a43e597c9feb4c2df4
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Reviewed-on: http://openocd.zylin.com/2339
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The code that takes only sections marked PT_LOAD is in
image_elf_read_headers in src/target/image.c
(Just trying to save some time for the next person with same question.)
Change-Id: I493c102c908fca2b7238276ddbbecbe8c7cd9a0a
Signed-off-by: Alexei Colin <ac@alexeicolin.com>
Reviewed-on: http://openocd.zylin.com/2348
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
When an enabled FPU is detected we now use an appropriate stacking.
Change-Id: I1b0f43ec22e1c55c4f10e2ffa97d4aaa77bca5ee
Signed-off-by: Christian Gudrian <christian.gudrian@gmx.de>
Reviewed-on: http://openocd.zylin.com/2354
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
In ChibiOS/RT 3.0 the ready list pointer "rlist" is now part of the system
data structure. Since the ready list is the first element in that
structure it can be accessed via the structure's symbol "ch".
Change-Id: Idc7eaa87cb7bbad0afa0ff1dafd54283bf429766
Signed-off-by: Christian Gudrian <christian.gudrian@gmx.de>
Reviewed-on: http://openocd.zylin.com/2352
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
is_erased can be one of -1, 0, or 1 so it must not be checked like a
boolean value. In this case we want to erase a page unless we know it's
already erased so we just check for is_erased != 1.
Thanks to Jim Paris for pointing this out on another driver.
Change-Id: I4591186228153b64e5a9608a2aac18745e578d4a
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/2368
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Some J-Link fw versions require registration to be performed before
SWD operation is possible. It doesn't harm anyway, vendor's utilities
do it unconditionally.
Thanks go to Segger for providing the necessary information.
Change-Id: Iabd76c743eca86e2c817a97cb93c969fec3f7ac6
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2331
Tested-by: jenkins
Added the chip definition for the Atmel AT91SAM4S4A. This chip is a 48-pin
package with 256k flash and 64k ram.
Change-Id: I8ada7d5735e31e0ce086f96f5906c7358464245c
Signed-off-by: Thomas Schmid <thomas@rfranging.com>
Reviewed-on: http://openocd.zylin.com/2254
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
After SPI flash was written by the assembly language stub,
the last SPI command was not terminated by raising CS.
This left the SPI device in a hung state that prevented the
flash from being read by the M4 SPIFI controller, even after
the M4 was fully reset. To access the flash via SPIFI, it was
necessary to completely power cycle the board.
This fix adds the missing instructions to raise CS and
terminate the SPI command after the last byte. This allows
the M4 to be resumed or reset cleanly after flashing. The
SPIFI memory is now immediately accessable at address
0x1400 0000 after flashing is complete.
Change-Id: I4d5e03bded0fa00c430c2991f182dc18611d5f48
Signed-off-by: Anders <anders@openpuma.org>
Reviewed-on: http://openocd.zylin.com/2359
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This patch adds flash programming support for LPC1547/8/9 and LPC1517/8/9.
Tested on LPC1549(LPC1549 LPCXpresso Board with CMSIS-DAP firmware).
Change-Id: Ic95b4d62055bb9fdc2ca484696a38ccaf49ad951
Signed-off-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Reviewed-on: http://openocd.zylin.com/2304
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Grigori G <greg@chown.ath.cx>
is_erased can take the value 0 (no), 1 (yes), or -1 (unknown).
Checks like (!is_erased) don't do the right thing if it's -1.
Change-Id: I10ba32c99494ca803e0a7a1ba56fdd78184b96bb
Signed-off-by: Jim Paris <jim@jtan.com>
Reviewed-on: http://openocd.zylin.com/2366
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
If the UICR is already empty, there's no reason to return an error
just because it can't be erased again. This happens, for example,
when flashing UICR from GDB after a "monitor nrf51 mass_erase".
Change-Id: Ia6d28c43189205fb5a7120b1c7312e45eb32edb7
Signed-off-by: Jim Paris <jim@jtan.com>
Reviewed-on: http://openocd.zylin.com/2363
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
nrf51_erase_page() checks for (sector->offset == NRF51_UICR_BASE) to
determine if the UICR should be erased. However, sector->offset for
the UICR bank is set to 0 in nrf51_probe, so this code is never hit.
Attempting to erase UICR ends up erasing the first flash sector.
Use bank->base instead to determine if UICR is being erased.
Change-Id: Ie5df0f9732f23662085ae2b713d64968cd801472
Signed-off-by: Jim Paris <jim@jtan.com>
Reviewed-on: http://openocd.zylin.com/2362
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The UICR region is actually 0x100 bytes in size. Besides making the
full region accessible, having the right value is important because
GDB rounds flash addresses to the nearest multiple of the block size
when determing which flash blocks to erase.
Change-Id: I416c391cbfc7be41a03a9b9c6e42326c87391f38
Signed-off-by: Jim Paris <jim@jtan.com>
Reviewed-on: http://openocd.zylin.com/2361
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
added "Single Wire Output" and "Trace Memory Controller" peripheral
IDs to dap_rom_display(), which is invoked by the "dap info" command
Change-Id: Iea3201007bb98e6376fbb50be40a4a2e031b0a03
Signed-off-by: Peter Lawrence <majbthrd@gmail.com>
Reviewed-on: http://openocd.zylin.com/2369
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
In preparation for adding serial number support.
Change-Id: I3c9fb411b79d54a4d2de067039255436ba6708c7
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/2328
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This means the user does not have to install texinfo to build OpenOCD.
Change-Id: Id9f42da798d3c2b79e95214c9e2559cf32802251
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/2325
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The mass erase for STM32L was lack because the procedure is more complex
than the procedure for the STM32F4xx.
The reference manual RM0038 (L100 subfamily) page 79 is more accurate
than the reference manual for the STM32L0xx. On the L0, the mass-erase
erase also the EEPROM. This is a limit to mass erase on L0.
The mass erase procedure is a command of telnet interface.
Tested on Discovery L053 and Discovery L100.
Change-Id: I6a1d7a3669789aea89c59a006ab2d883f3d827ca
Signed-off-by: Rémi PRUD'HOMME <prudhomme.remi@gmail.com>
Reviewed-on: http://openocd.zylin.com/2319
Tested-by: jenkins
Reviewed-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
this board use STLink-V2-1, the STM32L1xx use the STLink-V2.
Change-Id: Ie58f45affcb1e9a6fed711b48c3c03b5035ab2b2
Signed-off-by: Rémi PRUD'HOMME <prudhomme.remi@gmail.com>
Reviewed-on: http://openocd.zylin.com/2317
Tested-by: jenkins
Reviewed-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Add CPUTAPID for stm32 L0xx mcu devices. Using -expected-id to
add the new id with the id for L1xx devices. This for reduce the
duplicated code.
Change-Id: I48bd230884ecf38fa200c620b547bdf3b5f59132
Signed-off-by: Rémi PRUD'HOMME <prudhomme.remi@gmail.com>
Reviewed-on: http://openocd.zylin.com/2315
Tested-by: jenkins
Reviewed-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This should make protection work as expected on all stellaris
families, including the latest Tiva C Snowflake.
Run-time tested on TM4C123x (Blizzard).
Change-Id: Ia017edb119bec32382b08fc037b5bbc02dd9000c
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2267
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This introduces a new common function that allows auto-discovery of a
suitable USB interface based on class, subclass and protocol
matching. It claims the interface and returns the corresponding
endpoints number to the caller.
The need for this arised due to nRF51822 USB dongle which comes with
an "on-board Segger J-link debugger" having 3 interfaces, so the
current code can't work at all with it (in this particular case the
last interface needs to be choosen). This also removes special
handling of JLink-OB endpoint numbers as it's now possible to
autodetect them as well as the standard JLink endpoints.
Change-Id: I4d990a7a3b373efdd2949a394b32d855a168e138
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2327
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This is still limited to pre-Snowflake parts and the first 64K of
flash.
Change-Id: I9ca872ada3d1a87dba6261464b2a72a15eda5ecf
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2264
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
TI's ICDI adapter supports some additional commands which a user might
want to run for debugging or other purposes, the most useful of them
being "debug unlock" that fully mass-erases the device and unprotects
the flash.
Change-Id: I26990e736094367f92106fa891e9bb8fb0382efb
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2263
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
According to my inspection of an Olimex ARM-USB-OCD-H adapter ACBUS0
is connected directly to an SN74LVC2T45 buffer input B2, and the
corresponding output A2 is connected directly to the JTAG
connector. It seems the information in the Olimex flyer is incorrect
for the -H version and TRST can't be tri-stated, ACBUS2 is unused.
The older ARM-USB-OCD device has SN74AC244 for an output buffer and
ACBUS2 controls its !2OE, ACBUS0 connected to 2A1 (2Y1 is nTRST), in
accordance with the information flyer.
Change-Id: I22828b7b959b6f62c3f51367feb8fab9705641e5
Reported-by: Tim Sander <tim@krieglstein.org>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2286
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Tim Sander <tim@krieglstein.org>
Change 2288 fixed the extraneous reset caused by set_configuration that
crashed the LPC Link-2 running JLink firmware and works on windows platforms.
On Linux however, conditional code was still calling USB reset and caused
the adapter to crash on any non-windows platforms.
Change-Id: Ibf2a02d0dcdd91ccb71d86231cd8311dcadfee1e
Signed-off-by: anders@openpuma.org
Reviewed-on: http://openocd.zylin.com/2297
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
According to [1], we shouldn't reselect an already active configuration to avoid needless device reset. This is known to cause issues with e.g. LPC Link2 with JLink firmware.
[1] http://libusb.sourceforge.net/api-1.0/caveats.html#configsel
Change-Id: I3568ada77780a521548c450090db7173f8d0b2dd
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Anders Oleson <anders@openpuma.org>
Reviewed-on: http://openocd.zylin.com/2288
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
There were two problems with the _protect() feature:
1. The address written was off by a factor of two because the address
register takes 16-bit rather than 8-bit addresses. As a result the
wrong sectors were (un)protected with the protect command. This has
been fixed.
2. The protection settings issued via the lock or unlock region commands
don't persist after reset. Making them persist requires modifying the
LOCK bits in the User Row using the infrastructure described below.
The Atmel SAMD2x MCUs provide a User Row (the size of which is one
page). This contains a few settings that users may wish to modify from
the debugger, especially during production. This change adds commands
to inspect and set:
- EEPROM size, the size in bytes of the emulated EEPROM region of the
Flash.
- Bootloader size, the size in bytes of the protected "boot" section of
the Flash.
This is done by a careful read-modify-write of the special User Row
page, avoiding erasing when possible and disallowing the changing of
documented reserved bits. The Atmel SAMD20 datasheet was used for bit
positions and descriptions, size tables, etc. and testing was done on a
SAMD20 Xplained Pro board.
It's technically possible to store arbitrary user data (ex: serial
numbers, MAC addresses, etc) in the remaining portion of the User Row
page (that is, beyond the first 64 bits of it). The infrastructure used
by the eeprom and bootloader commands can be used to access this as
well, and this seems safer than exposing the User Row as a normal Flash
sector that openocd understands due to the delicate nature of some of
the data stored there.
Change-Id: I29ca1bdbdc7884bc0ba0ad18af1b6bab78c7ad38
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/2326
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reference code for the SAMD2x disables caching in the NVM controller when
issuing NVM commands. Let's do this as well to be consistent and safer.
Add a "chip-erase" for the Atmel SAMD targets that issues a complete Chip Erase
via the Device Service Unit (DSU). This can be used to "unlock" or otherwise
unbrick a chip that can't be halted or inspected, allowing the user to reflash
with new firmware.
Add a "set-security" command which issues an SSB. Once that's done and the
device is power-cycled, the flash cannot be written to until a "chip-erase" is
issued. The chip-erase cannot be issued by openocd at this time because
the device will not respond to a request for the DAP IDCODE.
Change-Id: I80122f0bbf7e3aedffe052c1e77d69dc2dba25ed
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/2239
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
When looking for a debug base address of a core, one should search
through all the ROM tables, not just the top-level one.
This code also assumes that the first found entry (in a depth-first
search) will correspond to core 0, the second to core 1 etc.
The patch is supposed to be an alternative implementation of
http://openocd.zylin.com/#/c/1313/.
Change-Id: Ifc88971a02fe3d9c00d9bf72a822ade5804d4e09
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1920
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Since 6733253219 jlink adapter driver
supports SWD in addition to JTAG.
Change-Id: I9376aa02d9281f3e2734d8f127cd42162633d95b
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2324
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Andreas Fritiofson
Karl Palsson
Juha Niskanen
Uwe Bonnes
Grigori Goronzy
Antony Pavlov
Alexei Colin
Christian Gudrian
Paul Fertser
Andrey Yurovsky
Thomas Schmid
Anders
Nemui Trinomius
Jim Paris
Peter Lawrence
Spencer Oliver
Rémi PRUD'HOMME