2 Commits

Author	SHA1	Message	Date
duane	a28eaa85f7	jtag newtap change & huge manual update ... git-svn-id: svn://svn.berlios.de/openocd/trunk@1194 b42882b7-edfa-0310-969c-e2dbd0fdcd60	2008-11-30 22:25:43 +00:00
drath	e9297b40b9	- added a PLD (programmable logic device) subsystem for FPGA, CPLD etc. configuration ... - added support for loading .bit files into Xilinx Virtex-II devices - added support for the Gateworks GW16012 JTAG dongle - merged CFI fixes from XScale branch - a few minor fixes git-svn-id: svn://svn.berlios.de/openocd/trunk@116 b42882b7-edfa-0310-969c-e2dbd0fdcd60	2006-11-22 13:03:10 +00:00