214 lines
6.8 KiB
C
214 lines
6.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/***************************************************************************
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* Copyright (C) 2005, 2007 by Dominic Rath *
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* Dominic.Rath@gmx.de *
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* *
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* Copyright (C) 2007 by Vincent Palatin *
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* vincent.palatin_openocd@m4x.org *
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***************************************************************************/
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#ifndef OPENOCD_TARGET_ETM_H
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#define OPENOCD_TARGET_ETM_H
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#include "trace.h"
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#include "arm_jtag.h"
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struct image;
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/* ETM registers (JTAG protocol) */
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enum {
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ETM_CTRL = 0x00,
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ETM_CONFIG = 0x01,
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ETM_TRIG_EVENT = 0x02,
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ETM_ASIC_CTRL = 0x03,
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ETM_STATUS = 0x04,
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ETM_SYS_CONFIG = 0x05,
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ETM_TRACE_RESOURCE_CTRL = 0x06,
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ETM_TRACE_EN_CTRL2 = 0x07,
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ETM_TRACE_EN_EVENT = 0x08,
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ETM_TRACE_EN_CTRL1 = 0x09,
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/* optional FIFOFULL */
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ETM_FIFOFULL_REGION = 0x0a,
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ETM_FIFOFULL_LEVEL = 0x0b,
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/* viewdata support */
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ETM_VIEWDATA_EVENT = 0x0c,
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ETM_VIEWDATA_CTRL1 = 0x0d,
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ETM_VIEWDATA_CTRL2 = 0x0e, /* optional */
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ETM_VIEWDATA_CTRL3 = 0x0f,
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/* N pairs of ADDR_{COMPARATOR,ACCESS} registers */
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ETM_ADDR_COMPARATOR_VALUE = 0x10,
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ETM_ADDR_ACCESS_TYPE = 0x20,
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/* N pairs of DATA_COMPARATOR_{VALUE,MASK} registers */
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ETM_DATA_COMPARATOR_VALUE = 0x30,
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ETM_DATA_COMPARATOR_MASK = 0x40,
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/* N quads of COUNTER_{RELOAD_{VALUE,EVENT},ENABLE,VALUE} registers */
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ETM_COUNTER_RELOAD_VALUE = 0x50,
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ETM_COUNTER_ENABLE = 0x54,
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ETM_COUNTER_RELOAD_EVENT = 0x58,
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ETM_COUNTER_VALUE = 0x5c,
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/* 6 sequencer event transitions */
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ETM_SEQUENCER_EVENT = 0x60,
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ETM_SEQUENCER_STATE = 0x67,
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/* N triggered outputs */
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ETM_EXTERNAL_OUTPUT = 0x68,
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/* N task contexts */
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ETM_CONTEXTID_COMPARATOR_VALUE = 0x6c,
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ETM_CONTEXTID_COMPARATOR_MASK = 0x6f,
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ETM_ID = 0x79,
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};
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struct etm_reg {
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uint8_t value[4];
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const struct etm_reg_info *reg_info;
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struct arm_jtag *jtag_info;
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};
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/* Subset of ETM_CTRL bit assignments. Many of these
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* control the configuration of trace output, which
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* hooks up either to ETB or to an external device.
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*
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* NOTE that these have evolved since the ~v1.3 defns ...
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*/
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enum {
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ETM_CTRL_POWERDOWN = (1 << 0),
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ETM_CTRL_MONITOR_CPRT = (1 << 1),
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/* bits 3:2 == trace type */
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ETM_CTRL_TRACE_DATA = (1 << 2),
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ETM_CTRL_TRACE_ADDR = (2 << 2),
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ETM_CTRL_TRACE_MASK = (3 << 2),
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/* Port width (bits 21 and 6:4) */
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ETM_PORT_4BIT = 0x00,
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ETM_PORT_8BIT = 0x10,
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ETM_PORT_16BIT = 0x20,
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ETM_PORT_24BIT = 0x30,
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ETM_PORT_32BIT = 0x40,
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ETM_PORT_48BIT = 0x50,
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ETM_PORT_64BIT = 0x60,
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ETM_PORT_1BIT = 0x00 | (1 << 21),
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ETM_PORT_2BIT = 0x10 | (1 << 21),
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ETM_PORT_WIDTH_MASK = 0x70 | (1 << 21),
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ETM_CTRL_FIFOFULL_STALL = (1 << 7),
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ETM_CTRL_BRANCH_OUTPUT = (1 << 8),
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ETM_CTRL_DBGRQ = (1 << 9),
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ETM_CTRL_ETM_PROG = (1 << 10),
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ETM_CTRL_ETMEN = (1 << 11),
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ETM_CTRL_CYCLE_ACCURATE = (1 << 12),
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/* Clocking modes -- up to v2.1, bit 13 */
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ETM_PORT_FULL_CLOCK = (0 << 13),
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ETM_PORT_HALF_CLOCK = (1 << 13),
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ETM_PORT_CLOCK_MASK = (1 << 13),
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/* bits 15:14 == context ID size used in tracing */
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ETM_CTRL_CONTEXTID_NONE = (0 << 14),
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ETM_CTRL_CONTEXTID_8 = (1 << 14),
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ETM_CTRL_CONTEXTID_16 = (2 << 14),
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ETM_CTRL_CONTEXTID_32 = (3 << 14),
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ETM_CTRL_CONTEXTID_MASK = (3 << 14),
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/* Port modes -- bits 17:16, tied to clocking mode */
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ETM_PORT_NORMAL = (0 << 16),
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ETM_PORT_MUXED = (1 << 16),
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ETM_PORT_DEMUXED = (2 << 16),
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ETM_PORT_MODE_MASK = (3 << 16),
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/* bits 31:18 defined in v3.0 and later (e.g. ARM11+) */
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};
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/* forward-declare ETM context */
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struct etm_context;
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struct etm_capture_driver {
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const char *name;
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const struct command_registration *commands;
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int (*init)(struct etm_context *etm_ctx);
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trace_status_t (*status)(struct etm_context *etm_ctx);
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int (*read_trace)(struct etm_context *etm_ctx);
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int (*start_capture)(struct etm_context *etm_ctx);
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int (*stop_capture)(struct etm_context *etm_ctx);
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};
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enum {
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ETMV1_TRACESYNC_CYCLE = 0x1,
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ETMV1_TRIGGER_CYCLE = 0x2,
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};
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struct etmv1_trace_data {
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uint8_t pipestat; /* bits 0-2 pipeline status */
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uint16_t packet; /* packet data (4, 8 or 16 bit) */
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int flags; /* ETMV1_TRACESYNC_CYCLE, ETMV1_TRIGGER_CYCLE */
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};
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/* describe a trace context
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* if support for ETMv2 or ETMv3 is to be implemented,
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* this will have to be split into version independent elements
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* and a version specific part
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*/
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struct etm_context {
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struct target *target; /* target this ETM is connected to */
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struct reg_cache *reg_cache; /* ETM register cache */
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struct etm_capture_driver *capture_driver; /* driver used to access ETM data */
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void *capture_driver_priv; /* capture driver private data */
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trace_status_t capture_status; /* current state of capture run */
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struct etmv1_trace_data *trace_data; /* trace data */
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uint32_t trace_depth; /* number of cycles to be analyzed, 0 if no data available */
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uint32_t control; /* shadow of ETM_CTRL */
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int /*arm_state*/ core_state; /* current core state */
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struct image *image; /* source for target opcodes */
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uint32_t pipe_index; /* current trace cycle */
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uint32_t data_index; /* cycle holding next data packet */
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bool data_half; /* port half on a 16 bit port */
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bool pc_ok; /* full PC has been acquired */
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bool ptr_ok; /* whether last_ptr is valid */
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uint8_t bcd_vers; /* e.g. 0x13 == ETMv1.3 */
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uint32_t config; /* cache of ETM_CONFIG value */
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uint32_t id; /* cache of ETM_ID value, or 0 */
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uint32_t current_pc; /* current program counter */
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uint32_t last_branch; /* last branch address output */
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uint32_t last_branch_reason; /* type of last branch encountered */
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uint32_t last_ptr; /* address of the last data access */
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uint32_t last_instruction; /* index of last executed (to calc timings) */
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};
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/* PIPESTAT values */
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typedef enum {
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STAT_IE = 0x0,
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STAT_ID = 0x1,
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STAT_IN = 0x2,
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STAT_WT = 0x3,
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STAT_BE = 0x4,
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STAT_BD = 0x5,
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STAT_TR = 0x6,
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STAT_TD = 0x7
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} etmv1_pipestat_t;
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/* branch reason values */
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typedef enum {
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BR_NORMAL = 0x0, /* Normal PC change : periodic synchro (ETMv1.1) */
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BR_ENABLE = 0x1, /* Trace has been enabled */
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BR_RESTART = 0x2, /* Trace restarted after a FIFO overflow */
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BR_NODEBUG = 0x3, /* ARM has exited for debug state */
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BR_PERIOD = 0x4, /* Periodic synchronization point (ETM >= v1.2)*/
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BR_RSVD5 = 0x5, /* reserved */
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BR_RSVD6 = 0x6, /* reserved */
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BR_RSVD7 = 0x7, /* reserved */
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} etmv1_branch_reason_t;
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struct reg_cache *etm_build_reg_cache(struct target *target,
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struct arm_jtag *jtag_info, struct etm_context *etm_ctx);
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int etm_setup(struct target *target);
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extern const struct command_registration etm_command_handlers[];
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#define ERROR_ETM_INVALID_DRIVER (-1300)
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#define ERROR_ETM_PORTMODE_NOT_SUPPORTED (-1301)
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#define ERROR_ETM_CAPTURE_INIT_FAILED (-1302)
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#define ERROR_ETM_ANALYSIS_FAILED (-1303)
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#endif /* OPENOCD_TARGET_ETM_H */
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