114 lines
4.2 KiB
C
114 lines
4.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/***************************************************************************
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* Copyright (C) 2008 by Spencer Oliver *
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* spen@spen-soft.co.uk *
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* *
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* Copyright (C) 2008 by David T.L. Wong *
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* *
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* Copyright (C) 2011 by Drasko DRASKOVIC *
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* drasko.draskovic@gmail.com *
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***************************************************************************/
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#ifndef OPENOCD_TARGET_MIPS32_PRACC_H
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#define OPENOCD_TARGET_MIPS32_PRACC_H
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#include <target/mips32.h>
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#include <target/mips_ejtag.h>
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#define MIPS32_PRACC_FASTDATA_AREA 0xFF200000
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#define MIPS32_PRACC_FASTDATA_SIZE 16
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#define MIPS32_PRACC_BASE_ADDR 0xFF200000
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#define MIPS32_PRACC_TEXT 0xFF200200
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#define MIPS32_PRACC_PARAM_OUT 0xFF202000
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#define PRACC_UPPER_BASE_ADDR (MIPS32_PRACC_BASE_ADDR >> 16)
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#define PRACC_MAX_CODE (MIPS32_PRACC_PARAM_OUT - MIPS32_PRACC_TEXT)
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#define PRACC_MAX_INSTRUCTIONS (PRACC_MAX_CODE / 4)
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#define PRACC_OUT_OFFSET (MIPS32_PRACC_PARAM_OUT - MIPS32_PRACC_BASE_ADDR)
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#define MIPS32_FASTDATA_HANDLER_SIZE 0x80
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#define UPPER16(addr) ((addr) >> 16)
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#define LOWER16(addr) ((addr) & 0xFFFF)
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#define NEG16(v) (((~(v)) + 1) & 0xFFFF)
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#define SWAP16(v) ((LOWER16(v) << 16) | (UPPER16(v)))
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/*#define NEG18(v) (((~(v)) + 1) & 0x3FFFF)*/
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#define PRACC_BLOCK 128 /* 1 Kbyte */
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struct pa_list {
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uint32_t instr;
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uint32_t addr;
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};
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struct pracc_queue_info {
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struct mips_ejtag *ejtag_info;
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unsigned isa;
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int retval;
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int code_count;
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int store_count;
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int max_code; /* max instructions with currently allocated memory */
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struct pa_list *pracc_list; /* Code and store addresses at dmseg */
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};
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void pracc_queue_init(struct pracc_queue_info *ctx);
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void pracc_add(struct pracc_queue_info *ctx, uint32_t addr, uint32_t instr);
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void pracc_add_li32(struct pracc_queue_info *ctx, uint32_t reg_num, uint32_t data, bool optimize);
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void pracc_queue_free(struct pracc_queue_info *ctx);
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int mips32_pracc_queue_exec(struct mips_ejtag *ejtag_info,
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struct pracc_queue_info *ctx, uint32_t *buf, bool check_last);
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int mips32_pracc_read_mem(struct mips_ejtag *ejtag_info,
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uint32_t addr, int size, int count, void *buf);
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int mips32_pracc_write_mem(struct mips_ejtag *ejtag_info,
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uint32_t addr, int size, int count, const void *buf);
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int mips32_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_area *source,
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int write_t, uint32_t addr, int count, uint32_t *buf);
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int mips32_pracc_read_regs(struct mips_ejtag *ejtag_info, uint32_t *regs);
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int mips32_pracc_write_regs(struct mips_ejtag *ejtag_info, uint32_t *regs);
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int mips32_pracc_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_info *ctx,
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uint32_t *param_out, bool check_last);
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/**
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* \b mips32_cp0_read
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*
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* Simulates mfc0 ASM instruction (Move From C0),
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* i.e. implements copro C0 Register read.
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*
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* @param[in] ejtag_info
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* @param[in] val Storage to hold read value
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* @param[in] cp0_reg Number of copro C0 register we want to read
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* @param[in] cp0_sel Select for the given C0 register
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*
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* @return ERROR_OK on Success, ERROR_FAIL otherwise
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*/
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int mips32_cp0_read(struct mips_ejtag *ejtag_info,
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uint32_t *val, uint32_t cp0_reg, uint32_t cp0_sel);
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/**
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* \b mips32_cp0_write
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*
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* Simulates mtc0 ASM instruction (Move To C0),
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* i.e. implements copro C0 Register read.
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*
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* @param[in] ejtag_info
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* @param[in] val Value to be written
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* @param[in] cp0_reg Number of copro C0 register we want to write to
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* @param[in] cp0_sel Select for the given C0 register
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*
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* @return ERROR_OK on Success, ERROR_FAIL otherwise
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*/
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int mips32_cp0_write(struct mips_ejtag *ejtag_info,
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uint32_t val, uint32_t cp0_reg, uint32_t cp0_sel);
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static inline void pracc_swap16_array(struct mips_ejtag *ejtag_info, uint32_t *buf, int count)
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{
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if (ejtag_info->isa && ejtag_info->endianness)
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for (int i = 0; i != count; i++)
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buf[i] = SWAP16(buf[i]);
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}
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#endif /* OPENOCD_TARGET_MIPS32_PRACC_H */
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