46 lines
1.2 KiB
C
46 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/***************************************************************************
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* Copyright (C) 2013 Andes Technology *
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* Hsiangkai Wang <hkwang@andestech.com> *
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***************************************************************************/
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#ifndef OPENOCD_TARGET_NDS32_DISASSEMBLER_H
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#define OPENOCD_TARGET_NDS32_DISASSEMBLER_H
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#include <target/nds32.h>
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enum nds32_instruction_type {
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NDS32_INSN_DATA_PROC = 0,
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NDS32_INSN_LOAD_STORE,
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NDS32_INSN_JUMP_BRANCH,
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NDS32_INSN_RESOURCE_ACCESS,
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NDS32_INSN_MISC,
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};
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struct nds32_instruction {
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enum nds32_instruction_type type;
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char text[128];
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uint32_t opcode;
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uint8_t instruction_size;
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uint32_t access_start;
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uint32_t access_end;
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struct {
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uint8_t opc_6;
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uint8_t rt;
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uint8_t ra;
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uint8_t rb;
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uint8_t rd;
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uint8_t sub_opc;
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int32_t imm;
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} info;
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};
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int nds32_read_opcode(struct nds32 *nds32, uint32_t address, uint32_t *value);
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int nds32_evaluate_opcode(struct nds32 *nds32, uint32_t opcode, uint32_t address,
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struct nds32_instruction *instruction);
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#endif /* OPENOCD_TARGET_NDS32_DISASSEMBLER_H */
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