87 lines
2.6 KiB
C
87 lines
2.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright(c) 2013-2016 Intel Corporation.
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*
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* Adrian Burns (adrian.burns@intel.com)
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* Thomas Faust (thomas.faust@intel.com)
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* Ivan De Cesaris (ivan.de.cesaris@intel.com)
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* Julien Carreno (julien.carreno@intel.com)
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* Jeffrey Maxwell (jeffrey.r.maxwell@intel.com)
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*
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* Contact Information:
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* Intel Corporation
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*/
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/*
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* @file
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* Debugger for Intel Quark SoC X1000
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* Intel Quark X10xx is the first product in the Quark family of SoCs.
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* It is an IA-32 (Pentium x86 ISA) compatible SoC. The core CPU in the
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* X10xx is codenamed Lakemont. Lakemont version 1 (LMT1) is used in X10xx.
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* The CPU TAP (Lakemont TAP) is used for software debug and the CLTAP is
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* used for SoC level operations.
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* Useful docs are here: https://communities.intel.com/community/makers/documentation
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* Intel Quark SoC X1000 OpenOCD/GDB/Eclipse App Note (web search for doc num 330015)
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* Intel Quark SoC X1000 Debug Operations User Guide (web search for doc num 329866)
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* Intel Quark SoC X1000 Datasheet (web search for doc num 329676)
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*
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* This file implements any Quark SoC specific features such as resetbreak (TODO)
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <helper/log.h>
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#include "target.h"
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#include "target_type.h"
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#include "lakemont.h"
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#include "x86_32_common.h"
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static int quark_x10xx_target_create(struct target *t, Jim_Interp *interp)
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{
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struct x86_32_common *x86_32 = calloc(1, sizeof(*x86_32));
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if (!x86_32)
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return ERROR_FAIL;
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x86_32_common_init_arch_info(t, x86_32);
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lakemont_init_arch_info(t, x86_32);
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x86_32->core_type = LMT1;
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return ERROR_OK;
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}
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struct target_type quark_x10xx_target = {
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.name = "quark_x10xx",
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/* Quark X1000 SoC */
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.target_create = quark_x10xx_target_create,
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/* lakemont probemode specific code */
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.arch_state = lakemont_arch_state,
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.assert_reset = lakemont_reset_assert,
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.deassert_reset = lakemont_reset_deassert,
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.halt = lakemont_halt,
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.init_target = lakemont_init_target,
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.poll = lakemont_poll,
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.resume = lakemont_resume,
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.step = lakemont_step,
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/* common x86 code */
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.add_breakpoint = x86_32_common_add_breakpoint,
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.add_watchpoint = x86_32_common_add_watchpoint,
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.commands = x86_32_command_handlers,
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.get_gdb_reg_list = x86_32_get_gdb_reg_list,
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.mmu = x86_32_common_mmu,
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.read_memory = x86_32_common_read_memory,
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.read_phys_memory = x86_32_common_read_phys_mem,
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.remove_breakpoint = x86_32_common_remove_breakpoint,
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.remove_watchpoint = x86_32_common_remove_watchpoint,
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.virt2phys = x86_32_common_virt2phys,
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.write_memory = x86_32_common_write_memory,
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.write_phys_memory = x86_32_common_write_phys_mem,
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};
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