48 lines
1.5 KiB
INI
48 lines
1.5 KiB
INI
# SPDX-License-Identifier: GPL-2.0-or-later
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# Sayma AMC is an FPGA board for the µTCA AMC format
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# The board is open hardware (CERN OHL) and the gateware and software
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# running on it are open source (ARTIQ, LGPLv3+).
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#
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# https://github.com/m-labs/sinara/wiki/Sayma
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#
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# It contains a Xilinx Kintex Ultrascale 040 FPGA (xcku040).
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# There is a SCANSTA112SM JTAG router on the board which is configured to
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# automatically add devices to the JTAG svcan chain when they are added.
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# Sayma AMC is usually combined with Sayma RTM (rear transition module)
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# which features an Artix 7 FPGA.
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adapter driver ftdi
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ftdi device_desc "Quad RS232-HS"
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ftdi vid_pid 0x0403 0x6011
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ftdi channel 0
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# Use this to distinguish multiple boards by topology
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#adapter usb location 5:1
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# sampling on falling edge generally seems to work and accelerates things but
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# is not fully tested
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#ftdi tdo_sample_edge falling
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# EN_USB_JTAG on ADBUS7: out, high
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# USB_nTRST on ADBUS4: out, high, but R46 is DNP
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ftdi layout_init 0x0098 0x008b
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#ftdi layout_signal EN_USB -data 0x0080
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#ftdi layout_signal nTRST -data 0x0010
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reset_config none
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adapter speed 5000
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transport select jtag
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# Add the RTM Artix to the chain. Note that this changes the PLD numbering.
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# Unfortunately openocd TAPs can't be disabled after they have been added and
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# before `init`.
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#source [find cpld/xilinx-xc7.cfg]
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set CHIP XCKU040
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source [find cpld/xilinx-xcu.cfg]
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set XILINX_USER1 0x02
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set XILINX_USER2 0x03
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set JTAGSPI_IR $XILINX_USER1
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source [find cpld/jtagspi.cfg]
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flash bank xcu.spi1 jtagspi 0 0 0 0 xcu.proxy $XILINX_USER2
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