33 lines
1.0 KiB
INI
33 lines
1.0 KiB
INI
# SPDX-License-Identifier: GPL-2.0-or-later
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# Cadence virtual debug interface
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# RISCV Ibex core with Pulpissimo through JTAG
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source [find interface/vdebug.cfg]
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set _CHIPNAME ibex
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set _HARTID 0x20
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set _CPUTAPID 0x249511c3
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# vdebug select transport
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transport select jtag
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# JTAG reset config, frequency and reset delay
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reset_config trst_and_srst
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adapter speed 12500
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adapter srst delay 10
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# BFM hierarchical path and input clk period
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vdebug bfm_path tbench.u_vd_jtag_bfm 40ns
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# DMA Memories to access backdoor (up to 4)
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vdebug mem_path tbench.soc_domain_i.pulp_soc_i.gen_mem_l2_pri\[0\].sram_i.mem_array 0x1c000000 0x8000
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vdebug mem_path tbench.soc_domain_i.pulp_soc_i.gen_mem_l2_pri\[1\].sram_i.mem_array 0x1c008000 0x8000
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vdebug mem_path tbench.soc_domain_i.pulp_soc_i.gen_mem_l2\[0\].sram_i.mem_array 0x1c010000 0x80000
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# need to explicitly define riscv tap, autoprobing does not work for icapture != 0x01
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jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x05 -irmask 0x1f -expected-id $_CPUTAPID
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jtag arp_init-reset
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source [find target/vd_riscv.cfg]
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