73 lines
1.8 KiB
INI
73 lines
1.8 KiB
INI
# SPDX-License-Identifier: GPL-2.0-or-later
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#
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# The ESP32 only supports JTAG.
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transport select jtag
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME esp32
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}
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x120034e5
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}
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if { [info exists ESP32_ONLYCPU] } {
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set _ONLYCPU $ESP32_ONLYCPU
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} else {
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set _ONLYCPU 2
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}
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if { [info exists ESP32_FLASH_VOLTAGE] } {
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set _FLASH_VOLTAGE $ESP32_FLASH_VOLTAGE
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} else {
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set _FLASH_VOLTAGE 3.3
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}
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set _CPU0NAME cpu0
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set _CPU1NAME cpu1
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set _TARGETNAME_0 $_CHIPNAME.$_CPU0NAME
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set _TARGETNAME_1 $_CHIPNAME.$_CPU1NAME
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jtag newtap $_CHIPNAME $_CPU0NAME -irlen 5 -expected-id $_CPUTAPID
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if { $_ONLYCPU != 1 } {
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jtag newtap $_CHIPNAME $_CPU1NAME -irlen 5 -expected-id $_CPUTAPID
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} else {
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jtag newtap $_CHIPNAME $_CPU1NAME -irlen 5 -disable -expected-id $_CPUTAPID
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}
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# PRO-CPU
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target create $_TARGETNAME_0 $_CHIPNAME -endian little -chain-position $_TARGETNAME_0 -coreid 0
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# APP-CPU
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if { $_ONLYCPU != 1 } {
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target create $_TARGETNAME_1 $_CHIPNAME -endian little -chain-position $_TARGETNAME_1 -coreid 1
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target smp $_TARGETNAME_0 $_TARGETNAME_1
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}
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$_TARGETNAME_0 esp32 flashbootstrap $_FLASH_VOLTAGE
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$_TARGETNAME_0 xtensa maskisr on
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$_TARGETNAME_0 xtensa smpbreak BreakIn BreakOut
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$_TARGETNAME_0 configure -event reset-assert-post { soft_reset_halt }
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$_TARGETNAME_0 configure -event gdb-attach {
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$_TARGETNAME_0 xtensa smpbreak BreakIn BreakOut
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# necessary to auto-probe flash bank when GDB is connected
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halt 1000
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}
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if { $_ONLYCPU != 1 } {
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$_TARGETNAME_1 configure -event gdb-attach {
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$_TARGETNAME_1 xtensa smpbreak BreakIn BreakOut
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# necessary to auto-probe flash bank when GDB is connected
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halt 1000
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}
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$_TARGETNAME_1 configure -event reset-assert-post { soft_reset_halt }
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}
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gdb_breakpoint_override hard
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source [find target/xtensa-core-esp32.cfg]
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