64 lines
1.8 KiB
INI
64 lines
1.8 KiB
INI
# SPDX-License-Identifier: GPL-2.0-or-later
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# script for Nuvoton MuMicro Cortex-M0 Series
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# Adapt based on what transport is active.
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source [find target/swj-dp.tcl]
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# Set Chipname
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME NuMicro
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}
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# SWD DP-ID Nuvoton NuMicro Cortex-M0 has SWD Transport only.
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if { [info exists CPUDAPID] } {
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set _CPUDAPID $CPUDAPID
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} else {
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set _CPUDAPID 0x0BB11477
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}
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# Work-area is a space in RAM used for flash programming
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# By default use 2kB
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if { [info exists WORKAREASIZE] } {
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set _WORKAREASIZE $WORKAREASIZE
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} else {
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set _WORKAREASIZE 0x800
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}
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# Debug Adapter Target Settings
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swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUDAPID
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dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
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# flash bank <name> numicro <base> <size(autodetect,set to 0)> 0 0 <target#>
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#set _FLASHNAME $_CHIPNAME.flash
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#flash bank $_FLASHNAME numicro 0 $_FLASHSIZE 0 0 $_TARGETNAME
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# flash size will be probed
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set _FLASHNAME $_CHIPNAME.flash_aprom
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flash bank $_FLASHNAME numicro 0x00000000 0 0 0 $_TARGETNAME
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set _FLASHNAME $_CHIPNAME.flash_data
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flash bank $_FLASHNAME numicro 0x0001F000 0 0 0 $_TARGETNAME
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set _FLASHNAME $_CHIPNAME.flash_ldrom
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flash bank $_FLASHNAME numicro 0x00100000 0 0 0 $_TARGETNAME
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set _FLASHNAME $_CHIPNAME.flash_config
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flash bank $_FLASHNAME numicro 0x00300000 0 0 0 $_TARGETNAME
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# set default SWCLK frequency
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adapter speed 1000
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# set default srst setting "none"
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reset_config none
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# HLA doesn't have cortex_m commands
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if {![using_hla]} {
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# if srst is not fitted use SYSRESETREQ to
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# perform a soft reset
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cortex_m reset_config sysresetreq
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}
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