38 lines
1.0 KiB
INI
38 lines
1.0 KiB
INI
# SPDX-License-Identifier: GPL-2.0-or-later
|
|
# Cadence virtual debug interface
|
|
# Arm v8 64b Cortex A
|
|
|
|
if {![info exists _CORES]} {
|
|
set _CORES 1
|
|
}
|
|
if {![info exists _CHIPNAME]} {
|
|
set _CHIPNAME aarch64
|
|
}
|
|
set _TARGETNAME $_CHIPNAME.cpu
|
|
set _CTINAME $_CHIPNAME.cti
|
|
|
|
set DBGBASE {0x80810000 0x80910000}
|
|
set CTIBASE {0x80820000 0x80920000}
|
|
|
|
dap create $_CHIPNAME.dap -chain-position $_TARGETNAME
|
|
$_CHIPNAME.dap apsel 1
|
|
|
|
for { set _core 0 } { $_core < $_CORES } { incr _core } \
|
|
{
|
|
cti create $_CTINAME.$_core -dap $_CHIPNAME.dap -ap-num 1 -baseaddr [lindex $CTIBASE $_core]
|
|
set _command "target create $_TARGETNAME.$_core aarch64 -dap $_CHIPNAME.dap \
|
|
-dbgbase [lindex $DBGBASE $_core] -cti $_CTINAME.$_core -coreid $_core"
|
|
if { $_core != 0 } {
|
|
# non-boot core examination may fail
|
|
set _command "$_command -defer-examine"
|
|
set _smp_command "$_smp_command $_TARGETNAME.$_core"
|
|
} else {
|
|
set _smp_command "target smp $_TARGETNAME.$_core"
|
|
}
|
|
eval $_command
|
|
}
|
|
eval $_smp_command
|
|
|
|
# default target is core 0
|
|
targets $_TARGETNAME.0
|