169 lines
4.8 KiB
C
169 lines
4.8 KiB
C
/***************************************************************************
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* Copyright (C) 2007, 2008 by Ben Dooks *
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* ben@fluff.org *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc., *
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
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***************************************************************************/
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/*
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* S3C2440 OpenOCD NAND Flash controller support.
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*
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* Many thanks to Simtec Electronics for sponsoring this work.
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include "s3c24xx.h"
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NAND_DEVICE_COMMAND_HANDLER(s3c2440_nand_device_command)
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{
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struct s3c24xx_nand_controller *info;
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CALL_S3C24XX_DEVICE_COMMAND(nand, &info);
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/* fill in the address fields for the core device */
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info->cmd = S3C2440_NFCMD;
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info->addr = S3C2440_NFADDR;
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info->data = S3C2440_NFDATA;
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info->nfstat = S3C2440_NFSTAT;
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return ERROR_OK;
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}
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static int s3c2440_init(struct nand_device *nand)
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{
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struct target *target = nand->target;
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target_write_u32(target, S3C2410_NFCONF,
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S3C2440_NFCONF_TACLS(3) |
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S3C2440_NFCONF_TWRPH0(7) |
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S3C2440_NFCONF_TWRPH1(7));
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target_write_u32(target, S3C2440_NFCONT,
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S3C2440_NFCONT_INITECC | S3C2440_NFCONT_ENABLE);
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return ERROR_OK;
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}
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int s3c2440_nand_ready(struct nand_device *nand, int timeout)
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{
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struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
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struct target *target = nand->target;
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uint8_t status;
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if (target->state != TARGET_HALTED) {
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LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
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return ERROR_NAND_OPERATION_FAILED;
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}
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do {
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target_read_u8(target, s3c24xx_info->nfstat, &status);
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if (status & S3C2440_NFSTAT_READY)
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return 1;
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alive_sleep(1);
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} while (timeout-- > 0);
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return 0;
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}
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/* use the fact we can read/write 4 bytes in one go via a single 32bit op */
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int s3c2440_read_block_data(struct nand_device *nand, uint8_t *data, int data_size)
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{
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struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
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struct target *target = nand->target;
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uint32_t nfdata = s3c24xx_info->data;
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uint32_t tmp;
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LOG_INFO("%s: reading data: %p, %p, %d", __func__, nand, data, data_size);
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if (target->state != TARGET_HALTED) {
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LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
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return ERROR_NAND_OPERATION_FAILED;
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}
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while (data_size >= 4) {
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target_read_u32(target, nfdata, &tmp);
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data[0] = tmp;
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data[1] = tmp >> 8;
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data[2] = tmp >> 16;
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data[3] = tmp >> 24;
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data_size -= 4;
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data += 4;
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}
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while (data_size > 0) {
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target_read_u8(target, nfdata, data);
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data_size -= 1;
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data += 1;
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}
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return ERROR_OK;
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}
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int s3c2440_write_block_data(struct nand_device *nand, uint8_t *data, int data_size)
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{
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struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
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struct target *target = nand->target;
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uint32_t nfdata = s3c24xx_info->data;
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uint32_t tmp;
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if (target->state != TARGET_HALTED) {
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LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
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return ERROR_NAND_OPERATION_FAILED;
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}
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while (data_size >= 4) {
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tmp = le_to_h_u32(data);
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target_write_u32(target, nfdata, tmp);
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data_size -= 4;
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data += 4;
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}
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while (data_size > 0) {
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target_write_u8(target, nfdata, *data);
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data_size -= 1;
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data += 1;
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}
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return ERROR_OK;
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}
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struct nand_flash_controller s3c2440_nand_controller = {
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.name = "s3c2440",
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.nand_device_command = &s3c2440_nand_device_command,
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.init = &s3c2440_init,
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.reset = &s3c24xx_reset,
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.command = &s3c24xx_command,
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.address = &s3c24xx_address,
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.write_data = &s3c24xx_write_data,
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.read_data = &s3c24xx_read_data,
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.write_page = s3c24xx_write_page,
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.read_page = s3c24xx_read_page,
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.write_block_data = &s3c2440_write_block_data,
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.read_block_data = &s3c2440_read_block_data,
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.nand_ready = &s3c2440_nand_ready,
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};
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