486 lines
14 KiB
C
486 lines
14 KiB
C
/***************************************************************************
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* Copyright (C) 2009 by Simon Qian *
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* SimonQian@SimonQian.com *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc., *
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
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***************************************************************************/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include "imp.h"
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#include <target/avrt.h>
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/* AVR_JTAG_Instructions */
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#define AVR_JTAG_INS_LEN 4
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/* Public Instructions: */
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#define AVR_JTAG_INS_EXTEST 0x00
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#define AVR_JTAG_INS_IDCODE 0x01
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#define AVR_JTAG_INS_SAMPLE_PRELOAD 0x02
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#define AVR_JTAG_INS_BYPASS 0x0F
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/* AVR Specified Public Instructions: */
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#define AVR_JTAG_INS_AVR_RESET 0x0C
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#define AVR_JTAG_INS_PROG_ENABLE 0x04
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#define AVR_JTAG_INS_PROG_COMMANDS 0x05
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#define AVR_JTAG_INS_PROG_PAGELOAD 0x06
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#define AVR_JTAG_INS_PROG_PAGEREAD 0x07
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/* Data Registers: */
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#define AVR_JTAG_REG_Bypass_Len 1
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#define AVR_JTAG_REG_DeviceID_Len 32
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#define AVR_JTAG_REG_Reset_Len 1
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#define AVR_JTAG_REG_JTAGID_Len 32
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#define AVR_JTAG_REG_ProgrammingEnable_Len 16
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#define AVR_JTAG_REG_ProgrammingCommand_Len 15
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#define AVR_JTAG_REG_FlashDataByte_Len 16
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struct avrf_type {
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char name[15];
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uint16_t chip_id;
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int flash_page_size;
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int flash_page_num;
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int eeprom_page_size;
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int eeprom_page_num;
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};
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struct avrf_flash_bank {
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int ppage_size;
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int probed;
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};
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static struct avrf_type avft_chips_info[] = {
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/* name, chip_id, flash_page_size, flash_page_num,
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* eeprom_page_size, eeprom_page_num
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*/
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{"atmega128", 0x9702, 256, 512, 8, 512},
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{"at90can128", 0x9781, 256, 512, 8, 512},
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};
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/* avr program functions */
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static int avr_jtag_reset(struct avr_common *avr, uint32_t reset)
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{
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avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_AVR_RESET);
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avr_jtag_senddat(avr->jtag_info.tap, NULL, reset, AVR_JTAG_REG_Reset_Len);
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return ERROR_OK;
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}
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static int avr_jtag_read_jtagid(struct avr_common *avr, uint32_t *id)
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{
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avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_IDCODE);
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avr_jtag_senddat(avr->jtag_info.tap, id, 0, AVR_JTAG_REG_JTAGID_Len);
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return ERROR_OK;
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}
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static int avr_jtagprg_enterprogmode(struct avr_common *avr)
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{
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avr_jtag_reset(avr, 1);
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avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
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avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xA370, AVR_JTAG_REG_ProgrammingEnable_Len);
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return ERROR_OK;
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}
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static int avr_jtagprg_leaveprogmode(struct avr_common *avr)
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{
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avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
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avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2300, AVR_JTAG_REG_ProgrammingCommand_Len);
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avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3300, AVR_JTAG_REG_ProgrammingCommand_Len);
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avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
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avr_jtag_senddat(avr->jtag_info.tap, NULL, 0, AVR_JTAG_REG_ProgrammingEnable_Len);
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avr_jtag_reset(avr, 0);
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return ERROR_OK;
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}
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static int avr_jtagprg_chiperase(struct avr_common *avr)
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{
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uint32_t poll_value;
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avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
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avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2380, AVR_JTAG_REG_ProgrammingCommand_Len);
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avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3180, AVR_JTAG_REG_ProgrammingCommand_Len);
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avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
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avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
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do {
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poll_value = 0;
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avr_jtag_senddat(avr->jtag_info.tap,
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&poll_value,
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0x3380,
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AVR_JTAG_REG_ProgrammingCommand_Len);
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if (ERROR_OK != mcu_execute_queue())
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return ERROR_FAIL;
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LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
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} while (!(poll_value & 0x0200));
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return ERROR_OK;
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}
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static int avr_jtagprg_writeflashpage(struct avr_common *avr,
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uint8_t *page_buf,
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uint32_t buf_size,
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uint32_t addr,
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uint32_t page_size)
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{
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uint32_t i, poll_value;
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avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
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avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_ProgrammingCommand_Len);
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/* load addr high byte */
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avr_jtag_senddat(avr->jtag_info.tap,
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NULL,
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0x0700 | ((addr >> 9) & 0xFF),
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AVR_JTAG_REG_ProgrammingCommand_Len);
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/* load addr low byte */
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avr_jtag_senddat(avr->jtag_info.tap,
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NULL,
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0x0300 | ((addr >> 1) & 0xFF),
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AVR_JTAG_REG_ProgrammingCommand_Len);
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avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_PAGELOAD);
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for (i = 0; i < page_size; i++) {
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if (i < buf_size)
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avr_jtag_senddat(avr->jtag_info.tap, NULL, page_buf[i], 8);
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else
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avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xFF, 8);
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}
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avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
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avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
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avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3500, AVR_JTAG_REG_ProgrammingCommand_Len);
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avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
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avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
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do {
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poll_value = 0;
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avr_jtag_senddat(avr->jtag_info.tap,
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&poll_value,
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0x3700,
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AVR_JTAG_REG_ProgrammingCommand_Len);
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if (ERROR_OK != mcu_execute_queue())
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return ERROR_FAIL;
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LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
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} while (!(poll_value & 0x0200));
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return ERROR_OK;
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}
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FLASH_BANK_COMMAND_HANDLER(avrf_flash_bank_command)
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{
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struct avrf_flash_bank *avrf_info;
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if (CMD_ARGC < 6)
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return ERROR_COMMAND_SYNTAX_ERROR;
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avrf_info = malloc(sizeof(struct avrf_flash_bank));
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bank->driver_priv = avrf_info;
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avrf_info->probed = 0;
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return ERROR_OK;
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}
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static int avrf_erase(struct flash_bank *bank, int first, int last)
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{
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struct target *target = bank->target;
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struct avr_common *avr = target->arch_info;
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int status;
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LOG_DEBUG("%s", __func__);
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if (target->state != TARGET_HALTED) {
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LOG_ERROR("Target not halted");
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return ERROR_TARGET_NOT_HALTED;
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}
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status = avr_jtagprg_enterprogmode(avr);
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if (status != ERROR_OK)
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return status;
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status = avr_jtagprg_chiperase(avr);
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if (status != ERROR_OK)
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return status;
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return avr_jtagprg_leaveprogmode(avr);
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}
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static int avrf_protect(struct flash_bank *bank, int set, int first, int last)
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{
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LOG_INFO("%s", __func__);
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return ERROR_OK;
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}
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static int avrf_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
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{
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struct target *target = bank->target;
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struct avr_common *avr = target->arch_info;
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uint32_t cur_size, cur_buffer_size, page_size;
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if (bank->target->state != TARGET_HALTED) {
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LOG_ERROR("Target not halted");
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return ERROR_TARGET_NOT_HALTED;
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}
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page_size = bank->sectors[0].size;
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if ((offset % page_size) != 0) {
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LOG_WARNING("offset 0x%" PRIx32 " breaks required %" PRIu32 "-byte alignment",
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offset,
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page_size);
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return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
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}
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LOG_DEBUG("offset is 0x%08" PRIx32 "", offset);
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LOG_DEBUG("count is %" PRId32 "", count);
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if (ERROR_OK != avr_jtagprg_enterprogmode(avr))
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return ERROR_FAIL;
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cur_size = 0;
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while (count > 0) {
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if (count > page_size)
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cur_buffer_size = page_size;
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else
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cur_buffer_size = count;
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avr_jtagprg_writeflashpage(avr,
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buffer + cur_size,
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cur_buffer_size,
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offset + cur_size,
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page_size);
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count -= cur_buffer_size;
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cur_size += cur_buffer_size;
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keep_alive();
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}
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return avr_jtagprg_leaveprogmode(avr);
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}
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#define EXTRACT_MFG(X) (((X) & 0xffe) >> 1)
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#define EXTRACT_PART(X) (((X) & 0xffff000) >> 12)
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#define EXTRACT_VER(X) (((X) & 0xf0000000) >> 28)
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static int avrf_probe(struct flash_bank *bank)
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{
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struct target *target = bank->target;
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struct avrf_flash_bank *avrf_info = bank->driver_priv;
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struct avr_common *avr = target->arch_info;
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struct avrf_type *avr_info = NULL;
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int i;
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uint32_t device_id;
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if (bank->target->state != TARGET_HALTED) {
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LOG_ERROR("Target not halted");
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return ERROR_TARGET_NOT_HALTED;
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}
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avrf_info->probed = 0;
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avr_jtag_read_jtagid(avr, &device_id);
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if (ERROR_OK != mcu_execute_queue())
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return ERROR_FAIL;
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LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
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if (EXTRACT_MFG(device_id) != 0x1F)
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LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
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EXTRACT_MFG(device_id),
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0x1F);
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for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++) {
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if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) {
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avr_info = &avft_chips_info[i];
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LOG_INFO("target device is %s", avr_info->name);
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break;
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}
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}
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if (avr_info != NULL) {
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if (bank->sectors) {
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free(bank->sectors);
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bank->sectors = NULL;
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}
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/* chip found */
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bank->base = 0x00000000;
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bank->size = (avr_info->flash_page_size * avr_info->flash_page_num);
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bank->num_sectors = avr_info->flash_page_num;
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bank->sectors = malloc(sizeof(struct flash_sector) * avr_info->flash_page_num);
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for (i = 0; i < avr_info->flash_page_num; i++) {
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bank->sectors[i].offset = i * avr_info->flash_page_size;
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bank->sectors[i].size = avr_info->flash_page_size;
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bank->sectors[i].is_erased = -1;
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bank->sectors[i].is_protected = 1;
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}
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avrf_info->probed = 1;
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return ERROR_OK;
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} else {
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/* chip not supported */
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LOG_ERROR("0x%" PRIx32 " is not support for avr", EXTRACT_PART(device_id));
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avrf_info->probed = 1;
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return ERROR_FAIL;
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}
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}
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static int avrf_auto_probe(struct flash_bank *bank)
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{
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struct avrf_flash_bank *avrf_info = bank->driver_priv;
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if (avrf_info->probed)
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return ERROR_OK;
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return avrf_probe(bank);
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}
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static int avrf_protect_check(struct flash_bank *bank)
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{
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LOG_INFO("%s", __func__);
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return ERROR_OK;
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}
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static int avrf_info(struct flash_bank *bank, char *buf, int buf_size)
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{
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struct target *target = bank->target;
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struct avr_common *avr = target->arch_info;
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struct avrf_type *avr_info = NULL;
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int i;
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uint32_t device_id;
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if (bank->target->state != TARGET_HALTED) {
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LOG_ERROR("Target not halted");
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return ERROR_TARGET_NOT_HALTED;
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}
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avr_jtag_read_jtagid(avr, &device_id);
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if (ERROR_OK != mcu_execute_queue())
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return ERROR_FAIL;
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LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
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if (EXTRACT_MFG(device_id) != 0x1F)
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LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
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EXTRACT_MFG(device_id),
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0x1F);
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for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++) {
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if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) {
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avr_info = &avft_chips_info[i];
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LOG_INFO("target device is %s", avr_info->name);
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break;
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}
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}
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if (avr_info != NULL) {
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/* chip found */
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snprintf(buf, buf_size, "%s - Rev: 0x%" PRIx32 "", avr_info->name,
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EXTRACT_VER(device_id));
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return ERROR_OK;
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} else {
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/* chip not supported */
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snprintf(buf, buf_size, "Cannot identify target as a avr\n");
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return ERROR_FLASH_OPERATION_FAILED;
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}
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}
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static int avrf_mass_erase(struct flash_bank *bank)
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{
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struct target *target = bank->target;
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struct avr_common *avr = target->arch_info;
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if (target->state != TARGET_HALTED) {
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LOG_ERROR("Target not halted");
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return ERROR_TARGET_NOT_HALTED;
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}
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if ((ERROR_OK != avr_jtagprg_enterprogmode(avr))
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|| (ERROR_OK != avr_jtagprg_chiperase(avr))
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|| (ERROR_OK != avr_jtagprg_leaveprogmode(avr)))
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return ERROR_FAIL;
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return ERROR_OK;
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}
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COMMAND_HANDLER(avrf_handle_mass_erase_command)
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{
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int i;
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if (CMD_ARGC < 1)
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return ERROR_COMMAND_SYNTAX_ERROR;
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struct flash_bank *bank;
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int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
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if (ERROR_OK != retval)
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return retval;
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if (avrf_mass_erase(bank) == ERROR_OK) {
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/* set all sectors as erased */
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for (i = 0; i < bank->num_sectors; i++)
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bank->sectors[i].is_erased = 1;
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command_print(CMD_CTX, "avr mass erase complete");
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} else
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command_print(CMD_CTX, "avr mass erase failed");
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LOG_DEBUG("%s", __func__);
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return ERROR_OK;
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}
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static const struct command_registration avrf_exec_command_handlers[] = {
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{
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.name = "mass_erase",
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.usage = "<bank>",
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.handler = avrf_handle_mass_erase_command,
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.mode = COMMAND_EXEC,
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.help = "erase entire device",
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},
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COMMAND_REGISTRATION_DONE
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};
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static const struct command_registration avrf_command_handlers[] = {
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{
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.name = "avrf",
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.mode = COMMAND_ANY,
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.help = "AVR flash command group",
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.usage = "",
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.chain = avrf_exec_command_handlers,
|
|
},
|
|
COMMAND_REGISTRATION_DONE
|
|
};
|
|
|
|
struct flash_driver avr_flash = {
|
|
.name = "avr",
|
|
.commands = avrf_command_handlers,
|
|
.flash_bank_command = avrf_flash_bank_command,
|
|
.erase = avrf_erase,
|
|
.protect = avrf_protect,
|
|
.write = avrf_write,
|
|
.read = default_flash_read,
|
|
.probe = avrf_probe,
|
|
.auto_probe = avrf_auto_probe,
|
|
.erase_check = default_flash_blank_check,
|
|
.protect_check = avrf_protect_check,
|
|
.info = avrf_info,
|
|
};
|