08ee7bb982
There are more than 1000 NULL comparisons to be aligned to the coding style. For recurrent NULL comparison it's preferable using trivial scripts in order to minimize the review effort. Patch generated automatically with the command: sed -i PATTERN $(find src/ -type f) where PATTERN is in the list: 's/(\([a-z][a-z0-9_]*\) == NULL)/(!\1)/g' 's/(\([a-z][a-z0-9_]*->[a-z][a-z0-9_]*\) == NULL)/(!\1)/g' 's/(\([a-z][a-z0-9_]*\.[a-z][a-z0-9_]*\) == NULL)/(!\1)/g' 's/(\([a-z][a-z0-9_]*\) != NULL)/(\1)/g' 's/(\([a-z][a-z0-9_]*->[a-z][a-z0-9_]*\) != NULL)/(\1)/g' 's/(\([a-z][a-z0-9_]*\.[a-z][a-z0-9_]*\) != NULL)/(\1)/g' 's/(NULL == \([a-z][a-z0-9_]*\))/(!\1)/g' 's/(NULL == \([a-z][a-z0-9_]*->[a-z][a-z0-9_]*\))/(!\1)/g' 's/(NULL == \([a-z][a-z0-9_]*\.[a-z][a-z0-9_]*\))/(!\1)/g' 's/(NULL != \([a-z][a-z0-9_]*\))/(\1)/g' 's/(NULL != \([a-z][a-z0-9_]*->[a-z][a-z0-9_]*\))/(\1)/g' 's/(NULL != \([a-z][a-z0-9_]*\.[a-z][a-z0-9_]*\))/(\1)/g' Change-Id: Ida103e325d6d0600fb69c0b7a1557ee969db4417 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6350 Tested-by: jenkins
680 lines
18 KiB
C
680 lines
18 KiB
C
/***************************************************************************
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* Copyright (C) 2011 by Mathias Kuester *
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* Mathias Kuester <kesmtp@freenet.de> *
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* *
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* Copyright (C) 2011 by Spencer Oliver *
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* spen@spen-soft.co.uk *
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* *
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* revised: 4/25/13 by brent@mbari.org [DCC target request support] *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program. If not, see <http://www.gnu.org/licenses/>. *
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***************************************************************************/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include "jtag/interface.h"
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#include "jtag/jtag.h"
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#include "jtag/hla/hla_transport.h"
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#include "jtag/hla/hla_interface.h"
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#include "jtag/hla/hla_layout.h"
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#include "register.h"
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#include "algorithm.h"
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#include "target.h"
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#include "breakpoints.h"
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#include "target_type.h"
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#include "armv7m.h"
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#include "cortex_m.h"
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#include "arm_semihosting.h"
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#include "target_request.h"
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#include <rtt/rtt.h>
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#define SAVED_DCRDR dbgbase /* FIXME: using target->dbgbase to preserve DCRDR */
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#define ARMV7M_SCS_DCRSR DCB_DCRSR
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#define ARMV7M_SCS_DCRDR DCB_DCRDR
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static inline struct hl_interface_s *target_to_adapter(struct target *target)
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{
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return target->tap->priv;
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}
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static int adapter_load_core_reg_u32(struct target *target,
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uint32_t regsel, uint32_t *value)
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{
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struct hl_interface_s *adapter = target_to_adapter(target);
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return adapter->layout->api->read_reg(adapter->handle, regsel, value);
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}
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static int adapter_store_core_reg_u32(struct target *target,
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uint32_t regsel, uint32_t value)
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{
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struct hl_interface_s *adapter = target_to_adapter(target);
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return adapter->layout->api->write_reg(adapter->handle, regsel, value);
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}
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static int adapter_examine_debug_reason(struct target *target)
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{
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if ((target->debug_reason != DBG_REASON_DBGRQ)
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&& (target->debug_reason != DBG_REASON_SINGLESTEP)) {
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target->debug_reason = DBG_REASON_BREAKPOINT;
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}
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return ERROR_OK;
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}
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static int hl_dcc_read(struct hl_interface_s *hl_if, uint8_t *value, uint8_t *ctrl)
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{
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uint16_t dcrdr;
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int retval = hl_if->layout->api->read_mem(hl_if->handle,
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DCB_DCRDR, 1, sizeof(dcrdr), (uint8_t *)&dcrdr);
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if (retval == ERROR_OK) {
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*ctrl = (uint8_t)dcrdr;
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*value = (uint8_t)(dcrdr >> 8);
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LOG_DEBUG("data 0x%x ctrl 0x%x", *value, *ctrl);
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if (dcrdr & 1) {
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/* write ack back to software dcc register
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* to signify we have read data */
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/* atomically clear just the byte containing the busy bit */
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static const uint8_t zero;
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retval = hl_if->layout->api->write_mem(hl_if->handle, DCB_DCRDR, 1, 1, &zero);
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}
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}
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return retval;
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}
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static int hl_target_request_data(struct target *target,
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uint32_t size, uint8_t *buffer)
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{
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struct hl_interface_s *hl_if = target_to_adapter(target);
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uint8_t data;
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uint8_t ctrl;
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uint32_t i;
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for (i = 0; i < (size * 4); i++) {
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int err = hl_dcc_read(hl_if, &data, &ctrl);
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if (err != ERROR_OK)
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return err;
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buffer[i] = data;
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}
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return ERROR_OK;
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}
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static int hl_handle_target_request(void *priv)
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{
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struct target *target = priv;
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int err;
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if (!target_was_examined(target))
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return ERROR_OK;
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struct hl_interface_s *hl_if = target_to_adapter(target);
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if (!target->dbg_msg_enabled)
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return ERROR_OK;
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if (target->state == TARGET_RUNNING) {
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uint8_t data;
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uint8_t ctrl;
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err = hl_dcc_read(hl_if, &data, &ctrl);
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if (err != ERROR_OK)
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return err;
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/* check if we have data */
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if (ctrl & (1 << 0)) {
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uint32_t request;
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/* we assume target is quick enough */
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request = data;
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err = hl_dcc_read(hl_if, &data, &ctrl);
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if (err != ERROR_OK)
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return err;
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request |= (data << 8);
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err = hl_dcc_read(hl_if, &data, &ctrl);
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if (err != ERROR_OK)
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return err;
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request |= (data << 16);
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err = hl_dcc_read(hl_if, &data, &ctrl);
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if (err != ERROR_OK)
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return err;
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request |= (data << 24);
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target_request(target, request);
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}
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}
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return ERROR_OK;
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}
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static int adapter_init_arch_info(struct target *target,
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struct cortex_m_common *cortex_m,
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struct jtag_tap *tap)
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{
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struct armv7m_common *armv7m;
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LOG_DEBUG("%s", __func__);
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armv7m = &cortex_m->armv7m;
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armv7m_init_arch_info(target, armv7m);
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armv7m->load_core_reg_u32 = adapter_load_core_reg_u32;
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armv7m->store_core_reg_u32 = adapter_store_core_reg_u32;
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armv7m->examine_debug_reason = adapter_examine_debug_reason;
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armv7m->is_hla_target = true;
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target_register_timer_callback(hl_handle_target_request, 1,
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TARGET_TIMER_TYPE_PERIODIC, target);
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return ERROR_OK;
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}
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static int adapter_init_target(struct command_context *cmd_ctx,
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struct target *target)
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{
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LOG_DEBUG("%s", __func__);
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armv7m_build_reg_cache(target);
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arm_semihosting_init(target);
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return ERROR_OK;
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}
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static int adapter_target_create(struct target *target,
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Jim_Interp *interp)
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{
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LOG_DEBUG("%s", __func__);
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struct adiv5_private_config *pc = target->private_config;
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if (pc != NULL && pc->ap_num > 0) {
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LOG_ERROR("hla_target: invalid parameter -ap-num (> 0)");
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return ERROR_COMMAND_SYNTAX_ERROR;
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}
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struct cortex_m_common *cortex_m = calloc(1, sizeof(struct cortex_m_common));
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if (!cortex_m) {
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LOG_ERROR("No memory creating target");
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return ERROR_FAIL;
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}
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adapter_init_arch_info(target, cortex_m, target->tap);
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return ERROR_OK;
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}
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static int adapter_load_context(struct target *target)
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{
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struct armv7m_common *armv7m = target_to_armv7m(target);
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int num_regs = armv7m->arm.core_cache->num_regs;
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for (int i = 0; i < num_regs; i++) {
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struct reg *r = &armv7m->arm.core_cache->reg_list[i];
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if (r->exist && !r->valid)
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armv7m->arm.read_core_reg(target, r, i, ARM_MODE_ANY);
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}
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return ERROR_OK;
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}
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static int adapter_debug_entry(struct target *target)
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{
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struct hl_interface_s *adapter = target_to_adapter(target);
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struct armv7m_common *armv7m = target_to_armv7m(target);
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struct arm *arm = &armv7m->arm;
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struct reg *r;
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uint32_t xPSR;
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int retval;
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/* preserve the DCRDR across halts */
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retval = target_read_u32(target, DCB_DCRDR, &target->SAVED_DCRDR);
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if (retval != ERROR_OK)
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return retval;
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retval = armv7m->examine_debug_reason(target);
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if (retval != ERROR_OK)
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return retval;
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adapter_load_context(target);
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/* make sure we clear the vector catch bit */
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adapter->layout->api->write_debug_reg(adapter->handle, DCB_DEMCR, TRCENA);
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r = arm->cpsr;
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xPSR = buf_get_u32(r->value, 0, 32);
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/* Are we in an exception handler */
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if (xPSR & 0x1FF) {
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armv7m->exception_number = (xPSR & 0x1FF);
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arm->core_mode = ARM_MODE_HANDLER;
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arm->map = armv7m_msp_reg_map;
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} else {
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unsigned control = buf_get_u32(arm->core_cache
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->reg_list[ARMV7M_CONTROL].value, 0, 3);
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/* is this thread privileged? */
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arm->core_mode = control & 1
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? ARM_MODE_USER_THREAD
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: ARM_MODE_THREAD;
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/* which stack is it using? */
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if (control & 2)
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arm->map = armv7m_psp_reg_map;
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else
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arm->map = armv7m_msp_reg_map;
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armv7m->exception_number = 0;
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}
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LOG_DEBUG("entered debug state in core mode: %s at PC 0x%08" PRIx32 ", target->state: %s",
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arm_mode_name(arm->core_mode),
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buf_get_u32(arm->pc->value, 0, 32),
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target_state_name(target));
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return retval;
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}
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static int adapter_poll(struct target *target)
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{
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enum target_state state;
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struct hl_interface_s *adapter = target_to_adapter(target);
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struct armv7m_common *armv7m = target_to_armv7m(target);
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enum target_state prev_target_state = target->state;
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state = adapter->layout->api->state(adapter->handle);
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if (state == TARGET_UNKNOWN) {
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LOG_ERROR("jtag status contains invalid mode value - communication failure");
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return ERROR_TARGET_FAILURE;
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}
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if (prev_target_state == state)
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return ERROR_OK;
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if (prev_target_state == TARGET_DEBUG_RUNNING && state == TARGET_RUNNING)
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return ERROR_OK;
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target->state = state;
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if (state == TARGET_HALTED) {
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int retval = adapter_debug_entry(target);
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if (retval != ERROR_OK)
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return retval;
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if (prev_target_state == TARGET_DEBUG_RUNNING) {
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target_call_event_callbacks(target, TARGET_EVENT_DEBUG_HALTED);
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} else {
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if (arm_semihosting(target, &retval) != 0)
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return retval;
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target_call_event_callbacks(target, TARGET_EVENT_HALTED);
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}
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LOG_DEBUG("halted: PC: 0x%08" PRIx32, buf_get_u32(armv7m->arm.pc->value, 0, 32));
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}
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return ERROR_OK;
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}
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static int hl_assert_reset(struct target *target)
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{
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int res = ERROR_OK;
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struct hl_interface_s *adapter = target_to_adapter(target);
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struct armv7m_common *armv7m = target_to_armv7m(target);
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bool use_srst_fallback = true;
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LOG_DEBUG("%s", __func__);
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enum reset_types jtag_reset_config = jtag_get_reset_config();
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bool srst_asserted = false;
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if ((jtag_reset_config & RESET_HAS_SRST) &&
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(jtag_reset_config & RESET_SRST_NO_GATING)) {
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res = adapter_assert_reset();
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srst_asserted = true;
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}
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adapter->layout->api->write_debug_reg(adapter->handle, DCB_DHCSR, DBGKEY|C_DEBUGEN);
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/* only set vector catch if halt is requested */
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if (target->reset_halt)
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adapter->layout->api->write_debug_reg(adapter->handle, DCB_DEMCR, TRCENA|VC_CORERESET);
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else
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adapter->layout->api->write_debug_reg(adapter->handle, DCB_DEMCR, TRCENA);
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if (jtag_reset_config & RESET_HAS_SRST) {
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if (!srst_asserted) {
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res = adapter_assert_reset();
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}
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if (res == ERROR_COMMAND_NOTFOUND)
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LOG_ERROR("Hardware srst not supported, falling back to software reset");
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else if (res == ERROR_OK) {
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/* hardware srst supported */
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use_srst_fallback = false;
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}
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}
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if (use_srst_fallback) {
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/* stlink v1 api does not support hardware srst, so we use a software reset fallback */
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adapter->layout->api->write_debug_reg(adapter->handle, NVIC_AIRCR, AIRCR_VECTKEY | AIRCR_SYSRESETREQ);
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}
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res = adapter->layout->api->reset(adapter->handle);
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if (res != ERROR_OK)
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return res;
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/* registers are now invalid */
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register_cache_invalidate(armv7m->arm.core_cache);
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if (target->reset_halt) {
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target->state = TARGET_RESET;
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target->debug_reason = DBG_REASON_DBGRQ;
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} else {
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target->state = TARGET_HALTED;
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}
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return ERROR_OK;
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}
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static int hl_deassert_reset(struct target *target)
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{
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enum reset_types jtag_reset_config = jtag_get_reset_config();
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LOG_DEBUG("%s", __func__);
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if (jtag_reset_config & RESET_HAS_SRST)
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adapter_deassert_reset();
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target->SAVED_DCRDR = 0; /* clear both DCC busy bits on initial resume */
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return target->reset_halt ? ERROR_OK : target_resume(target, 1, 0, 0, 0);
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}
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static int adapter_halt(struct target *target)
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{
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int res;
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struct hl_interface_s *adapter = target_to_adapter(target);
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LOG_DEBUG("%s", __func__);
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if (target->state == TARGET_HALTED) {
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LOG_DEBUG("target was already halted");
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return ERROR_OK;
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}
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if (target->state == TARGET_UNKNOWN)
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LOG_WARNING("target was in unknown state when halt was requested");
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res = adapter->layout->api->halt(adapter->handle);
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if (res != ERROR_OK)
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return res;
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target->debug_reason = DBG_REASON_DBGRQ;
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return ERROR_OK;
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}
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static int adapter_resume(struct target *target, int current,
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target_addr_t address, int handle_breakpoints,
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int debug_execution)
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{
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int res;
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struct hl_interface_s *adapter = target_to_adapter(target);
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struct armv7m_common *armv7m = target_to_armv7m(target);
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uint32_t resume_pc;
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struct breakpoint *breakpoint = NULL;
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struct reg *pc;
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LOG_DEBUG("%s %d " TARGET_ADDR_FMT " %d %d", __func__, current,
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address, handle_breakpoints, debug_execution);
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if (target->state != TARGET_HALTED) {
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LOG_WARNING("target not halted");
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return ERROR_TARGET_NOT_HALTED;
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}
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if (!debug_execution) {
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target_free_all_working_areas(target);
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cortex_m_enable_breakpoints(target);
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cortex_m_enable_watchpoints(target);
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}
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pc = armv7m->arm.pc;
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if (!current) {
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buf_set_u32(pc->value, 0, 32, address);
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pc->dirty = true;
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pc->valid = true;
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}
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if (!breakpoint_find(target, buf_get_u32(pc->value, 0, 32))
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&& !debug_execution) {
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armv7m_maybe_skip_bkpt_inst(target, NULL);
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}
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resume_pc = buf_get_u32(pc->value, 0, 32);
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/* write any user vector flags */
|
|
res = target_write_u32(target, DCB_DEMCR, TRCENA | armv7m->demcr);
|
|
if (res != ERROR_OK)
|
|
return res;
|
|
|
|
armv7m_restore_context(target);
|
|
|
|
/* restore SAVED_DCRDR */
|
|
res = target_write_u32(target, DCB_DCRDR, target->SAVED_DCRDR);
|
|
if (res != ERROR_OK)
|
|
return res;
|
|
|
|
/* registers are now invalid */
|
|
register_cache_invalidate(armv7m->arm.core_cache);
|
|
|
|
/* the front-end may request us not to handle breakpoints */
|
|
if (handle_breakpoints) {
|
|
/* Single step past breakpoint at current address */
|
|
breakpoint = breakpoint_find(target, resume_pc);
|
|
if (breakpoint) {
|
|
LOG_DEBUG("unset breakpoint at " TARGET_ADDR_FMT " (ID: %" PRIu32 ")",
|
|
breakpoint->address,
|
|
breakpoint->unique_id);
|
|
cortex_m_unset_breakpoint(target, breakpoint);
|
|
|
|
res = adapter->layout->api->step(adapter->handle);
|
|
|
|
if (res != ERROR_OK)
|
|
return res;
|
|
|
|
cortex_m_set_breakpoint(target, breakpoint);
|
|
}
|
|
}
|
|
|
|
res = adapter->layout->api->run(adapter->handle);
|
|
|
|
if (res != ERROR_OK)
|
|
return res;
|
|
|
|
target->debug_reason = DBG_REASON_NOTHALTED;
|
|
|
|
if (!debug_execution) {
|
|
target->state = TARGET_RUNNING;
|
|
target_call_event_callbacks(target, TARGET_EVENT_RESUMED);
|
|
} else {
|
|
target->state = TARGET_DEBUG_RUNNING;
|
|
target_call_event_callbacks(target, TARGET_EVENT_DEBUG_RESUMED);
|
|
}
|
|
|
|
return ERROR_OK;
|
|
}
|
|
|
|
static int adapter_step(struct target *target, int current,
|
|
target_addr_t address, int handle_breakpoints)
|
|
{
|
|
int res;
|
|
struct hl_interface_s *adapter = target_to_adapter(target);
|
|
struct armv7m_common *armv7m = target_to_armv7m(target);
|
|
struct breakpoint *breakpoint = NULL;
|
|
struct reg *pc = armv7m->arm.pc;
|
|
bool bkpt_inst_found = false;
|
|
|
|
LOG_DEBUG("%s", __func__);
|
|
|
|
if (target->state != TARGET_HALTED) {
|
|
LOG_WARNING("target not halted");
|
|
return ERROR_TARGET_NOT_HALTED;
|
|
}
|
|
|
|
if (!current) {
|
|
buf_set_u32(pc->value, 0, 32, address);
|
|
pc->dirty = true;
|
|
pc->valid = true;
|
|
}
|
|
|
|
uint32_t pc_value = buf_get_u32(pc->value, 0, 32);
|
|
|
|
/* the front-end may request us not to handle breakpoints */
|
|
if (handle_breakpoints) {
|
|
breakpoint = breakpoint_find(target, pc_value);
|
|
if (breakpoint)
|
|
cortex_m_unset_breakpoint(target, breakpoint);
|
|
}
|
|
|
|
armv7m_maybe_skip_bkpt_inst(target, &bkpt_inst_found);
|
|
|
|
target->debug_reason = DBG_REASON_SINGLESTEP;
|
|
|
|
armv7m_restore_context(target);
|
|
|
|
/* restore SAVED_DCRDR */
|
|
res = target_write_u32(target, DCB_DCRDR, target->SAVED_DCRDR);
|
|
if (res != ERROR_OK)
|
|
return res;
|
|
|
|
target_call_event_callbacks(target, TARGET_EVENT_RESUMED);
|
|
|
|
res = adapter->layout->api->step(adapter->handle);
|
|
|
|
if (res != ERROR_OK)
|
|
return res;
|
|
|
|
/* registers are now invalid */
|
|
register_cache_invalidate(armv7m->arm.core_cache);
|
|
|
|
if (breakpoint)
|
|
cortex_m_set_breakpoint(target, breakpoint);
|
|
|
|
adapter_debug_entry(target);
|
|
target_call_event_callbacks(target, TARGET_EVENT_HALTED);
|
|
|
|
LOG_INFO("halted: PC: 0x%08" PRIx32, buf_get_u32(armv7m->arm.pc->value, 0, 32));
|
|
|
|
return ERROR_OK;
|
|
}
|
|
|
|
static int adapter_read_memory(struct target *target, target_addr_t address,
|
|
uint32_t size, uint32_t count,
|
|
uint8_t *buffer)
|
|
{
|
|
struct hl_interface_s *adapter = target_to_adapter(target);
|
|
|
|
if (!count || !buffer)
|
|
return ERROR_COMMAND_SYNTAX_ERROR;
|
|
|
|
LOG_DEBUG("%s " TARGET_ADDR_FMT " %" PRIu32 " %" PRIu32,
|
|
__func__, address, size, count);
|
|
|
|
return adapter->layout->api->read_mem(adapter->handle, address, size, count, buffer);
|
|
}
|
|
|
|
static int adapter_write_memory(struct target *target, target_addr_t address,
|
|
uint32_t size, uint32_t count,
|
|
const uint8_t *buffer)
|
|
{
|
|
struct hl_interface_s *adapter = target_to_adapter(target);
|
|
|
|
if (!count || !buffer)
|
|
return ERROR_COMMAND_SYNTAX_ERROR;
|
|
|
|
LOG_DEBUG("%s " TARGET_ADDR_FMT " %" PRIu32 " %" PRIu32,
|
|
__func__, address, size, count);
|
|
|
|
return adapter->layout->api->write_mem(adapter->handle, address, size, count, buffer);
|
|
}
|
|
|
|
static const struct command_registration adapter_command_handlers[] = {
|
|
{
|
|
.chain = arm_command_handlers,
|
|
},
|
|
{
|
|
.chain = armv7m_trace_command_handlers,
|
|
},
|
|
{
|
|
.chain = rtt_target_command_handlers,
|
|
},
|
|
/* START_DEPRECATED_TPIU */
|
|
{
|
|
.chain = arm_tpiu_deprecated_command_handlers,
|
|
},
|
|
/* END_DEPRECATED_TPIU */
|
|
COMMAND_REGISTRATION_DONE
|
|
};
|
|
|
|
struct target_type hla_target = {
|
|
.name = "hla_target",
|
|
|
|
.init_target = adapter_init_target,
|
|
.deinit_target = cortex_m_deinit_target,
|
|
.target_create = adapter_target_create,
|
|
.target_jim_configure = adiv5_jim_configure,
|
|
.examine = cortex_m_examine,
|
|
.commands = adapter_command_handlers,
|
|
|
|
.poll = adapter_poll,
|
|
.arch_state = armv7m_arch_state,
|
|
|
|
.target_request_data = hl_target_request_data,
|
|
.assert_reset = hl_assert_reset,
|
|
.deassert_reset = hl_deassert_reset,
|
|
|
|
.halt = adapter_halt,
|
|
.resume = adapter_resume,
|
|
.step = adapter_step,
|
|
|
|
.get_gdb_arch = arm_get_gdb_arch,
|
|
.get_gdb_reg_list = armv7m_get_gdb_reg_list,
|
|
|
|
.read_memory = adapter_read_memory,
|
|
.write_memory = adapter_write_memory,
|
|
.checksum_memory = armv7m_checksum_memory,
|
|
.blank_check_memory = armv7m_blank_check_memory,
|
|
|
|
.run_algorithm = armv7m_run_algorithm,
|
|
.start_algorithm = armv7m_start_algorithm,
|
|
.wait_algorithm = armv7m_wait_algorithm,
|
|
|
|
.add_breakpoint = cortex_m_add_breakpoint,
|
|
.remove_breakpoint = cortex_m_remove_breakpoint,
|
|
.add_watchpoint = cortex_m_add_watchpoint,
|
|
.remove_watchpoint = cortex_m_remove_watchpoint,
|
|
.profiling = cortex_m_profiling,
|
|
};
|